Patents by Inventor Sebastien Cremer

Sebastien Cremer has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7033887
    Abstract: A process for producing an integrated electronic circuit that includes a capacitor comprises the formation of a stack on top of a substrate (100, 101). The stack comprises a first volume of a temporary material, a second volume (2) of at least one insulating dielectric and a third volume (3) of a first electrically conducting material. After a coating material (4) has been deposited on the stack, the temporary material is removed via access shafts (C1, C2) that are formed between a surface (S) of the circuit and the first volume. The temporary material is then replaced with a second, electrically conducting material.
    Type: Grant
    Filed: May 20, 2004
    Date of Patent: April 25, 2006
    Assignee: STMicroelectronics SA
    Inventors: Philippe Delpech, Christophe Regnier, Sebastien Cremer
  • Patent number: 6972451
    Abstract: A capacitor formed in a substrate including a recess dug into a substrate; a first layer of a dielectric material covering the walls, the bottom and the edges of the recess; a second layer of a conductive material covering the first layer; a third layer of a conductive or insulating material filling the recess; trenches crossing the third layer; a fourth layer of a conductive material covering the walls, the bottoms as well as the intervals between these trenches and the edges thereof; a fifth layer of a dielectric material covering the fourth layer; and a sixth layer of a conductive material covering the fifth layer.
    Type: Grant
    Filed: May 14, 2003
    Date of Patent: December 6, 2005
    Assignee: STMicroelectronics S.A.
    Inventors: Philippe Delpech, Sébastien Cremer, Michel Marty
  • Publication number: 20050037593
    Abstract: A process for producing an integrated electronic circuit comprises the production of a first electronic component and a second electronic component that are superposed on top of a substrate. A volume of temporary material is formed on the substrate at the position of the second electronic component. The first electronic component is then produced above the volume of temporary material relative to the substrate, and then the second electronic component is produced using at least one shaft for access to the temporary material. The first electronic component may be an active component and the second electronic component may be a passive component.
    Type: Application
    Filed: May 20, 2004
    Publication date: February 17, 2005
    Applicant: STMICROELECTRONICS SA
    Inventors: Philippe Delpech, Christophe Regnier, Sebastien Cremer, Stephane Monfray
  • Publication number: 20050032303
    Abstract: A process for producing an integrated electronic circuit that includes a capacitor comprises the formation of a stack on top of a substrate (100, 101). The stack comprises a first volume of a temporary material, a second volume (2) of at least one insulating dielectric and a third volume (3) of a first electrically conducting material. After a coating material (4) has been deposited on the stack, the temporary material is removed via access shafts (C1, C2) that are formed between a surface (S) of the circuit and the first volume. The temporary material is then replaced with a second, electrically conducting material.
    Type: Application
    Filed: May 20, 2004
    Publication date: February 10, 2005
    Applicant: STMICROELECTRONICS SA
    Inventors: Philippe Delpech, Christophe Regnier, Sebastien Cremer
  • Publication number: 20030213989
    Abstract: A capacitor formed in a substrate including a recess dug into a substrate; a first layer of a dielectric material covering the walls, the bottom and the edges of the recess; a second layer of a conductive material covering the first layer; a third layer of a conductive or insulating material filling the recess; trenches crossing the third layer; a fourth layer of a conductive material covering the walls, the bottoms as well as the intervals between these trenches and the edges thereof; a fifth layer of a dielectric material covering the fourth layer; and a sixth layer of a conductive material covering the fifth layer.
    Type: Application
    Filed: May 14, 2003
    Publication date: November 20, 2003
    Inventors: Philippe Delpech, Sebastien Cremer, Michel Marty