Patents by Inventor Seiichi Kondo

Seiichi Kondo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6326299
    Abstract: In order to suppress an increase of depressions, etc. to occur on a copper based alloy layer during polishing when a copper based alloy inlaid wiring is formed with the damascene method in grooves formed in an insulating film, the polishing rate for the lower metallic layer is set not less than five times faster than the etching rate for the same and the polishing rate for the insulating film is set lower than the polishing rate for the lower metallic layer when the upper metallic layer 13 to become a wiring and the lower metallic layer 12 to become a barrier are polished respectively. Thus, the object damascene wiring can be formed with less erosion on each of insulating layers and dishing on each of metallic layers respectively.
    Type: Grant
    Filed: July 28, 1999
    Date of Patent: December 4, 2001
    Assignee: Hitachi, Ltd.
    Inventors: Yoshio Homma, Seiichi Kondo, Noriyuki Sakuma, Naofumi Ohashi, Toshinori Imai, Hizuru Yamaguchi, Nobuo Owada
  • Patent number: 6117775
    Abstract: A polishing technique wherein scratches, peeling, dishing and erosion are suppressed, a complex cleaning process and slurry supply/processing equipment are not required, and the cost of consumable items, such as slurries and polishing pads, is reduced. A metal film formed on an insulating film having a groove is polished with a polishing solution containing an oxidizer and a substance which renders oxides water-soluble, but not containing a polishing abrasive.
    Type: Grant
    Filed: October 30, 1998
    Date of Patent: September 12, 2000
    Assignee: Hitachi, Ltd.
    Inventors: Seiichi Kondo, Yoshio Homma, Noriyuki Sakuma, Kenichi Takeda, Kenji Hinode
  • Patent number: 5694059
    Abstract: A buffer circuit ID provided for connecting an atom level device (for example, an Atom Relay Transistor circuit), formed by arranging atoms in a predetermined pattern, to a device such as a semiconductor device and a quantum device. The buffer circuit can be formed as a voltage or current amplification circuit. The voltage amplification circuit may be a single electron transistor circuit, and the current amplification circuit may be an avalanche amplification device circuit. The Atom Relay Transistor circuit and the device such as a semiconductor device and a quantum device are formed substantially on the same flat insulating member, and connected by a fine connection structure made of a conductive body such as metal.
    Type: Grant
    Filed: February 6, 1995
    Date of Patent: December 2, 1997
    Assignee: Hitachi Ltd.
    Inventors: Yasuo Wada, Munehisa Mitsuya, Yasushi Tomioka, Mark I. Lutwyche, Seiichi Kondo, Seiji Heike
  • Patent number: 5561300
    Abstract: In an atomic switch, opposite ends of an atom wire are connected to an input and output, and a switching gate is connected to a switching power supply. An input signal is outputted when a switching atom is connected to the atom wire, whereas an input signal is not outputted when the switching atom is moved to disconnect from the atom wire. There are provided an atom wire having a plurality of atoms arranged in a line or in a plurality of lines, in a ring shape, or in a curved line, and a switching gate made of an atom wire. The atom wire is switched by the field effect of the switching gate.
    Type: Grant
    Filed: December 22, 1992
    Date of Patent: October 1, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Yasuo Wada, Seiichi Kondo, Tsuyoshi Uda, Masukazu Igarashi, Hiroshi Kajiyama, Hisashi Nagano, Akito Sakurai, Tsuneo Ichiguchi
  • Patent number: 5510614
    Abstract: A surface of an insulator or semiconductor substrate is irradiated with a beam such as an electron beam, an electromagnetic wave beam, an ion beam, etc. to excite carriers so as to form an electrical conductive layer on the surface of and in the inside of the substrate to thereby make it possible to perform observation and micro working on the insulator by using a scanning tunneling microscope.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: April 23, 1996
    Assignee: Hitachi, Ltd.
    Inventors: Munehisa Mitsuya, Yasuo Wada, Seiji Heike, Seiichi Kondo
  • Patent number: 5402715
    Abstract: A rolling mill for use in a noodle making apparatus, of the type adapted for rolling a noodle sheet of a predetermined width, includes a plurality of rolling sections arranged in a set and each having pairs of upper and lower rolls. The set includes a pair of grooved rolls for pressingly forming a plurality of mountain and valley portions on the noodle sheet parallel to the extending longitudinal direction thereof, and at least one pair of gear-type rolls for pressingly forming a plurality of mountain and valley portions on the noodle sheet parallel to the transverse direction thereof.
    Type: Grant
    Filed: July 19, 1994
    Date of Patent: April 4, 1995
    Inventors: Masayasu Kurachi, Seiichi Kondo
  • Patent number: 5323839
    Abstract: The invention is directed to a method and a mold for forming a zinc collar on an insulator metal cap. The zinc collar forming mold is composed of a setting section for setting the metal cap in position on the mold and an upwardly opening cavity defined around the periphery of the setting section. For molding a zinc collar, the metal cap is immersed in a molten zinc, and the metal cap is set upright on the setting section of the mold with the lower half thereof being still in the molten state. Subsequenctly, a molten zinc is poured from the upper opening of the mold, and upon solidification of the molten zinc, a zinc collar can be formed around the external circumference of the metal cap.
    Type: Grant
    Filed: April 1, 1993
    Date of Patent: June 28, 1994
    Assignee: NGK Insulators, Ltd.
    Inventors: Hiroto Matsuo, Takashi Imakoma, Iwaji Kawamoto, Seiichi Kondo
  • Patent number: 5295529
    Abstract: Disclosed is a method and a mold for forming a zinc collar on an insulator metal cap. The zinc collar forming mold comprises a setting section for setting the metal cap in position on the mold and an upwardly opening cavity defined around the periphery of the setting section. For molding a zinc collar, the metal cap is immersed in a molten zinc, and the metal cap is set upright on the setting section of the mold with the lower half thereof being still in the molten state. Subsequently, a molten zinc is poured from the upper opening of the mold, and upon solidification of the molten zinc, a zinc collar can be formed around the external circumference of the metal cap.
    Type: Grant
    Filed: October 22, 1991
    Date of Patent: March 22, 1994
    Assignee: NGK Insulators, Ltd.
    Inventors: Hiroto Matsuo, Takashi Imakoma, Seiichi Kondo, Iwaji Kawamoto
  • Patent number: 5235449
    Abstract: A method for producing a polarizer patterned with a plural number of portions having a polarizing ability or direction of polarization comprising the first step of producing a surface oriented in a pre-determined direction on a substrate, the second step of producing a polymerizable molecular layer which comprises polymerizable molecules on the above surface, the third step of polymerizing the molecules in said polymerizable molecular layer into a desired pattern and the fourth step of removing the unpolymerized portion of said polymerizable molecular layer.
    Type: Grant
    Filed: March 1, 1991
    Date of Patent: August 10, 1993
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Imazeki, Yasushi Tomioka, Naoki Tanaka, Tatsuo Kanetake, Seiichi Kondo, Yoshio Taniguchi, Katsumi Kondo, Hideaki Kawakami
  • Patent number: 5013526
    Abstract: A superconducting material made of tungsten or molybdenum containing a specified amount of silicon, a wiring made of this superconducting material, and a semiconductor device using this wiring.The above-mentioned superconducting material undegoes no damage even in the steps of heat treatments effected after the formation of a wiring therefrom by virtue of its high melting point, and can be very easily patterned by reactive ion etching using SF.sub.6 as an etching gas, which has heretofore been generally employed. These features, in which conventional superconducting materials are lacking, allow the superconducting material of the present invention to exhibit excellent properties particularly when used in the wirings of a semiconductor device.
    Type: Grant
    Filed: November 17, 1989
    Date of Patent: May 7, 1991
    Assignee: Hitachi, Ltd.
    Inventors: Nobuyoshi Kobayashi, Masayuki Suzuki, Seiichi Kondo, Makoto Matsui, Kiichiro Mukai
  • Patent number: 4596141
    Abstract: An electrically operated oil level gauge is composed of a flexible elongate bar whose one end section is provided with an oil level sensing element such as a thermistor. Additionally, a flexible elongate printed-wiring film is adhered on the surface of the flexible elongate bar so as to electrically connect the sensing element with a lead wire through which an electric current is supplied to the sensing element, thereby rendering the oil level gauge axially flexible while effectively preventing lead wire troubles.
    Type: Grant
    Filed: May 15, 1984
    Date of Patent: June 24, 1986
    Assignee: Kabushiki Kaisha Tsuchiya Seisakusho
    Inventor: Seiichi Kondo