Patents by Inventor Seiichi Yokoyama

Seiichi Yokoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7615792
    Abstract: Light-emitting devices capable of preventing separation or alteration of a first electrode to obtain high performance, methods of manufacturing the light-emitting device, and display units are provided. A first electrode as an anode, an insulating film, an organic layer including a light-emitting layer, and a second electrode as a cathode are laminated in this order on a substrate with a planarizing layer as a base layer in between. The first electrode has a structure in which an adhesive layer, a reflective layer and a barrier layer is laminated in this order from the substrate. Alteration of the reflective layer can be prevented by the barrier layer, and the reflective layer can be prevented from being separated from the planarizing layer by the adhesive layer. The first electrode is formed through forming the adhesive layer, the reflective layer and the barrier layer on the planarizing layer, and then patterning them in order from the barrier layer.
    Type: Grant
    Filed: January 10, 2007
    Date of Patent: November 10, 2009
    Assignee: Sony Corporation
    Inventors: Seiichi Yokoyama, Koji Hanawa, Takanori Shibasaki, Takashi Hirano
  • Patent number: 7544552
    Abstract: A method for manufacturing a junction semiconductor device, having a step for forming a first high-resistance layer, a step for forming a channel-doped layer, a step for forming a second high-resistance layer, a step for forming a low-resistance layer of a first conductive type that acts as a source region, a step for performing partial etching to a midway depth of the second high-resistance layer and the low-resistance layer, a step for forming a gate region below the portion etched in the etching step, and a step for forming a protective film on the surface of the region between the gate region and the source region. A gate region is formed using relatively low energy ion implantation in the surface that has been etched in advance to a height that is between the lower surface of the source area and the upper surface of the channel-doped layer.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: June 9, 2009
    Assignees: Honda Motor Co., Ltd., Shindengen Electric Manufacturing Co., Ltd.
    Inventors: Ken-ichi Nonaka, Hideki Hashimoto, Seiichi Yokoyama, Kensuke Iwanaga, Yoshimitsu Saito, Hiroaki Iwakuro, Masaaki Shimizu, Yusuke Fukuda, Koichi Nishikawa, Yusuke Maeyama
  • Publication number: 20090004790
    Abstract: A method for manufacturing a junction semiconductor device having a drain region including a low-resistance layer of a first conductive type formed on one surface of a semiconductor crystal, a source region including a low-resistance layer of a first conductive type formed on the other surface of the semiconductor crystal, a gate region of a second conductive type formed on the periphery of the source region, a high-resistance layer of a first conductive type between the source region and the drain region, and a recombination-inhibiting semiconductor layer of a second conductive type provided in the vicinity of the surface of the semiconductor crystal between the gate region and the source region.
    Type: Application
    Filed: September 3, 2008
    Publication date: January 1, 2009
    Inventors: Ken-ichi NONAKA, Hideki Hashimoto, Seiichi Yokoyama, Kensuke Iwanaga, Yoshimitsu Saito
  • Patent number: 7449734
    Abstract: A junction semiconductor device having a drain region including a low-resistance layer of a first conductive type formed on one surface of a semiconductor crystal, a source region including a low-resistance layer of a first conductive type formed on the other surface of the semiconductor crystal, a gate region of a second conductive type formed on the periphery of the source region, a high-resistance layer of a first conductive type between the source region and the drain region, and a recombination-inhibiting semiconductor layer of a second conductive type provided in the vicinity of the surface of the semiconductor crystal between the gate region and the source region.
    Type: Grant
    Filed: March 23, 2006
    Date of Patent: November 11, 2008
    Assignee: Honda Motor Co., Ltd.
    Inventors: Ken-ichi Nonaka, Hideki Hashimoto, Seiichi Yokoyama, Kensuke Iwanaga, Yoshimitsu Saito
  • Publication number: 20080052901
    Abstract: A method of manufacturing a semiconductor device, includes increasing adherence between a susceptor as a heating element, and a semiconductor substrate disposed on the susceptor, by using an adherence increasing mechanism, or increasing heat transmitted to a semiconductor substrate, which is disposed on a susceptor as a heating element, by using a transmitted-heat increasing mechanism; and heating the semiconductor substrate to have a predetermined temperature by heating the susceptor. The adherence increasing mechanism may include the susceptor and one of a heavy-weight stone disposed on the semiconductor substrate, a cap disposed on the semiconductor substrate and engaged with the susceptor, and an adhesive layer provided between the susceptor and the semiconductor substrate. The transmitted-heat increasing mechanism may include the susceptor and small pieces which are disposed on the semiconductor substrate and have radiated-light absorption ability.
    Type: Application
    Filed: August 13, 2007
    Publication date: March 6, 2008
    Inventors: Koichi Nishikawa, Masaaki Shimizu, Kenichi Nonaka, Seiichi Yokoyama, Hideki Hashimoto
  • Publication number: 20070279460
    Abstract: A liquid discharge apparatus includes a nozzle, a pressure chamber, a liquid supply chamber, a liquid supply passage, and a fluid resistance changing mechanism. A liquid pressure in the pressure chamber is configured to be changed to discharge liquid from the nozzle. The liquid supply passage extends in a connecting direction to connect the liquid supply chamber and the pressure chamber. The fluid resistance changing mechanism is configured to change a fluid resistance of the liquid supply passage.
    Type: Application
    Filed: May 22, 2007
    Publication date: December 6, 2007
    Applicant: Mimaki Engineering Co., Ltd.
    Inventors: Seiichi YOKOYAMA, Kazutomo Seki
  • Publication number: 20070252878
    Abstract: A liquid discharge apparatus includes a pressure chamber which is connected to a nozzle via a nozzle passage and in which a liquid pressure is configured to be changed to discharge liquid from the nozzle. A liquid supply passage connects a liquid supply chamber and the pressure chamber. A fluid resistance providing mechanism is provided in at least one of the liquid supply passage and the nozzle passage. A first fluid resistance of the fluid resistance providing mechanism along a first flow direction from the liquid supply chamber toward the nozzle is smaller than a second fluid resistance of the fluid resistance providing mechanism along a second flow direction from the nozzle toward the liquid supply chamber.
    Type: Application
    Filed: April 10, 2007
    Publication date: November 1, 2007
    Applicant: Mimaki Engineering Co., Ltd.
    Inventors: Seiichi Yokoyama, Tomokazu Seki
  • Publication number: 20070240814
    Abstract: There is provided a green sheet through-hole machining apparatus, and a through-hole machining method, that allows deterioration of positional precision of through-holes after perforation to be readily prevented. A releasing plate made of a metallic thin plate is removably set on an upper face of a lower base. Then, a green sheet is interposed between the lower and upper bases and the upper base is pressed by a pressurizing roller to press the green sheet toward the releasing plate. Then, the green sheet is punched by the projections to perforate the through-holes. After that, the green sheet is removed from the lower base together with the releasing plate.
    Type: Application
    Filed: April 5, 2007
    Publication date: October 18, 2007
    Inventors: Yuji Sakuma, Seiichi Yokoyama
  • Publication number: 20070190887
    Abstract: Disclosed is a display apparatus, and method of making same, including a plurality of lower electrodes patterned on a substrate on the basis of each pixel, an auxiliary wiring composed of the same layer as the lower electrodes and arranged in the state of being insulated from the lower electrodes, an insulating film formed on the substrate and provided with pixel openings for exposing central portions of the lower electrodes and connection holes reaching the auxiliary wiring, organic layers so patterned as to cover bottom portions of the pixel openings and to have end portions partly overlapping on each other between the adjacent pixels, and an upper electrode so formed as to cover the organic layers and to be connected to the auxiliary wiring through the connection holes between the organic layers.
    Type: Application
    Filed: April 23, 2007
    Publication date: August 16, 2007
    Applicant: SONY CORPORATION
    Inventors: Chiyoko Sato, Jiro Yamada, Takashi Hirano, Seiichi Yokoyama
  • Patent number: 7250634
    Abstract: Light-emitting devices capable of preventing separation or alteration of a first electrode to obtain high performance, methods of manufacturing the light-emitting device, and display units are provided. A first electrode as an anode, an insulating film, an organic layer including a light-emitting layer, and a second electrode as a cathode are laminated in this order on a substrate with a planarizing layer as a base layer in between. The first electrode has a structure in which an adhesive layer, a reflective layer and a barrier layer is laminated in this order from the substrate. Alteration of the reflective layer can be prevented by the barrier layer, and the reflective layer can be prevented from being separated from the planarizing layer by the adhesive layer. The first electrode is formed through forming the adhesive layer, the reflective layer and the barrier layer on the planarizing layer, and then patterning them in order from the barrier layer.
    Type: Grant
    Filed: March 19, 2004
    Date of Patent: July 31, 2007
    Assignee: Sony Corporation
    Inventors: Seiichi Yokoyama, Koji Hanawa, Takanori Shibasaki, Takashi Hirano
  • Patent number: 7245341
    Abstract: A laminated structure which can reduce defect by preventing deposition failure or holes of an insulating film, manufacturing method, and a display unit that employ same are provided. The laminated structure as an anode for organic light-emitting devices is provided on a flat surface of a substrate. In the laminated structure, an adhesive layer made of ITO, a reflective layer made of silver or an alloy containing silver, and a barrier layer made of ITO are layered in this order from the substrate side. A cross sectional shape of the laminated structure in the laminated direction is a forward tapered shape. A sidewall face of the adhesive layer, the reflective layer, and the barrier layer is totally covered by an insulating film, and deposition failure or holes of the insulating film is prevented. A taper angle made by the sidewall face and the flat surface is preferably from about 10° to about 70°.
    Type: Grant
    Filed: May 26, 2004
    Date of Patent: July 17, 2007
    Assignee: Sony Corporation
    Inventor: Seiichi Yokoyama
  • Patent number: 7224115
    Abstract: Disclosed is a display apparatus including a plurality of lower electrodes patterned on a substrate on the basis of each pixel, an auxiliary wiring composed of the same layer as the lower electrodes and arranged in the state of being insulated from the lower electrodes, an insulating film formed on the substrate and provided with pixel openings for exposing central portions of the lower electrodes and connection holes reaching the auxiliary wiring, organic layers so patterned as to cover bottom portions of the pixel openings and to have end portions partly overlapping on each other between the adjacent pixels, and an upper electrode so formed as to cover the organic layers and to be connected to the auxiliary wiring through the connection holes between the organic layers. Also disclosed is a method of manufacturing the display apparatus.
    Type: Grant
    Filed: December 8, 2003
    Date of Patent: May 29, 2007
    Assignee: Sony Corporation
    Inventors: Chiyoko Sato, Jiro Yamada, Takashi Hirano, Seiichi Yokoyama
  • Publication number: 20070114526
    Abstract: Light-emitting devices capable of preventing separation or alteration of a first electrode to obtain high performance, methods of manufacturing the light-emitting device, and display units are provided. A first electrode as an anode, an insulating film, an organic layer including a light-emitting layer, and a second electrode as a cathode are laminated in this order on a substrate with a planarizing layer as a base layer in between. The first electrode has a structure in which an adhesive layer, a reflective layer and a barrier layer is laminated in this order from the substrate. Alteration of the reflective layer can be prevented by the barrier layer, and the reflective layer can be prevented from being separated from the planarizing layer by the adhesive layer. The first electrode is formed through forming the adhesive layer, the reflective layer and the barrier layer on the planarizing layer, and then patterning them in order from the barrier layer.
    Type: Application
    Filed: January 10, 2007
    Publication date: May 24, 2007
    Applicant: Sony Corporation
    Inventors: Seiichi Yokoyama, Koji Hanawa, Takanori Shibasaki, Takashi Hirano
  • Publication number: 20070102737
    Abstract: A display unit capable of being simply designed and manufactured by using more simplified light emitting device structure while capable of high definition display and display with superior color reproducibility and a manufacturing method thereof are provided. The display unit is a display unit (1), wherein a plurality of organic EL devices (3B), (3G), and (3R), in which a function layer (6) including a light emitting layer (11) is sandwiched between a lower electrode (4) made of a light reflective material and a semi-transmissive upper electrode (7), and which has a resonator structure in which light h emitted in the light emitting layer (11) is resonated using a space between the lower electrode (4) and the upper electrode (7) as a resonant section (15) and is extracted from the upper electrode (7) side are arranged on a substrate (2).
    Type: Application
    Filed: September 17, 2004
    Publication date: May 10, 2007
    Inventors: Mitsuhiro Kashiwabara, Jiro Yamada, Seiichi Yokoyama, Kohji Hanawa
  • Publication number: 20070063645
    Abstract: A laminated structure which can reduce defect by preventing deposition failure or holes of an insulating film, manufacturing method, and a display unit that employ same are provided. The laminated structure as an anode for organic light-emitting devices is provided on a flat surface of a substrate. In the laminated structure, an adhesive layer made of ITO, a reflective layer made of silver or an alloy containing silver, and a barrier layer made of ITO are layered in this order from the substrate side. A cross sectional shape of the laminated structure in the laminated direction is a forward tapered shape. A sidewall face of the adhesive layer, the reflective layer, and the barrier layer is totally covered by an insulating film, and deposition failure or holes of the insulating film is prevented. A taper angle made by the sidewall face and the flat surface is preferably from about 10° to about 70°.
    Type: Application
    Filed: October 16, 2006
    Publication date: March 22, 2007
    Applicant: c/o Sony Corporation
    Inventor: Seiichi Yokoyama
  • Publication number: 20070032002
    Abstract: A method for manufacturing an ion implantation mask is disclosed which includes the steps of: forming an oxide film as a protective film over the entire surface of a semiconductor substrate; forming a thin metal film over the oxide film; and forming an ion-inhibiting layer composed of an ion-inhibiting metal over the thin metal film. The obtained ion implantation mask is used to form a deeper selectively electroconductive region.
    Type: Application
    Filed: August 1, 2006
    Publication date: February 8, 2007
    Applicants: HONDA MOTOR CO., LTD., Shindengen Electric Manufacturing Co., Ltd.
    Inventors: Ken-ichi Nonaka, Hideki Hashimoto, Seiichi Yokoyama, Hiroaki Iwakuro, Koichi Nishikawa, Masaaki Shimizu, Yusuke Fukuda
  • Publication number: 20060216879
    Abstract: A method for manufacturing a junction semiconductor device, having a step for forming a first high-resistance layer, a step for forming a channel-doped layer, a step for forming a second high-resistance layer, a step for forming a low-resistance layer of a first conductive type that acts as a source region, a step for performing partial etching to a midway depth of the second high-resistance layer and the low-resistance layer, a step for forming a gate region below the portion etched in the etching step, and a step for forming a protective film on the surface of the region between the gate region and the source region. A gate region is formed using relatively low energy ion implantation in the surface that has been etched in advance to a height that is between the lower surface of the source area and the upper surface of the channel-doped layer.
    Type: Application
    Filed: March 23, 2006
    Publication date: September 28, 2006
    Inventors: Ken-ichi Nonaka, Hideki Hashimoto, Seiichi Yokoyama, Kensuke Iwanaga, Yoshimitsu Saito, Hiroaki Iwakuro, Masaaki Shimizu, Yusuke Fukuda, Koichi Nishikawa, Yusuke Maeyama
  • Publication number: 20060214200
    Abstract: A junction semiconductor device having a drain region comprising a low-resistance layer of a first conductive type formed on one surface of a semiconductor crystal, a source region comprising a low-resistance layer of a first conductive type formed on the other surface of the semiconductor crystal, a gate region of a second conductive type formed on the periphery of the source region, a high-resistance layer of a first conductive type between the source region and the drain region, and a recombination-inhibiting semiconductor layer of a second conductive type provided in the vicinity of the surface of the semiconductor crystal between the gate region and the source region.
    Type: Application
    Filed: March 23, 2006
    Publication date: September 28, 2006
    Inventors: Ken-ichi Nonaka, Hideki Hashimoto, Seiichi Yokoyama, Kensuke Iwanaga, Yoshimitsu Saito
  • Publication number: 20060145159
    Abstract: Light-emitting devices capable of preventing separation or alteration of a first electrode to obtain high performance, methods of manufacturing the light-emitting device, and display units are provided. A first electrode as an anode, an insulating film, an organic layer including a light-emitting layer, and a second electrode as a cathode are laminated in this order on a substrate with a planarizing layer as a base layer in between. The first electrode has a structure in which an adhesive layer, a reflective layer and a barrier layer is laminated in this order from the substrate. Alteration of the reflective layer can be prevented by the barrier layer, and the reflective layer can be prevented from being separated from the planarizing layer by the adhesive layer. The first electrode is formed through forming the adhesive layer, the reflective layer and the barrier layer on the planarizing layer, and then patterning them in order from the barrier layer.
    Type: Application
    Filed: March 19, 2004
    Publication date: July 6, 2006
    Inventors: Seiichi Yokoyama, Koji Hanawa, Takanori Shibasaki, Takashi Hirano
  • Patent number: 6894373
    Abstract: Thin film circuit elements including capacitors, resistors, and inductance elements are formed on a large substrate, and semiconductor chips are wire bonded to the substrate. The elements and chips are sealed by potting a sealing resin. The large substrate is divided into multiple stripe substrates by dicing and a thin-film conductive layer is sputtered on cut surfaces of the stripe substrates, thereby electrically connecting edges of lower conductive patterns to edges of upper conductive patterns exposed from side surfaces of the sealing resin through the thin-film conductive layer. A Ni foundation layer and Au layer are successively plated on a surface of the thin-film conductive layer to form edge electrodes on side surfaces of the stripe substrates and the stripe substrates are divided finely into individual alumina substrates.
    Type: Grant
    Filed: May 19, 2003
    Date of Patent: May 17, 2005
    Assignee: Alps Electric Co., Ltd.
    Inventors: Kazuhiko Ueda, Seiichi Yokoyama