Patents by Inventor Seiji Kaneko

Seiji Kaneko has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080016285
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Application
    Filed: September 5, 2007
    Publication date: January 17, 2008
    Inventors: Seiji Kaneko, Hiroki Kanai
  • Patent number: 7287125
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Grant
    Filed: October 11, 2006
    Date of Patent: October 23, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Seiji Kaneko, Hiroki Kanai
  • Publication number: 20070233977
    Abstract: The present invention provides a control method for a storage device controller system provided with a first storage device controller that is connected to first and second storage devices storing data in the CKD format and the FBA format, respectively, and that has first and second communications control means that receive data input/output requests from a mainframe computer and an open system computer, respectively, and a second storage device that is connected to a third storage device storing data in the CKD format and that has third communications means connected to the second communications means, wherein the first storage device controller transmits a command to the second storage device controller if a data read request received from the open system computer is for data stored on the third storage device, and transmits the data that are read out from the third storage device by the second storage device controller to the open system computer.
    Type: Application
    Filed: May 30, 2007
    Publication date: October 4, 2007
    Applicant: Hitachi, Ltd.
    Inventor: Seiji Kaneko
  • Publication number: 20070140017
    Abstract: There is provided a nonvolatile semiconductor memory device capable of accelerating writing time and avoiding readout errors of information by eliminating variation in threshold voltage of unselected memory cells. In a nonvolatile semiconductor memory device having a memory cell array with memory cells capable of erasing and programming information, the memory cells store one data value selected from the same number of data values as programming distribution ranges, associated with that the electrical attribute belongs to any one of the more than one programming distribution ranges. The device comprises an erasure means for erasing the selected memory cell to be erased so that its electrical attribute belongs to a erasure distribution range not overlapping any of the programming distribution ranges and a programming means for programming an erased memory cell to be programmed so that its electrical attribute belongs to any one of the programming distribution ranges.
    Type: Application
    Filed: December 12, 2006
    Publication date: June 21, 2007
    Inventors: Seiji Kaneko, Naoki Ueda
  • Patent number: 7228399
    Abstract: The present invention provides a control method for a storage device controller system provided with a first storage device controller that is connected to first and second storage devices storing data in the CKD format and the FBA format, respectively, and that has first and second communications control means that receive data input/output requests from a mainframe computer and an open system computer, respectively, and a second storage device that is connected to a third storage device storing data in the CKD format and that has third communications means connected to the second communications means, wherein the first storage device controller transmits a command to the second storage device controller if a data read request received from the open system computer is for data stored on the third storage device, and transmits the data that are read out from the third storage device by the second storage device controller to the open system computer.
    Type: Grant
    Filed: March 21, 2006
    Date of Patent: June 5, 2007
    Assignee: Hitachi, Ltd.
    Inventor: Seiji Kaneko
  • Publication number: 20070106832
    Abstract: In a data processing system, a plurality of modules connected to a system bus thereof are assigned with identifiers. When a source module initiates a split read access to another module, the source module sends an address of the access destination module and an identifier of the source module. When sending a response to the source module, the destination module returns response data and the identifier of the source module thereto. Checking the identifier from the destination module, the source module determines the response data returned as a response to the initiated access.
    Type: Application
    Filed: December 21, 2006
    Publication date: May 10, 2007
    Inventors: Nobukazu Kondo, Seiji Kaneko, Koichi Okazawa, Hideaki Gemma, Tetsuya Mochida, Takehisa Hayashi
  • Patent number: 7206905
    Abstract: When storage controllers are added to a storage system to change the storage system from a configuration having only one storage controller to a configuration having plural storage controllers, or when storage controllers are removed from the storage system to change the storage system from a configuration having plural storage controllers to a configuration having only one storage controller, a controller-internal management-information memory controller carries out a copy process to copy management information from each of the storage controllers to a management-information-memory switch or vice versa at the same time as processing of read and write requests for access to the management information, made by a channel interface or a disc interface, in order to change storage locations of the management information while processing the read and write requests made by the host.
    Type: Grant
    Filed: June 8, 2004
    Date of Patent: April 17, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Noboru Morishita, Hiroshi Arakawa, Seiji Kaneko, Hisao Honma
  • Patent number: 7177970
    Abstract: In a data processing system, a plurality of modules connected to a system bus thereof are assigned with identifiers. When a source module initiates a split read access to another module, the source module sends an address of the access destination module and an identifier of the source module. When sending a response to the source module, the destination module returns response data and the identifier of the source module thereto. Checking the identifier from the destination module, the source module determines the response data returned as a response to the initiated access.
    Type: Grant
    Filed: October 22, 2002
    Date of Patent: February 13, 2007
    Assignee: Hitachi, Ltd.
    Inventors: Nobukazu Kondo, Seiji Kaneko, Koichi Okazawa, Hideaki Gemma, Tetsuya Mochida, Takehisa Hayashi
  • Publication number: 20070033342
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Application
    Filed: October 11, 2006
    Publication date: February 8, 2007
    Inventors: Seiji Kaneko, Hiroki Kanai
  • Patent number: 7139880
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Grant
    Filed: July 28, 2003
    Date of Patent: November 21, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Seiji Kaneko, Hiroki Kanai
  • Patent number: 7133976
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Grant
    Filed: January 13, 2006
    Date of Patent: November 7, 2006
    Assignee: Hitachi, Ltd.
    Inventors: Seiji Kaneko, Hiroki Kanai
  • Publication number: 20060168362
    Abstract: The present invention provides a control method for a storage device controller system provided with a first storage device controller that is connected to first and second storage devices storing data in the CKD format and the FBA format, respectively, and that has first and second communications control means that receive data input/output requests from a mainframe computer and an open system computer, respectively, and a second storage device that is connected to a third storage device storing data in the CKD format and that has third communications means connected to the second communications means, wherein the first storage device controller transmits a command to the second storage device controller if a data read request received from the open system computer is for data stored on the third storage device, and transmits the data that are read out from the third storage device by the second storage device controller to the open system computer.
    Type: Application
    Filed: March 21, 2006
    Publication date: July 27, 2006
    Applicant: Hitachi, Ltd.
    Inventor: Seiji Kaneko
  • Publication number: 20060117142
    Abstract: A disk array device is equipped with a plurality of input/output channels that receive data input/output requests from an external device, a plurality of cache memories provided for the corresponding respective input/output channels, each of the cache memories connected to each of the corresponding respective input/output channels, a disk drive device, a disk control module that performs data input/output to and from the disk drive device, and a communication module that communicatively connects the input/output channels with the disk control module. The disk array device also includes a consistency maintaining module that can perform a consistency maintaining processing to maintain consistency of data stored in each of the cache memories. According to the content of the data input/output request received from the external device, an execution order of a response processing to respond to the external device according to the data input/output request and the consistency maintaining processing is controlled.
    Type: Application
    Filed: January 13, 2006
    Publication date: June 1, 2006
    Inventors: Seiji Kaneko, Hiroki Kanai
  • Patent number: 7047388
    Abstract: The present invention provides a control method for a storage device controller system provided with a first storage device controller that is connected to first and second storage devices storing data in the CKD format and the FBA format, respectively, and that has first and second communications control means that receive data input/output requests from a mainframe computer and an open system computer, respectively, and a second storage device that is connected to a third storage device storing data in the CKD format and that has third communications means connected to the second communications means, wherein the first storage device controller transmits a command to the second storage device controller if a data read request received from the open system computer is for data stored on the third storage device, and transmits the data that are read out from the third storage device by the second storage device controller to the open system computer.
    Type: Grant
    Filed: September 5, 2003
    Date of Patent: May 16, 2006
    Assignee: Hitachi, Ltd.
    Inventor: Seiji Kaneko
  • Patent number: 7039757
    Abstract: A cluster disk subsystem has a cluster structure formed of a plurality of disk array units connected by a high-speed cluster connection network. When the cluster disk subsystem is operated, logical partitioning is set up to the high-speed connection network to partition the cluster. The cluster disk subsystem is operated under the condition that a disk array unit including a disk array control unit, and the other disk array units are assigned to different users. Thus, when the system is operated, the independency of loads and data can be assured between the users, and the parts of the partitioned cluster can be assigned to different users.
    Type: Grant
    Filed: August 19, 2002
    Date of Patent: May 2, 2006
    Assignee: Hitachi, Ltd
    Inventor: Seiji Kaneko
  • Patent number: 6961788
    Abstract: A disk control device of the present invention comprises a plurality of disk control units. Each disk control unit includes: at least one channel controller having an interface to a host computer; at least one disk controller having an interface to a disk device; and an internal coupling for connecting the channel controller, the disk controller, and a cache memory for temporarily storing data to be written to or read from the disk device. The disk control device further comprises: a first coupling unit for connecting the internal coupling of each disk control unit to read or write data within the disk control device; and a second coupling unit for connecting the internal coupling of each disk control unit to transfer data between a plurality of the disk control devices.
    Type: Grant
    Filed: March 3, 2003
    Date of Patent: November 1, 2005
    Assignee: Hitachi, Ltd.
    Inventors: Hiroki Kanai, Seiji Kaneko
  • Publication number: 20050187989
    Abstract: A version management system that includes: a CPU; memory; communications interface section connected to an information processor over a communications network for communications therewith; a repository database for storing a file including version information; a check-out processing section for checking out the file from the repository database in response to the check-out request received from the information processor; a data writing request receiving section for receiving from the information processor a data writing request including information for identifying the file; a file writing processing section for performing data writing to the checked out file in response to the data writing request; a check-in processing section for checking in the file to the repository database in response to the check-in request received from the information processor; and a backup processing section for performing backup of the file stored in the repository database responding to completion of check-in by the check-in pro
    Type: Application
    Filed: May 28, 2004
    Publication date: August 25, 2005
    Applicant: Hitachi, Ltd.
    Inventor: Seiji Kaneko
  • Publication number: 20040221103
    Abstract: When storage controllers are added to a storage system to change the storage system from a configuration having only one storage controller to a configuration having plural storage controllers, or when storage controllers are removed from the storage system to change the storage system from a configuration having plural storage controllers to a configuration having only one storage controller, a controller-internal management-information memory controller carries out a copy process to copy management information from each of the storage controllers to a management-information-memory switch or vice versa at the same time as processing of read and write requests for access to the management information, made by a channel interface or a disc interface, in order to change storage locations of the management information while processing the read and write requests made by the host.
    Type: Application
    Filed: June 8, 2004
    Publication date: November 4, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Noboru Morishita, Hiroshi Arakawa, Seiji Kaneko, Hisao Honma
  • Patent number: 6757792
    Abstract: When storage controllers are added to a storage system to change the storage system from a configuration having only one storage controller to a configuration having plural storage controllers, or when storage controllers are removed from the storage system to change the storage system from a configuration having plural storage controllers to a configuration having only one storage controller, a controller-internal management-information memory controller carries out a copy process to copy management information from each of the storage controllers to a management-information-memory switch or vice versa at the same time as processing of read and write requests for access to the management information, made by a channel interface or a disc interface, in order to change storage locations of the management information while processing the read and write requests made by the host.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: June 29, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Noboru Morishita, Hiroshi Arakawa, Seiji Kaneko, Hisao Honma
  • Publication number: 20040123028
    Abstract: A storage control apparatus comprising a plurality of channel control units each having an interface with an information processor; a disk control unit having an interface with a storage device for storing data; a cache memory for storing temporarily data to be interchanged between the information processor and the storage device; and an internal connector unit for connecting mutually the plurality of channel control units and the disk control unit, wherein the cache memory is disposed in each of the plurality of channel control units that are connected to one another through a dedicated data transfer path used for storing mutually the data stored in the cache memories.
    Type: Application
    Filed: September 19, 2003
    Publication date: June 24, 2004
    Applicant: Hitachi, Ltd.
    Inventors: Hiroki Kanai, Seiji Kaneko