Patents by Inventor Seiji Nakahata

Seiji Nakahata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080272377
    Abstract: Affords high-carrier-concentration, low-cracking-incidence gallium nitride substrates and methods of forming gallium nitride films. A gallium nitride film 52 in which the carrier concentration is 1×1017 cm?3 or more is created. Initially, a gallium nitride layer 51 including an n-type dopant is formed onto a substrate 50. Then, the gallium nitride layer 51 formed on the substrate 50 is heated to form a gallium nitride film 52.
    Type: Application
    Filed: April 30, 2008
    Publication date: November 6, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Seiji Nakahata
  • Publication number: 20080272392
    Abstract: A nitride crystal is characterized in that, in connection with plane spacing of arbitrary specific parallel crystal lattice planes of the nitride crystal obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a surface of the crystal while X-ray diffraction conditions of the specific parallel crystal lattice planes are satisfied, a uniform distortion at a surface layer of the crystal represented by a value of |d1?d2|/d2 obtained from the plane spacing d1 at the X-ray penetration depth of 0.3 ?m and the plane spacing d2 at the X-ray penetration depth of 5 ?m is equal to or lower than 2.1×10?3.
    Type: Application
    Filed: July 1, 2008
    Publication date: November 6, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiji Ishibashi, Tokiko Kaji, Seiji Nakahata, Takayuki Nishiura
  • Publication number: 20080202409
    Abstract: A low dislocation density GaN single crystal substrate is made by forming a seed mask having parallel stripes regularly and periodically aligning on an undersubstrate, growing a GaN crystal on a facet-growth condition, forming repetitions of parallel facet hills and facet valleys rooted upon the mask stripes, maintaining the facet hills and facet valleys, producing voluminous defect accumulating regions (H) accompanying the valleys, yielding low dislocation single crystal regions (Z) following the facets, making C-plane growth regions (Y) following flat tops between the facets, gathering dislocations on the facets into the valleys by the action of the growing facets, reducing dislocations in the low dislocation single crystal regions (Z) and the C-plane growth regions (Y), and accumulating the dislocations in cores (S) or interfaces (K) of the voluminous defect accumulating regions (H).
    Type: Application
    Filed: February 13, 2008
    Publication date: August 28, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Kensaku Motoki, Ryu Hirota, Takuji Okahisa, Seiji Nakahata
  • Patent number: 7416604
    Abstract: A nitride crystal is characterized in that, in connection with plane spacing of arbitrary specific parallel crystal lattice planes of the nitride crystal obtained from X-ray diffraction measurement performed with variation of X-ray penetration depth from a surface of the crystal while X-ray diffraction conditions of the specific parallel crystal lattice planes are satisfied, a uniform distortion at a surface layer of the crystal represented by a value of |d1?d2|/d2 obtained from the plane spacing d1 at the X-ray penetration depth of 0.3 ?m and the plane spacing d2 at the X-ray penetration depth of 5 ?m is equal to or lower than 2.1×10?3.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: August 26, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiji Ishibashi, Tokiko Kaji, Seiji Nakahata, Takayuki Nishiura
  • Publication number: 20080169532
    Abstract: A III nitride single-crystal manufacturing method in which a liquid layer (3) of 200 ?m or less thickness is formed in between a substrate (1) and a III nitride source-material baseplate (2), and III nitride single crystal (4) is grown onto the face (1s) on the liquid-layer side of the substrate (1). Herein, the substrate (1) in at least a superficial layer (1a) on the liquid-layer side may be formed of a III nitride single crystal, while the III nitride source-material baseplate (2) can be formed of a III nitride polycrystal. Further, the substrate (1) in at least a superficial layer (1a) on the liquid-layer side, and the III nitride source-material baseplate (2) can be formed of a III nitride single crystal, while the face (1s) on the liquid-layer side of the substrate (1) can be made a III-atom surface, and the face (2s) on the liquid-layer side of the III nitride source-material baseplate (2) can be made a nitrogen-atom surface.
    Type: Application
    Filed: July 13, 2005
    Publication date: July 17, 2008
    Applicant: Sumitomo Electric Industries
    Inventor: Seiji Nakahata
  • Patent number: 7354477
    Abstract: A low dislocation density GaN single crystal substrate is made by forming a seed mask having parallel stripes regularly and periodically aligning on an undersubstrate, growing a GaN crystal on a facet-growth condition, forming repetitions of parallel facet hills and facet valleys rooted upon the mask stripes, maintaining the facet hills and facet valleys, producing voluminous defect accumulating regions (H) accompanying the valleys, yielding low dislocation single crystal regions (Z) following the facets, making C-plane growth regions (Y) following flat tops between the facets, gathering dislocations on the facets into the valleys by the action of the growing facets, reducing dislocations in the low dislocation single crystal regions (Z) and the C-plane growth regions (Y), and accumulating the dislocations in cores (S) or interfaces (K) of the voluminous defect accumulating regions (H).
    Type: Grant
    Filed: September 9, 2004
    Date of Patent: April 8, 2008
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kensaku Motoki, Ryu Hirota, Takuji Okahisa, Seiji Nakahata
  • Publication number: 20080057608
    Abstract: A manufacturing method of a group III nitride substrate by which a group III nitride substrate being excellent in flatness can be obtained includes the steps of adhering a plurality of the stripe type group III nitride substrates to an abrading holder so that a stripe structure direction is perpendicular to a rotation direction of the abrading holder; and grinding, lapping and/or polishing the-substrates.
    Type: Application
    Filed: August 20, 2007
    Publication date: March 6, 2008
    Inventors: Keiji Ishibashi, Masato Irikura, Seiji Nakahata
  • Publication number: 20080038580
    Abstract: Favorable-quality III-V crystals are easily obtained at low cost without causing cracks, even when using a variety of substrates. The III-V crystals are obtained by manufacturing method characterized in including: a step of depositing a metal film (2) on a substrate (1); a step of heat-treating the metal film (2) in an atmosphere in which a patterning compound is present; and a step of growing a group III-V crystal (4) on the metal film after the heat treatment. Alternatively, the III-V crystal manufacturing method is characterized in including: a step of growing a group III-V compound buffer film on the metal film after the heat treatment; and a step of growing a group III-V crystal on the group III-V compound buffer film.
    Type: Application
    Filed: October 12, 2007
    Publication date: February 14, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Seiji Nakahata, Koji Uematsu, Ryu Hirota
  • Publication number: 20080022921
    Abstract: A method of manufacturing a group III-nitride crystal substrate including the steps of introducing an alkali-metal-element-containing substance, a group III-element-containing substance and a nitrogen-element-containing substance into a reactor, forming a melt containing at least the alkali metal element, the group III-element and the nitrogen element in the reactor, and growing group III-nitride crystal from the melt, and characterized by handling the alkali-metal-element-containing substance in a drying container in which moisture concentration is controlled to at most 1.0 ppm at least in the step of introducing the alkali-metal-element-containing substance into the reactor is provided. A group III-nitride crystal substrate attaining a small absorption coefficient and the method of manufacturing the same, as well as a group III-nitride semiconductor device can thus be provided.
    Type: Application
    Filed: April 15, 2005
    Publication date: January 31, 2008
    Inventors: Takatomo Sasaki, Yusuke Mori, Masashi Yoshimura, Fumio Kawamura, Seiji Nakahata, Ryu Hirota
  • Publication number: 20080014756
    Abstract: Quality of one-surface planar processed group 3 nitride wafers depends upon a direction of pasting of wafers on a polishing plate. Low surface roughness and high yield are obtained by pasting a plurality of group 3 nitride as-grown wafers on a polishing plate with OFs or notches facing forward (f), backward (b) or inward (u) with thermoplastic wax having a thickness of 10 ?m or less, grinding the as-grown wafers, lapping the ground wafers, polishing the lapped wafers into mirror wafers with a bevel of a horizontal width of 200 ?m or less and a vertical depth of 100 ?m or less.
    Type: Application
    Filed: July 11, 2007
    Publication date: January 17, 2008
    Inventors: Keiji Ishibashi, Masato Irikura, Seiji Nakahata
  • Publication number: 20080006201
    Abstract: The facet growth method grows GaN crystals by preparing an undersubstrate, forming a dotmask or a stripemask on the undersubstrate, growing GaN in vapor phase, causing GaN growth on exposed parts, suppressing GaN from growing on masks, inducing facets starting from edges of the masks and rising to tops of GaN crystals on exposed parts, maintaining the facets, making defect accumulating regions H on masked parts. attracting dislocations into the defect accumulating regions H on masks and reducing dislocation density of the surrounding GaN crystals on exposed parts. The defect accumulating regions H on masks have four types. The best of the defect accumulating regions H is an inversion region J. Occurrence of the inversion regions J requires preceding appearance of beaks with inversion orientation on the facets. Sufficient inversion regions J are produced at an initial stage by maintaining the temperature Tj at 900° C. to 990° C. without fail.
    Type: Application
    Filed: July 18, 2007
    Publication date: January 10, 2008
    Inventors: Ryu Hirota, Kensaku Motoki, Seiji Nakahata, Takuji Okahisa, Koji Uematsu
  • Publication number: 20080003440
    Abstract: Affords a method of storing GaN substrates from which semiconductor devices of favorable properties can be manufactured, the stored substrates, and semiconductor devices and methods of manufacturing the semiconductor devices. In the GaN substrate storing method, a GaN substrate (1) is stored in an atmosphere having an oxygen concentration of 18 vol. % or less, and/or a water-vapor concentration of 12 g/m3 or less. Surface roughness Ra of a first principal face on, and roughness Ra of a second principal face on, the GaN substrate stored by the storing method are brought to no more than 20 nm and to no more than 20 ?m, respectively. In addition, the GaN substrates are rendered such that the principal faces form an off-axis angle with the (0001) plane of from 0.05° to 2° in the <1 100> direction, and from 0° to 1° in the <11 20> direction.
    Type: Application
    Filed: June 14, 2007
    Publication date: January 3, 2008
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Hideyuki Ijiri, Seiji Nakahata
  • Publication number: 20070296061
    Abstract: A method of manufacturing a group III-nitride crystal substrate including the steps of introducing an alkali-metal-element-containing substance, a group III-element-containing substance and a nitrogen-element-containing substance into a reactor, forming a melt containing at least the alkali metal element, the group III-element and the nitrogen element in the reactor, and growing group III-nitride crystal from the melt, and characterized by handling the alkali-metal-element-containing substance in a drying container in which moisture concentration is controlled to at most 1.0 ppm at least in the step of introducing the alkali-metal-element-containing substance into the reactor is provided. A group III-nitride crystal substrate attaining a small absorption coefficient and the method of manufacturing the same, as well as a group III-nitride semiconductor device can thus be provided.
    Type: Application
    Filed: March 30, 2005
    Publication date: December 27, 2007
    Inventors: Takatomo Sasaki, Yusuke Mori, Masashi Yoshimura, Fumio Kawamura, Ryu Hirota, Seiji Nakahata
  • Publication number: 20070280872
    Abstract: The GaN facet growth method produces defect accumulating regions H on masks by forming a dotmask or a stripemask on an undersubstrate, growing GaN in a reaction furnace in vapor phase, inducing GaN crystals on exposed parts without covering the masks, inviting facets starting from verges of the masks and producing defect accumulating regions H on the mask. The defect accumulating regions H have four versions, that is, non (O), polycrystal (P), c-axis inclining single crystal (A) and orientation inversion (J). The best is the orientation inversion region (J). A sign of occurrence of the orientation inversion regions (J) is beaks of inversion orientation appearing on facets. GaN is grown on a masked undersubstrate by supplying a carbon material at a hydrocarbon partial pressure of 10 Pa to 5 kPa for 0.5 hour to 2 hour by an HVPE facet growth method without burying facets.
    Type: Application
    Filed: June 5, 2007
    Publication date: December 6, 2007
    Inventors: Takuji Okahisa, Kensaku Motoki, Koji Uematsu, Seiji Nakahata, Ryu Hirota, Hideyuki Ijiri, Hitoshi Kasai, Shunsuke Fujita, Fumitaka Sato, Toru Matsuoka
  • Publication number: 20070281484
    Abstract: A surface treatment method for a nitride crystal is a surface treatment method of chemically and mechanically polishing a surface of the nitride crystal. Oxide abrasive grains are used. The abrasive grains have a standard free energy of formation of at least ?850 kJ/mol as a converted value per 1 mole of oxygen molecules and have a Mohs hardness of at least 4. The surface treatment method efficiently provides, for efficiently obtaining a nitride crystal substrate that can be used for a semiconductor device, the nitride crystal having the smooth and high-quality surface formed thereon.
    Type: Application
    Filed: May 31, 2007
    Publication date: December 6, 2007
    Inventors: Keiji Ishibashi, Takayuki Nishiura, Masato Irikura, Seiji Nakahata
  • Patent number: 7303630
    Abstract: Dotted seeds are implanted in a regular pattern upon an undersubstrate. A GaN crystal is grown on the seed implanted undersubstrate by a facet growth method. The facet growth makes facet pits above the seeds. The facets assemble dislocations from neighboring regions, accumulate the dislocations into pit bottoms, and make closed defect accumulating regions (H) on the seeds. The polycrystalline or slanting orientation single crystal closed defect accumulating regions (H) induce microcracks due to thermal expansion anisotropy. The best one is orientation-inversion single crystal closed defect accumulating regions (H). At an early stage, orientation-inverse protrusions are induced on tall facets and unified with each other above the seeds. Orientation-inverse crystals growing on the unified protrusions become the orientation-inverse single crystal closed defect accumulating regions (H).
    Type: Grant
    Filed: September 3, 2004
    Date of Patent: December 4, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Kensaku Motoki, Takuji Okahisa, Ryu Hirota, Seiji Nakahata, Koji Uematsu
  • Patent number: 7297625
    Abstract: A method of manufacturing a group III-V crystal is made available by which good-quality group III-V crystals are easily obtained at low cost without causing cracks, even when using a variety of substrates. A method of manufacturing a group III-V crystal, characterized in including: a step of depositing a metal film (2) on a substrate (1); a step of heat-treating the metal film (2) in an atmosphere in which a patterning compound is present; and a step of growing a group III-V crystal (4) on the metal film after the heat treatment. Additionally, a method of manufacturing a group III-V crystal, characterized in including: a step of growing a group III-V compound buffer film on the metal film after the heat treatment; and a step of growing a group III-V crystal on the group III-V compound buffer film.
    Type: Grant
    Filed: April 1, 2004
    Date of Patent: November 20, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Seiji Nakahata, Koji Uematsu, Ryu Hirota
  • Patent number: 7294199
    Abstract: A method of producing a nitride single crystal includes the step of forming a material transport medium layer containing a compound of rare earth element on a surface of a nitride crystal, and the step of making a seed crystal in contact with the material transport medium layer to grow a nitride single crystal on the seed crystal. The material transport medium layer contains the compound of rare earth element and at least one compound selected from a group of aluminum compound, alkaline earth compound and transition metal compound. With this producing method, a large nitride single crystal having a crystal size of at least 10 mm is obtained.
    Type: Grant
    Filed: June 10, 2004
    Date of Patent: November 13, 2007
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Koji Uematsu, Seiji Nakahata
  • Publication number: 20070164306
    Abstract: The invention provides Group III nitride semiconductor crystals of a size appropriate for semiconductor devices and methods for manufacturing the same, Group III nitride semiconductor devices and methods for manufacturing the same, and light-emitting appliances. A method of manufacturing a Group III nitride semiconductor crystal includes a process of growing at least one Group III nitride semiconductor crystal substrate on a starting substrate, a process of growing at least one Group III nitride semiconductor crystal layer on the Group III nitride semiconductor crystal substrate, and a process of separating a Group III nitride semiconductor crystal, constituted by the Group III nitride semiconductor crystal substrate and the Group III nitride semiconductor crystal layer, from the starting substrate, and is characterized in that the Group III nitride semiconductor crystal is 10 ?m or more but 600 ?m or less in thickness, and is 0.2 mm or more but 50 mm or less in width.
    Type: Application
    Filed: May 13, 2005
    Publication date: July 19, 2007
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Seiji Nakahata, Hideaki Nakahata, Koji Uematsu, Makoto Kiyama, Youichi Nagai, Takao Nakamura
  • Publication number: 20070145376
    Abstract: Affords GaN crystal substrates that can reduce the occurring of cracks and fractures in the GaN crystal substrates when the semiconductor devices are manufactured, semiconductor devices including them, methods of manufacturing the semiconductor devices, and methods of identifying the GaN crystal substrates. A gallium nitride crystal substrate has a surface area of 10 cm2 or more. The difference between the maximum and the minimum of Raman shifts corresponding to the E2H phonon mode in a region except for a region from the outer periphery in the surface of the gallium nitride crystal substrate to a line 5 mm radially inward from the outer periphery of the surface is 0.5 cm?1 or less. And also affords semiconductor devices including them, methods of manufacturing the semiconductor devices, and methods of identifying the GaN crystal substrates.
    Type: Application
    Filed: December 26, 2006
    Publication date: June 28, 2007
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Manabu Okui, Ken-ichiro Miyatake, Hideaki Nakahata, Shinsuke Fujiwara, Seiji Nakahata