Abstract: There is provided a semiconductor device including: a drift region of a first conductivity type disposed in a semiconductor substrate; a base region of a second conductivity type disposed above the drift region; an emitter region of the first conductivity type disposed above the base region; a plurality of trench portions arrayed in a predetermined array direction on a front surface side of the semiconductor substrate; a trench contact disposed on the front surface side of the semiconductor substrate between two adjacent trench portions; and a contact layer of the second conductivity type disposed under the trench contact and having a higher doping concentration than the base region, wherein a lower end of the trench contact is deeper than a lower end of the emitter region, and the emitter region and the contact layer are in contact with each other at a side wall of the trench contact.

Abstract: A semiconductor device including a semiconductor substrate having an upper surface and a lower surface is provided. In a depth direction connecting the upper and lower surfaces of the semiconductor substrate, a donor concentration distribution includes a first donor concentration peak at a first depth, a second donor concentration peak at a second depth between the first donor concentration peak and the upper surface, a flat region between the first donor concentration peak and the second donor concentration peak, and a plurality of donor concentration peaks between the first donor concentration peak and the lower surface. The second donor concentration peak has a lower concentration than the first donor concentration peak. The donor concentration distribution in the flat region is substantially flat. The thickness of the flat region in the depth direction is 10% or more of the thickness of the semiconductor substrate.

Abstract: Provided is a semiconductor device that has a plurality of gate trench portions electrically connected to a gate electrode, and a plurality of dummy trench portions electrically connected to an emitter electrode, and includes a first trench group that includes one gate trench portion and two dummy trench portions adjacent to the gate trench portion and adjacent to each other, and a second trench group that includes two gate trench portions adjacent to each other.

Abstract: A semiconductor device including an active portion is provided, the semiconductor device comprising: a drift region of a first conductivity type provided in the semiconductor substrate; a base region of a second conductivity type provided above the drift region; a gate pad provided above the semiconductor substrate; an emitter electrode provided above the semiconductor substrate; a gate trench portion provided on a front surface of the semiconductor substrate in the active portion; and a gate wiring portion for connecting the gate pad and the gate trench portion; wherein the gate wiring portion has: a first gate trench wiring portion which extends in a predetermined direction; and a second gate trench wiring portion which extends in a different direction from the first gate trench wiring portion and intersects the first gate trench wiring portion at an intersection portion; and the emitter electrode is provided above the intersection portion.

Abstract: Provided is a semiconductor device that has a plurality of gate trench portions electrically connected to a gate electrode, and a plurality of dummy trench portions electrically connected to an emitter electrode, and includes a first trench group that includes one gate trench portion and two dummy trench portions adjacent to the gate trench portion and adjacent to each other, and a second trench group that includes two gate trench portions adjacent to each other.

Abstract: Provided is a semiconductor device in which a boundary region between a transistor portion and a diode portion includes: a first portion which is in contact with the transistor portion and is not provided with a lifetime adjustment region; and a second portion which is in contact with the diode portion and to which the lifetime adjustment region of the diode portion extends, a density distribution of a lifetime killer in a first direction has a lateral slope where a density of the lifetime killer decreases from the second portion of the boundary region toward the first portion, a width of the first portion is smaller than a width of the second portion in the first direction, and the width of the first portion is equal to or larger than a width of the lateral slope in the first direction.

Abstract: A method of manufacturing a semiconductor device, including: preparing a semiconductor substrate; forming a first semiconductor layer at a first main surface of the semiconductor substrate; forming and etching an oxide film to form a trench mask; using the trench mask to form a plurality of trenches penetrating through the first semiconductor layer; forming a plurality of gate insulating films along the surface of the first semiconductor layer and bottoms and sidewalls of the plurality of trenches; forming a polycrystalline silicon layer on the plurality of gate insulating films; etching the polycrystalline silicon layer to form a plurality of gate electrodes; selectively forming a plurality of first semiconductor regions in the first semiconductor layer; forming a first electrode at the surface of the first semiconductor layer and on the plurality of first semiconductor regions; and forming a second electrode at a second main surface of the semiconductor substrate.

Abstract: Provided is a semiconductor device comprising: a plurality of trench portions include a gate trench portion and a dummy trench portion; a first lower end region of a second conductivity type that is provided to be in contact with lower ends of two or more trench portions which include the gate trench portion; a well region of a second conductivity type that is arranged in a different location from the first lower end region in a top view, and a second lower end region of a second conductivity type that is provided between the first lower end region and the well region in a top view being separated from the first lower end region and the well region, and provided to be in contact with lower ends of one or more trench portions including the gate trench portion.

Abstract: Provided is a semiconductor device comprising: a plurality of trench portions; a first lower end region of a second conductivity type that is provided to be in contact with lower ends of two or more trench portions which include the gate trench portion; a well region of the second conductivity type that is arranged in a different location from the first lower end region in a top view, and a second lower end region of the second conductivity type that is provided between the first lower end region and the well region in a top view being separated from the first lower end region and the well region, and provided to be in contact with lower ends of one or more trench portions including the gate trench portion.

Abstract: Provided is a semiconductor device comprising a semiconductor substrate provided with a drift region of a first conductivity type, wherein the substrate includes: an active portion; and a trench portion provided in the active portion at an upper surface of the substrate, the active portion includes: a first region in which trench portions including the trench portion are arrayed at a first trench interval in an array direction; and a second region in which trench portions including the trench portion are arrayed at a second trench interval greater than the first trench interval in the array direction, the first region includes a first bottom region of a second conductivity type provided over bottoms of at least two trench portions of the trench portions, and the second region includes a second bottom region of the second conductivity type provided at a bottom of one trench portion of the trench portions.

Abstract: Provided is a semiconductor device including a transistor portion, in which the transistor portion has a drift region of a first conductivity type provided in a semiconductor substrate, a base region of a second conductivity type provided above the drift region, an accumulation region of the first conductivity type provided above the drift region, a plurality of trench portions provided to extend from a front surface of the semiconductor substrate to the drift region, and a trench bottom portion of the second conductivity type provided in bottom portions of the plurality of trench portions, and the accumulation region has a doping concentration with a half width of 0.3 ?m or more.

Abstract: A plug electrode is subject to etch back to remain in a contact hole and expose a barrier metal on a top surface of an interlayer insulating film. The barrier metal is subject to etch back, exposing the top surface of the interlayer insulating film. Remaining element structures are formed. After lifetime is controlled by irradiation of helium or an electron beam, hydrogen annealing is performed. During the hydrogen annealing, the barrier metal is not present on the interlayer insulating film covering a gate electrode, enabling hydrogen atoms to reach a mesa part, whereby lattice defects generated in the mesa part by the irradiation of helium or an electron beam are recovered, recovering the gate threshold voltage. Thus, predetermined characteristics of a semiconductor device having a structure where a plug electrode is provided in a contact hole, via barrier metal are easily and stably obtained when lifetime control is performed.

Abstract: Provided is a semiconductor device comprising: a semiconductor substrate including a drift region of a first conductivity type; a base region of a second conductivity type provided between the drift region and the upper surface of the semiconductor substrate; a plurality of trench portions provided from the upper surface of the semiconductor substrate to below the base region; a lower end region of the second conductivity type provided in contact with lower ends of two or more trench portions; a well region of the second conductivity type which is provided from the upper surface of the semiconductor substrate to below the base region, and has a higher doping concentration than the base region; and a high resistance region of the second conductivity type which is arranged between the lower end region and the well region in the top view and has a lower doping concentration than the lower end region.

Abstract: Provided is an insulated gate bipolar transistor including: a base region which is provided between an emitter region and a drift region; an accumulation region which is provided between a base region and a drift region, and which has a doping concentration higher than that of the drift region; a gate trench portion which is provided from an upper surface of a semiconductor substrate to a portion below the accumulation region; and a lower end region which is provide to be in contact with a lower end of the gate trench portion; wherein the accumulation region has a first concentration peak in which the doping concentration indicates a maximum value in a depth direction, and a distance between the first concentration peak and the lower end region in a depth direction is less than a distance between the first concentration peak and the base region in the depth direction.

Abstract: A semiconductor device including a semiconductor substrate having an upper surface and a lower surface is provided. In a depth direction connecting the upper and lower surfaces of the semiconductor substrate, a donor concentration distribution includes a first donor concentration peak at a first depth, a second donor concentration peak at a second depth between the first donor concentration peak and the upper surface, a flat region between the first donor concentration peak and the second donor concentration peak, and a plurality of donor concentration peaks between the first donor concentration peak and the lower surface. The second donor concentration peak has a lower concentration than the first donor concentration peak. The donor concentration distribution in the flat region is substantially flat. The thickness of the flat region in the depth direction is 10% or more of the thickness of the semiconductor substrate.

Abstract: Provided is a semiconductor device, comprising: a semiconductor substrate; a transistor portion including an emitter region on the top of the semiconductor substrate; a diode portion including a cathode region on the bottom of the semiconductor substrate and a second conductivity type overlap region in a region other than the cathode region and arranged alongside to the transistor portion a preset arrangement direction on the top of the semiconductor substrate; and an interlayer dielectric film provided between the semiconductor substrate and an emitter electrode and including a contact hole for connecting the emitter electrode and the diode portion. The overlap region is provided to have a first length between the end of the emitter region and the end of the cathode region and a second length, which is shorter than the first length, between the end of the contact hole and the end of the cathode region.

Abstract: Provided is a semiconductor device including an active section having a transistor section and a diode section, and an edge termination structure section provided to an outer circumference of the active section, in which the transistor section has a drift region of a first conductivity type which is provided in a semiconductor substrate, a base region of a second conductivity type which is provided above the drift region, a trench portion extending from a front surface of the semiconductor substrate to the drift region, and a trench bottom portion of the second conductivity type which is provided in a lower end of the trench portion, and the diode section is provided between a transistor section in proximity to the edge termination structure section, and the edge termination structure section in a top view.

Abstract: A semiconductor device comprising a semiconductor substrate including an upper surface and a lower surface wherein a donor concentration of a drift region is higher than a base doping concentration of the semiconductor substrate, entirely over the drift region in a depth direction connecting the upper surface and the lower surface is provided.

Abstract: Provided is a semiconductor device provided with a transistor section, the semiconductor device including a drift region of a first conductivity type which is provided in a semiconductor substrate, a plurality of trench portions extending from a front surface of the semiconductor substrate to the drift region, an emitter region of the first conductivity type which has a doping concentration higher than a doping concentration of the drift region and which is provided to extend from a trench portion to an adjacent trench portion among the plurality of trench portions on the front surface of the semiconductor substrate, and a trench bottom portion of a second conductivity type which is provided to a lower end of the trench portion, in which the transistor section has an electron passage region in which the trench bottom portion is not provided in a top view.

Abstract: Provided is a semiconductor device in which one mesa portion of two mesa portions in contact with a gate trench portion is an active mesa portion in which an emitter region of a first conductivity type having a doping concentration higher than that of a drift region is arranged in contact with the gate trench portion, the other mesa portion of two mesa portions in contact with the gate trench portion is a dummy mesa portion having no emitter region, and a dummy contact resistance which is a resistance of the dummy mesa portion and an emitter electrode is 1000 times or more as high as an active contact resistance which is a resistance of the active mesa portion and the emitter electrode.