Patents by Inventor Seiki Sakuyama

Seiki Sakuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20140210086
    Abstract: A method of manufacturing a semiconductor device includes forming a barrier metal film on a surface of at least one of a first electrode of a wiring board and a second electrode of a semiconductor element, providing a connection terminal between the first and second electrodes, the connection terminal being made of solder containing tin, bismuth and zinc, and bonding the connection terminal to the barrier metal film by heating the connection terminal and maintaining the temperature of the connection terminal at a constant temperature not lower than a melting point of the solder for a certain period of time.
    Type: Application
    Filed: October 25, 2013
    Publication date: July 31, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Kozo SHIMIZU, Seiki SAKUYAMA, Toyoo MIYAJIMA
  • Publication number: 20140202739
    Abstract: A printed wiring board includes a Cu wiring pattern formed on a substrate. A first metal layer is formed on the Cu wiring pattern. A second metal layer is formed on the first metal layer. The first metal layer has a less reactivity with Cu than the second metal layer. The first metal layer and the second metal layer together cause an eutectic reaction.
    Type: Application
    Filed: March 21, 2014
    Publication date: July 24, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Taiji Sakai, Seiki Sakuyama
  • Patent number: 8740047
    Abstract: A method of manufacturing an electronic apparatus including a first and a second components, includes: forming a first solder bump on one of the first component and the second component; forming a second solder bump on the other one of the first component and the second component; bringing the first solder bump into contact with the second solder bump at a temperature higher than the liquidus temperature of any of the first and the second solder bumps such that the first and the second solder bumps are fused together to form a solder joint of an alloy having a lower liquidus temperature than any of the first and the second solder bumps; and solidifying the solder joint between the first and the second component.
    Type: Grant
    Filed: September 11, 2013
    Date of Patent: June 3, 2014
    Assignee: Fujitsu Limited
    Inventors: Seiki Sakuyama, Toshiya Akamatsu, Masateru Koide
  • Publication number: 20140140030
    Abstract: A conductive material includes a first metal part whose main ingredient is a first metal; a second metal part formed on the first metal part and whose main ingredient is a second metal, the second metal having a melting point lower than a melting point of the first metal, which second metal can form a metallic compound with the first metal; and a third metal part whose main ingredient is a third metal, which third metal can make a eutectic reaction with the second metal.
    Type: Application
    Filed: January 24, 2014
    Publication date: May 22, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Seiki Sakuyama, Taiji Sakai
  • Patent number: 8713792
    Abstract: A printed wiring board includes a Cu wiring pattern formed on a substrate. A first metal layer is formed on the Cu wiring pattern. A second metal layer is formed on the first metal layer. The first metal layer has a less reactivity with Cu than the second metal layer. The first metal layer and the second metal layer together cause an eutectic reaction.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: May 6, 2014
    Assignee: Fujitsu Limited
    Inventors: Taiji Sakai, Seiki Sakuyama
  • Publication number: 20140103097
    Abstract: There is provided a circuit board to which a solder ball composed of a lead (Pb)-free solder is to be connected, a semiconductor device including an electrode and a solder ball composed of a lead (Pb)-free solder disposed on the electrode, and a method of manufacturing the semiconductor device, in which mounting reliability can be improved by enhancing the bonding strength (adhesion strength) between the solder ball composed of a lead (Pb)-free solder and the electrode.
    Type: Application
    Filed: December 13, 2013
    Publication date: April 17, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Masaharu Furuyama, Daisuke Mizutani, Seiki Sakuyama, Toshiya Akamatsu
  • Patent number: 8673050
    Abstract: A conductive material includes a first metal part whose main ingredient is a first metal; a second metal part formed on the first metal part and whose main ingredient is a second metal, the second metal having a melting point lower than a melting point of the first metal, which second metal can form a metallic compound with the first metal; and a third metal part whose main ingredient is a third metal, which third metal can make a eutectic reaction with the second metal.
    Type: Grant
    Filed: August 5, 2010
    Date of Patent: March 18, 2014
    Assignee: Fujitsu Limited
    Inventors: Seiki Sakuyama, Taiji Sakai
  • Patent number: 8673762
    Abstract: A solder includes Sn (tin), Bi (bismuth) and Zn (zinc), wherein the solder has a Zn content of 0.01% by weight to 0.1% by weight.
    Type: Grant
    Filed: December 7, 2011
    Date of Patent: March 18, 2014
    Assignee: Fujitsu Limited
    Inventors: Toshiya Akamatsu, Nobuhiro Imaizumi, Seiki Sakuyama, Keisuke Uenishi, Tetsuhiro Nakanishi
  • Publication number: 20140008114
    Abstract: A method of manufacturing an electronic apparatus including a first and a second components, includes: forming a first solder bump on one of the first component and the second component; forming a second solder bump on the other one of the first component and the second component; bringing the first solder bump into contact with the second solder bump at a temperature higher than the liquidus temperature of any of the first and the second solder bumps such that the first and the second solder bumps are fused together to form a solder joint of an alloy having a lower liquidus temperature than any of the first and the second solder bumps; and solidifying the solder joint between the first and the second component.
    Type: Application
    Filed: September 11, 2013
    Publication date: January 9, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Seiki Sakuyama, Toshiya Akamatsu, Masateru Koide
  • Publication number: 20130307136
    Abstract: A sheet structure has: a bundle structure including a plurality of linear structures made of carbon which are oriented in a predetermined direction; a covering layer covering the plurality of linear structures made of carbon; and a filling layer provided between the plurality of linear structures made of carbon covered with the covering layer. The thickness of the covering layer is not uniform in a direction crossing the predetermined direction.
    Type: Application
    Filed: April 10, 2013
    Publication date: November 21, 2013
    Applicant: FUJITSU LIMITED
    Inventors: Yoshitaka YAMAGUCHI, Seiki SAKUYAMA, Yoshihiro MIZUNO, Taisuke IWAI, Yukie SAKITA, Masaaki NORIMATSU, Koji ASANO, Shinichi HIROSE, Yohei YAGISHITA
  • Patent number: 8556157
    Abstract: A method of manufacturing an electronic apparatus including a first and a second components, includes: forming a first solder bump on one of the first component and the second component; forming a second solder bump on the other one of the first component and the second component; bringing the first solder bump into contact with the second solder bump at a temperature higher than the liquidus temperature of any of the first and the second solder bumps such that the first and the second solder bumps are fused together to form a solder joint of an alloy having a lower liquidus temperature than any of the first and the second solder bumps; and solidifying the solder joint between the first and the second component.
    Type: Grant
    Filed: May 23, 2011
    Date of Patent: October 15, 2013
    Assignee: Fujitsu Limited
    Inventors: Seiki Sakuyama, Toshiya Akamatsu, Masateru Koide
  • Publication number: 20120193800
    Abstract: A solder includes Sn (tin), Bi (bismuth) and Zn (zinc), wherein the solder has a Zn content of 0.01% by weight to 0.1% by weight.
    Type: Application
    Filed: December 7, 2011
    Publication date: August 2, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Toshiya Akamatsu, Nobuhiro Imaizumi, Seiki Sakuyama, Keisuke Uenishi, Tetsuhiro Nakanishi
  • Publication number: 20110244261
    Abstract: A member having a coating film capable of suppressing whisker generation is provided. The coating film (3) including a plurality of crystalline grains (3a) made of tin or tin alloy is formed above the surface of the base member (1). An intermetallic compound (3b) of tin and the first metal is being formed along the crystalline grain boundaries of the coating film.
    Type: Application
    Filed: June 15, 2011
    Publication date: October 6, 2011
    Applicant: Fujitsu Limited
    Inventor: Seiki SAKUYAMA
  • Publication number: 20110244133
    Abstract: A member having a coating film capable of suppressing whisker generation is provided. The coating film (3) including a plurality of crystalline grains (3a) made of tin or tin alloy is formed above the surface of the base member (1). An intermetallic compound (3b) of tin and the first metal is being formed along the crystalline grain boundaries of the coating film.
    Type: Application
    Filed: June 15, 2011
    Publication date: October 6, 2011
    Applicant: Fujitsu Limited
    Inventor: Seiki SAKUYAMA
  • Publication number: 20110220398
    Abstract: A method of manufacturing an electronic apparatus including a first and a second components, includes: forming a first solder bump on one of the first component and the second component; forming a second solder bump on the other one of the first component and the second component; bringing the first solder bump into contact with the second solder bump at a temperature higher than the liquidus temperature of any of the first and the second solder bumps such that the first and the second solder bumps are fused together to form a solder joint of an alloy having a lower liquidus temperature than any of the first and the second solder bumps; and solidifying the solder joint between the first and the second component.
    Type: Application
    Filed: May 23, 2011
    Publication date: September 15, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Seiki Sakuyama, Toshiya Akamatsu, Masateru Koide
  • Patent number: 7984841
    Abstract: A member having a coating film capable of suppressing whisker generation is provided. The coating film (3) including a plurality of crystalline grains (3a) made of tin or tin alloy is formed above the surface of the base member (1). An intermetallic compound (3b) of tin and the first metal is being formed along the crystalline grain boundaries of the coating film.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: July 26, 2011
    Assignee: Fujitsu Limited
    Inventor: Seiki Sakuyama
  • Publication number: 20110163261
    Abstract: A composition for controlling a temperature elevation of an electronic component when soldering the electronic component on a substrate, includes a first resin for providing the composition with adhesion to the electronic component, a curing agent for curing the first resin by heat treatment for soldering, and a second resin for facilitating removal of the composition from the electronic component.
    Type: Application
    Filed: March 15, 2011
    Publication date: July 7, 2011
    Applicant: FUJITSU LIMITED
    Inventor: Seiki Sakuyama
  • Patent number: 7931760
    Abstract: A plated structure is disclosed that includes a base formed of a copper-based material containing copper as a major component, a plating film formed of a tin-based material containing tin as a major component and provided over the base, and a tin-copper compound barrier film located at the boundary between the base and the plating film. The density of the tin-copper compound barrier film is greater than that of copper.
    Type: Grant
    Filed: June 23, 2006
    Date of Patent: April 26, 2011
    Assignee: Fujitsu Limited
    Inventors: Seiki Sakuyama, Kozo Shimizu
  • Patent number: 7926696
    Abstract: A composition for controlling a temperature elevation of an electronic component when soldering the electronic component on a substrate, includes a first resin for providing the composition with adhesion to the electronic component, a curing agent for curing the first resin by heat treatment for soldering, and a second resin for facilitating removal of the composition from the electronic component.
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: April 19, 2011
    Assignee: Fujitsu Limited
    Inventor: Seiki Sakuyama
  • Publication number: 20110031002
    Abstract: A printed wiring board includes a Cu wiring pattern formed on a substrate. A first metal layer is formed on the Cu wiring pattern. A second metal layer is formed on the first metal layer. The first metal layer has a less reactivity with Cu than the second metal layer. The first metal layer and the second metal layer together cause an eutectic reaction.
    Type: Application
    Filed: October 20, 2010
    Publication date: February 10, 2011
    Applicant: FUJITSU LIMITED
    Inventors: Taiji Sakai, Seiki Sakuyama