Abstract: In the nitride semiconductor heterojunction field effect transistor of the present invention, the floating gate layer (32), as the third layer, is formed between the control gate electrode (34) and the AlGaN layer (11), and the potential for the electrons in the AlGaN layer (11), which is substantially neighboring the floating gate layer (32), is able to be substantially high, and then the channel is able to be depleted. Hence, no current can be flowed through the channel (no drain current) at the time of no gate voltage, as so-called stable normally-off operation can be obtained.

Abstract: The GaN-based semiconductor element 20 of the present invention comprises the buffer layer 2 formed on the sapphire (0001) substrate 1, the channel layer 3 comprised of the undoped GaN layer, and the electron supply layer 4 comprised of the undoped AlGaN layer. The buffer layer 2 is comprised of the n-GaN layer having n-type conductivity. The configuration is adopted as the structure to be able to control the electric potential of the buffer layer 2, wherein the source electrode 6 is implanted into the epitaxial layer (the channel layer 3 and the electron supply layer 4) to be formed on the buffer layer 2, and it is extended to the depth reaching the buffer layer 2 for ohmic contacting to the buffer layer 2. It is able to fix the electric potential of the buffer layer 2 comprised of the n-GaN layer for being equal to that of the source electrode 6 because the source electrode 6 is ohmic contacted to the buffer layer 2.

Abstract: A semiconductor device includes a substrate; a buffer layer; and a compound semiconductor layer laminated on the substrate with the buffer layer in between. The buffer layer has a dislocation density in a plane in parallel to an in-plane direction thereof, so that a volume resistivity of the buffer layer becomes a substantially maximum value.

Abstract: An optical absorption layer comprised of a substance having a band gap energy smaller than that of GaN is formed on an implanted region formed in a pGaN layer as a ground layer. There is performed an annealing step from an upper surface of a substrate with predetermined light such as infrared light, a red light, or the like, which has energy smaller than the band gap energy of the pGaN layer. The optical absorption layer has an absorption coefficient of the light in the annealing step larger than that of the pGaN layer. Accordingly, it is possible to selectively perform a heat treatment on a region directly under the optical absorption layer or a region in a vicinity thereof (the implanted region).

Abstract: The field effect transistor includes a laminated structure in which a buffer layer, and an electron transporting layer (undoped GaN layer), and an electron supplying layer (undoped AlGaN layer) are laminated in sequence on a sapphire substrate. An npn laminated structure is formed on a source region of the electron supplying layer, and a source electrode is formed on the npn laminated structure. A drain electrode is formed in a drain region of the electron supplying layer, and an insulating film is formed in an opening region formed in the gate region. When a forward voltage greater than a threshold is applied to the gate electrode, an inversion layer is formed and the drain current flows. By changing a thickness and an impurity concentration of the p-type GaN layer, the threshold voltage can be controlled. The electrical field concentration between the gate electrode and the drain electrode is relaxed due to the drift layer, and voltage resistance improves.

Abstract: A second semiconductor layer of a second nitride-based compound semiconductor with a wider bandgap formed on a first semiconductor layer of a first nitride-based compound semiconductor with a smaller bandgap includes an opening, on which a gate insulating layer is formed at a portion exposed through the opening. A first source electrode and a first drain electrode formed across a first gate electrode make an ohmic contact to the second semiconductor layer. A second source electrode and a second drain electrode formed across a second gate electrode that makes a Schottky contact to the second semiconductor layer make an ohmic contact to the second semiconductor layer.

Abstract: A field effect transistor formed of a semiconductor of a III group nitride compound, includes an electron running layer formed on a substrate and formed of GaN; an electron supplying layer formed on the electron running layer and formed of AlxGal-xN (0.01?x?0.4), the electron supplying layer having a band gap energy different from that of the electron running layer and being separated with a recess region having a depth reaching the electron running layer; a source electrode and a drain electrode formed on the electron supplying layer with the recess region in between; a gate insulating film layer formed on the electron supplying layer for covering a surface of the electron running layer in the recess region; and a gate electrode formed on the gate insulating film layer in the recess region. The electron supplying layer has a layer thickness between 5.5 nm and 40 nm.

Abstract: The laser beam with a wavelength having a higher energy than the band gap energy of the material forming the carrier moving layer is irradiated to activate the impurities contained in the constituent layer of the field effect transistor in the method of producing the field effect transistor. The method of the invention does not apply the heating of the substrate or the sample stage to raise the temperature of the semiconductor layer using the thermal conductivity so as to activate the impurities. Thus, the implanted impurities can be activated without deteriorating the performance of the device and reliability.

Abstract: A field effect transistor has an MOS structure and is formed of a nitride based compound semiconductor. The field effect transistor includes a substrate; a semiconductor operating layer having a recess part and formed on the substrate; an insulating layer formed on the semiconductor operating layer including the recess part; a gate electrode formed on the insulating layer at the recess part; and a source electrode and a drain electrode formed on the semiconductor operating layer with the recess part in between and electrically connected to the semiconductor operating layer. The recess part includes a side wall protruding and inclined relative to the semiconductor operating layer.

Abstract: A GaN-based semiconductor device includes a silicon substrate; an active layer of a GaN-based semiconductor formed on the silicon substrate; a trench formed in the active layer and extending from a top surface of the active layer to the silicon substrate; a first electrode formed on an internal wall surface of the trench so that the first electrode extends from the top surface of the active layer to the silicon substrate; a second electrode formed on the active layer so that a current flows between the first electrode and the second electrode via the active layer; and a bottom electrode formed on a bottom surface of the silicon substrate. The first electrode is formed of a metal capable of being in ohmic contact with the silicon substrate and the active layer.

Abstract: In the nitride semiconductor heterojunction field effect transistor of the present invention, the floating gate layer (32), as the third layer, is formed between the control gate electrode (34) and the AlGaN layer (11), and the potential for the electrons in the AlGaN layer (11), which is substantially neighboring the floating gate layer (32), is able to be substantially high, and then the channel is able to be depleted. Hence, no current can be flowed through the channel (no drain current) at the time of no gate voltage, as so-called stable normally-off operation can be obtained.

Abstract: A GaN-based FET has a buffer layer structure including GaN first buffer layer and an AlGaN second buffer layer between a substrate and an active layer structure including a channel layer and a donor layer. The GaN first buffer layer and the AlGaN second buffer layer reduce dislocation defects in the active layer structure and allows the FET to have a lower leakage current and a satisfactory pinch-off characteristic. A plurality of GaN first buffer layers and a plurality of AlGaN second buffer layers may be deposited alternately one on another on the substrate.

Abstract: A III-V nitride semiconductor device includes an n-type layer of a III-V nitride semiconductor and an electrode formed on a surface of the n-type layer. A material of the electrode includes at least titanium, aluminum, and silicon.

Abstract: A GaN semiconductor device which has a low on-resistance, has a very small leak current when a reverse bias voltage is applied and is very excellent in withstand voltage characteristic, said GaN semiconductor device having a structure being provided with a III-V nitride semiconductor layer containing at least one hetero junction structure of III-V nitride semiconductors having different band gap energies; a first anode electrode arranged on a surface of said III-V nitride semiconductor by Schottky junction; a second anode electrode which is arranged on the surface of said III-V nitride semiconductor layer by Schottky junction, is electrically connected with said first anode electrode and forms a higher Schottky barrier than a Schottky barrier formed by said first anode electrode; and an insulating protection film which is brought into contact with said second anode electrode and is arranged on the surface of said III-V nitride semiconductor layer.

Abstract: A semiconductor device includes a plurality of electrodes arranged on a compound semiconductor layer grown on a substrate, and a surface protection film that protects a surface of a semiconductor layer on the compound semiconductor layer between the electrodes. A refractive index of the surface protection film is controlled so that a stress caused by the surface protection film on the surface of the semiconductor layer is minimized.

Abstract: A semiconductor electronic device includes a buffer layer formed on a substrate, and a semiconductor operating layer that is formed on the buffer layer. The semiconductor operating layer includes a nitride-based compound semiconductor and. The buffer layer includes at least one composite layer that includes a first layer and a second layer. A lattice-constant difference between the first layer and the second layer is equal to or more than 0.2 percent.

Abstract: According to the present invention, there is provided a new GaN-based field effect transistor of a normally-off type, which has an extremely small ON resistance during operation and is capable of a large-current operation.

Abstract: A GaN-based semiconductor integrated circuit comprising a plurality of types of GaN-based semiconductor devices integrated on a single substrate, and one of the plurality of types of GaN-based semiconductor devices includes a Schottky diode. The Schottky diode includes a GaN-based semiconductor layer, a first anode and a second anode, wherein the first anode is joined to the GaN-based semiconductor layer to form a Schottky junction with a width smaller than the width of the GaN-based semiconductor layer, the second anode is joined to the GaN-based semiconductor layer to form a Schottky junction in a region other than the region in which the first anode is in contact with the GaN-based semiconductor layer, and electrically connected with the first anode, and the Schottky barrier formed between the second anode and the GaN-based semiconductor layer is higher than the Schottky barrier formed between the second anode and the GaN-based semiconductor layer.

Abstract: GaN-based FET has a sapphire substrate of about 50 nm thick on which an n-type GaN electron transit layer and an Al0.2Gao0.8N electron supply layer are formed, together with n+-type GaN contact regions sandwiching the electron transit and supply layers therebetween. On the entire faces of these layer and regions is formed a polyimide interlayer insulating film of about 3000 nm thick that is formed with contact holes in which source, drain and gate electrodes are formed, each of which is comprised of a TaSi/Au layer and about 5000 nm in thickness. The source and drain electrodes are ohmic-connected to the n+-type GaN contact regions and the gate electrode is in contact with an SiO2 gate insulating film.

Abstract: A GaN-based FET has a buffer layer structure including GaN first buffer layer and an AlGaN second buffer layer between a substrate and an active layer structure including a channel layer and a donor layer. The GaN first buffer layer and the AlGaN second buffer layer reduce dislocation defects in the active layer structure and allows the FET to have a lower leakage current and a satisfactory pinch-off characteristic. A plurality of GaN first buffer layers and a plurality of AlGaN second buffer layers may be deposited alternately one on another on the substrate.