Abstract: According to the present invention, there is provided a new GaN-based field effect transistor of a normally-off type, which has an extremely small ON resistance during operation and is capable of a large-current operation.

Abstract: A GaN-based Schottky diode includes a sapphire substrate on which are formed a GaN buffer layer, an n+-type GaN layer, and an n-type GaN layer that has a surface portion thereof shaped to form a protrusion having an upper face with which a Ti electrode forms a Schottky junction and a side face with which a Pt electrode forms a Schottky junction through an Al0.2Ga0.8N layer. A cathode electrode constituted by a TaSi layer forms an ohmic junction with the n+-type GaN layer. The Ti and Pt electrodes constitute a combined anode electrode contributing to increasing a withstand voltage of and decreasing an on-voltage of the Schottky diode.

Abstract: A GaN-based semiconductor device made of GaN-based semiconductor materials includes a bank made of a first undoped material and formed on a base layer, a thin layer made of a second undoped material having higher band-gap energy than the first undoped material and formed on a side wall surface of the bank, the thin layer having a heterojunction with the first undoped material, a source electrode formed on the bank so as to extend beyond the heterojunction between the bank and the thin layer, and a drain electrode formed on the reverse surface of the base layer, wherein a two-dimensional electron gas layer is formed between the source and drain electrodes in parallel with the heterojunction.

Abstract: A semiconductor device having a high breakdown and capable of operating with a large current is realized using GaN-based compound semiconductors which exhibit good electric characteristics. Particularly, a semiconductor material having a larger band gap than semiconductor materials forming other semiconductor layers, for example, AlGaN is used for a semiconductor layer immediately below a gate electrode to realize a power device of vertical structure which comprises GTO or IGBT.

Abstract: The present invention provides a semiconductor device as an FET integrated object having a small effective area, a small ON resistance during operation, a high voltage resistance, and capable of large-current drive. This device comprises one or more FET's each having a gate electrode, a source electrode, and a drain electrode, and arranged side by side on a single plane to constitute a first block which is stacked on a second block having a configuration identical to the first block, wherein the gate electrode, the source electrode, and the drain electrode of the FET(s) of the first block are directly joined with the gate electrode, the source electrode, and the drain electrode of the FET(s) of the second block, respectively.

Abstract: A GaN-based Schottky diode includes a sapphire substrate on which are formed a GaN buffer layer, an n+-type GaN layer, and an n-type GaN layer that has a surface portion thereof shaped to form a protrusion having an upper face with which a Ti electrode forms a Schottky junction and a side face with which a Pt electrode forms a Schottky junction through an Al0.2Ga0.8N layer. A cathode electrode constituted by a TaSi layer forms an ohmic junction with the n+-type GaN layer. The Ti and Pt electrodes constitute a combined anode electrode contributing to increasing a withstand voltage of and decreasing an on-voltage of the Schottky diode.

Abstract: GaN-based FET has a sapphire substrate of about 50 nm thick on which an n-type GaN electron transit layer and an Al0.2Gao0.8N electron supply layer are formed, together with n+-type GaN contact regions sandwiching the electron transit and supply layers therebetween. On the entire faces of these layer and regions is formed a polyimide interlayer insulating film of about 3000 nm thick that is formed with contact holes in which source, drain and gate electrodes are formed, each of which is comprised of a TaSi/Au layer and about 5000 nm in thickness. The source and drain electrodes are ohmic-connected to the n+-type GaN contact regions and the gate electrode is in contact with an SiO2 gate insulating film.

Abstract: A GaN-based high electron mobility transistor (HEMT) has an undoped GaN layer where a two-dimensional electron gas layer is formed, the undoped GaN layer having a high electric resistivity enabling a pinch-off state to be obtained even when the gate bias voltage is 0 V. The GaN-based HEMT comprises a semi-insulating substrate on which a GaN buffer layer is formed. An undoped GaN layer is disposed on the GaN buffer layer and has an electric resistivity of not less than 1×106 &OHgr;/cm2. An undoped AlGaN layer is disposed on the undoped GaN layer via a heterojunction such that an undercut portion is formed therebetween. An n-type GaN layer is further disposed in such a manner as to bury side portions of the undoped AlGaN layer and the undercut portion. The individual layers thus form a layered structure. A gate electrode G is formed on the undoped AlGaN layer, and a source electrode S and a drain electrode D are formed on the n-type GaN layer.

Abstract: A GaN-based semiconductor device made of GaN-based semiconductor materials includes a bank made of a first undoped material and formed on a base layer, a thin layer made of a second undoped material having higher band-gap energy than the first undoped material and formed on a side wall surface of the bank, the thin layer having a heterojunction with the first undoped material, a source electrode formed on the bank so as to extend beyond the heterojunction between the bank and the thin layer, and a drain electrode formed on the reverse surface of the base layer, wherein a two-dimensional electron gas layer is formed between the source and drain electrodes in parallel with the heterojunction.

Abstract: Disclosed is a GaN-based light emitting device which emits a high-luminance light and can emit lights of a wavelength range from ultraviolet to infrared and can emit white light. The GaN-based light emitting device comprises an active layer formed of a GaN-based compound semiconductor which includes N and at least one of As, P and Sb. The GaN-based compound semiconductor preferably has a composition expressed by GaN1-x-yAsyPx where x and y are values which are not zero at the same time and satisfy 0<x+y<1.

Abstract: The present invention provides a semiconductor device as an FET integrated object having a small effective area, a small ON resistance during operation, a high voltage resistance, and capable of large-current drive. This device comprises one or more FET's each having a gate electrode, a source electrode, and a drain electrode, and arranged side by side on a single plane to constitute a first block which is stacked on a second block having a configuration identical to the first block, wherein the gate electrode, the source electrode, and the drain electrode of the FET(s) of the first block are directly joined with the gate electrode, the source electrode, and the drain electrode of the FET(s) of the second block, respectively.

Abstract: A GaN-based high electron mobility transistor (HEMT) has an undoped GaN layer where a two-dimensional electron gas layer is formed, the undoped GaN layer having a high electric resistivity enabling a pinch-off state to be obtained even when the gate bias voltage is 0 V. The GaN-based HEMT comprises a semi-insulating substrate on which a GaN buffer layer is formed. An undoped GaN layer is disposed on the GaN buffer layer and has an electric resistivity of not less than 1×106 &OHgr;/cm2. An undoped AlGaN layer is disposed on the undoped GaN layer via a heterojunction such that an undercut portion is formed therebetween. An n-type GaN layer is further disposed in such a manner as to bury side portions of the undoped AlGaN layer and the undercut portion. The individual layers thus Ad form a layered structure. A gate electrode G is formed on the undoped AlGaN layer, and a source electrode S and a drain electrode D are formed on the n-type GaN layer.

Abstract: A vertical field effect transistor having an MES-type structure high in withstand voltage and capable of high current operation is realized through effective use of GaN-type semiconductors. Specifically, a source electrode and a drain electrode are formed on the top and the bottom of a GaN-type semiconductor multilayer film, respectively, to realize the vertical-structured field effect transistor. The field effect transistor has a device structure in which an n−-GaN layer (first semiconductor layer) of low carrier concentration, constituting the source-to-drain current path, is provided with an n+-GaN layer (fourth semiconductor layer) via an undoped i-GaN layer (second semiconductor layer), a p+-GaN layer, and a p−-GaN layer (third semiconductor layer). Then, an n+-GaN layer (fifth semiconductor layer) for constituting a channel layer is formed thinly in the top of the n−-GaN layer beneath a gate electrode.

Abstract: A semiconductor device having a high breakdown and capable of operating with a large current is realized using GaN-based compound semiconductors which exhibit good electric characteristics. Particularly, a semiconductor material having a larger band gap than semiconductor materials forming other semiconductor layers, for example, AlGaN is used for a semiconductor layer immediately below a gate electrode to realize a power device of vertical structure which comprises GTO or IGBT.

Abstract: A process of forming a high-resistance GaN crystal layer which is useful in producing a GaN FET. The high-resistance GaN crystal layer is formed by doping a GaN crystal with one or more acceptor-type impurities selected from the group consisting of C, Mg and Zn during epitaxial growth thereof. Specifically, during the epitaxial growth of the GaN crystal, the GaN crystal is doped with Mg or Zn in an atmosphere of hydrogen at a temperature of 600° C. or higher, or the GaN crystal is doped with Mg or Zn at a concentration of 1×1017 cm−3 or higher and then is doped with C at a concentration of 1×1018 cm−3 or higher. The GaN layer may be ion-implanted with an acceptor such as C, Mg or Zn or with a donor such as Si, to control the carrier density and thus the threshold value.

Abstract: A device made of a III-V nitride compound semiconductor comprising a substrate of sapphire, a Si single crystal, a GaAs single crystal, or a GaP single crystal; a GaN single crystal film with a thickness not greater than 3 nm formed on the substrate; and at least one layer of a III-V nitride compound semiconductor formed on the GaN single crystal film. Also a device made of a III-V nitride compound semiconductor comprising a Si single crystal substrate having a natural oxide film; a SiOn film formed by partially nitriding the natural oxide film; and a layer of a III-V nitride compound semiconductor formed on the SiON film.

Abstract: In a method of selectively growing a crystal of a compound semiconductor layer which is composed of gallium and arsenic, a selective growth is selectively carried out on a substrate by using a combination of metallic gallium and a reactive gas, such as trisdimethylminoarsine, which includes a metallic compound of arsenic specified by at least one amine. The combination may includes organometallic gallium, such as trimethylgallium, triethylgallium instead of the metallic gallium. Such a combination serves to selectively deposit the compound semiconductor layer only on an exposed portion uncovered with a mask. Any other compound semiconductor layer may be selectively deposited on the exposed portion. The exposed portion may be composed of GaAs, AlGaAs, or InGaAs.

Abstract: A method of growing a single semiconductor crystal with a flat top. In order to grow a single flat top crystal, the InP crystal is pulled up after the temperature drop of the melt has almost stopped, at a point in time when a meniscus at the interface of solid-liquid can be seen over the whole circumference of the surface of the melt. This prevents a facet from appearing at the shoulder portion of the crystal, thus reducing the generation of twin crystals and drastically improves retension of single crystal formation.

Abstract: Disclosed is a method of growing a single crystal of a compound semiconductor, in which a compound semiconductor material is loaded in a vertical crucible and the compound semiconductor material is converted into a single crystal by utilizing a seed disposed in the center of the bottom portion of the vertical crucible.

Abstract: A method and an apparatus for growing a crystal of a compound semiconductor, in which a heater, used to heat a boat for growing the semiconductor crystal, is disposed around an ampule containing the boat, and a melt of the compound semiconductor, which is prepared in the boat, is freezed gradually at a predetermined temperature gradient including the freezing point of the melt, from a crystal growth starting end of the boat to a crystal growth terminating end thereof, whereby a single crystal or a polycrystal is grown. At the start of crystal growth, a crystalline nucleus is formed by periodically changing the temperature of the crystal growth starting end of the boat, in descending and ascending modes, within a temperature range lower than the melting point of the compound semiconductor, after once lowering the temperature of the starting end to a level lower than the melting point by means of a heater block opposed to the starting end.