Patents by Inventor Sen Zhang

Sen Zhang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12382680
    Abstract: A laterally diffused metal-oxide-semiconductor (LDMOS) device and a method for fabricating the LDMOS device are disclosed. The device includes: a substrate (101) having a second conductivity type; a drift region (102) that has a first conductivity type and is disposed on the substrate (101), wherein the first conductivity type is opposite to the second conductivity type; a plurality of layers of doped structures disposed in the drift region (102), each layer of the doped structure comprising at least one doped bar (105) extending in a lengthwise direction of a conductive channel; and a plurality of doped polysilicon pillars (106) disposed in the drift region (102) so as to extend downward through the doped bar (105) of at least one of the layer of doped structures, wherein ions doped in the doped polysilicon pillars (106) and ions doped in the doped bar have opposite conductivity types.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: August 5, 2025
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Jingchuan Zhao, Nailong He, Sen Zhang, Zhili Zhang, Hao Wang
  • Patent number: 12382675
    Abstract: The semiconductor device comprises a high-voltage device region, a low-voltage device region, and an isolation region. It further comprises a drift region, a second conductivity type well region, an isolation well region, an isolation structure, a power device source region, and a power device drain region. The drift region is disposed in the high-voltage device region. The second conductivity type well region is disposed in the isolation region and extends to the low-voltage device region. The isolation well region is disposed in the drift region and separates the drift region into a high-voltage drift region and a power device drift region. The isolation structure is disposed in the isolation well region. The power device source region is disposed in the isolation region and located in the second conductivity type well region, and the power device drain region is disposed in the power device drift region.
    Type: Grant
    Filed: April 6, 2023
    Date of Patent: August 5, 2025
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Teng Liu, Nailong He, Lihui Gu, Sen Zhang, Wentong Zhang
  • Publication number: 20250182397
    Abstract: A three-dimensional (3D) model generation method includes obtaining, based on a missing region of an initial 3D model of a target object, a camera pose sequence for performing photographing on the target object, where the initial 3D model is obtained by performing 3D modeling based on a first image sequence, and the first image sequence is obtained by performing photographing around the target object; obtaining a second image sequence, where the second image sequence is an image sequence obtained by performing photographing on the target object based on the camera pose sequence; and filling the missing region of the initial 3D model based on the second image sequence to generate a target 3D model.
    Type: Application
    Filed: February 12, 2025
    Publication date: June 5, 2025
    Inventors: Dawei Cao, Bo Cai, Sen Zhang, Ziya Xu
  • Publication number: 20250176230
    Abstract: The semiconductor device comprises a high-voltage device region, a low-voltage device region, and an isolation region. It further comprises a drift region, a second conductivity type well region, an isolation well region, an isolation structure, a power device source region, and a power device drain region. The drift region is disposed in the high-voltage device region. The second conductivity type well region is disposed in the isolation region and extends to the low-voltage device region. The isolation well region is disposed in the drift region and separates the drift region into a high-voltage drift region and a power device drift region. The isolation structure is disposed in the isolation well region. The power device source region is disposed in the isolation region and located in the second conductivity type well region, and the power device drain region is disposed in the power device drift region.
    Type: Application
    Filed: April 6, 2023
    Publication date: May 29, 2025
    Applicant: CSMC TECHNOLOGIES FAB2 CO.,LTD.
    Inventors: Teng LIU, Nailong HE, Lihui GU, Sen ZHANG, Wentong ZHANG
  • Publication number: 20250145548
    Abstract: The present disclosure provides for hybrid catalysts, methods of converting CO2 to C2 products (e.g., ethylene), systems for converting CO2 to C2 products (e.g., ethylene), and the like. The hybrid catalyst of the present disclosure effectively uses two steps of converting CO2 to ethylene in a single hybrid catalyst.
    Type: Application
    Filed: August 28, 2024
    Publication date: May 8, 2025
    Inventors: Sen Zhang, Zhouyang Yin, Long Qi, Wenyu Huang, Jiaqi Yu
  • Patent number: 12272749
    Abstract: Disclosed are a laterally diffused metal oxide semiconductor device and a method for preparing the same. The device includes a substrate (101) of a first conductivity type, a drift region (102) of a second conductivity type, a longitudinal floating field plate array and a plurality of implantation regions (103) of the first conductivity type. The drift region is located in the substrate of the first conductivity type. The longitudinal floating field plate array includes a plurality of longitudinal floating field plate structures (104) arranged at intervals in rows and columns. Each longitudinal floating field plate structures includes a dielectric layer (1041) disposed on an inner surface of a trench and a conductive layer (1042) filling the trench. The plurality of implantation regions are located in the drift region of, each implantation region is located between two adjacent longitudinal floating field plate structures in each row.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: April 8, 2025
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Jingchuan Zhao, Zhili Zhang, Sen Zhang
  • Patent number: 12260264
    Abstract: This application relates to the field of cloud computing, and specifically, to a method for providing an edge service for a terminal by using a resource of an edge resource cluster in a cloud computing system. The cloud computing system includes a central resource cluster and at least one edge resource cluster. The method includes: a management node deployed in the central resource cluster determines a target execution node based on an edge service application range that is specified by a tenant or that is determined by the management node based on information about a tenant; the target execution node determines, according to an edge service policy sent by the management node, a target edge node from at least one edge node deployed in the at least one edge resource cluster; and the target execution node further forwards an edge service request to the target edge node.
    Type: Grant
    Filed: December 15, 2021
    Date of Patent: March 25, 2025
    Assignee: Huawei Cloud Computing Technologies Co., Ltd.
    Inventors: Nannan Wang, Zilin Wu, Sen Zhang
  • Patent number: 12249645
    Abstract: A laterally diffused metal-oxide-semiconductor (LDMOS) device and a method of manufacturing the LDMOS device are disclosed. The method includes: obtaining a substrate with a drift region formed thereon, the drift region having a first conductivity type and disposed on the substrate of a second conductivity type; etching the drift region to form therein a sinking structure, the sinking structure includes at least one of an implanting groove and an implanting hole; implanting ions of the second conductivity type at the bottom of the sinking structure; forming a buried layer of the second conductivity type by causing diffusion of the ions of the second conductivity type using a thermal treatment; and filling an electrical property modification material into the sinking structure, the electrical property modification material differs from the material of the drift region.
    Type: Grant
    Filed: May 26, 2020
    Date of Patent: March 11, 2025
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Zhili Zhang, Jingchuan Zhao, Sen Zhang
  • Publication number: 20250076468
    Abstract: The present invention discloses a solid-state LiDAR device and a scanning method based on a tunable laser array. The array sequentially emits laser beams of different wavelengths, collimated by a collimating lens, and passes through a beam splitter. The beams are then diffracted by a blazed grating and focused by the first focusing lens onto the focal plane of the transmitting lens, and then emitted through the transmitting lens as collimated beams in different directions for wide area scanning. The optical receiving path uses the reversed coaxial system, where the received light returns to the beam splitter, redirects to the second focusing lens, and is finally focused on the detector. This invention incorporates tunable laser arrays, optical systems and dispersion devices to realize a solid-state wide-area scanning LiDAR device without moving parts, offering a wide scanning range, small size and fast scanning speed.
    Type: Application
    Filed: November 20, 2024
    Publication date: March 6, 2025
    Inventors: Jianjun HE, Kai CHANG, Sen ZHANG, Jiajun HU
  • Patent number: 12230693
    Abstract: A semiconductor device and a manufacturing method therefor. The semiconductor device comprises: a semiconductor substrate. A first drift region is formed in the semiconductor substrate. A gate structure is formed on the semiconductor substrate A part of the gate structure covers a part of the first drift region. A first trench is formed in the first drift region, and a drain region is formed in the semiconductor substrate at the bottom of the first trench.
    Type: Grant
    Filed: August 18, 2020
    Date of Patent: February 18, 2025
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Nailong He, Sen Zhang
  • Publication number: 20250054973
    Abstract: A winding single-sided region starting section of a first current collector, a surface facing the center of an electrode assembly is provided with a first protective layer and a surface facing away from the center of the electrode assembly is provided with a first active material layer; and for a winding single-sided region ending section of a second current collector, a surface facing away from the center of the electrode assembly is provided with a second protective layer, and a surface facing the center of the electrode assembly is provided with a second active material layer. A ratio of a unit area weight of the first protective layer to a unit area weight of the first active material layer is (0.03-0.75):1, and a ratio of a unit area weight of the second protective layer to a unit area weight of the second active material layer is (0.03-0.75):1.
    Type: Application
    Filed: October 21, 2024
    Publication date: February 13, 2025
    Applicant: Ningde Amperex Technology Limited
    Inventors: Weiyuan ZHOU, Sen ZHANG, Yajie LI
  • Publication number: 20250056834
    Abstract: A manufacturing method for a P-type laterally diffused metal oxide semiconductor device includes: forming a N-type buried layer in a substrate, forming a P-type region located on the N-type buried layer, and forming a mask layer located on the P-type region; patterning the mask layer to form at least two injection windows; performing N-type ion implantation by the at least two injection windows; forming an oxide layer; removing the mask layer; performing P-type ion implantation on the P-type region to form a P-type doped region; diffusing the P-type doped region to form a drift region and two P-type well regions, diffusing the high-voltage N-well doped region to form a high-voltage N-type well region, and diffusing the low-voltage N-well doped region to form a low-voltage N-type well region; and forming a source doped region, a drain doped region, and a gate.
    Type: Application
    Filed: November 30, 2022
    Publication date: February 13, 2025
    Inventors: Long ZHANG, Nailong HE, Yongjiu CUI, Sen ZHANG, Xiaona WANG, Feng LIN, Jie MA, Siyang LIU, Weifeng SUN
  • Publication number: 20240341311
    Abstract: A strain separation method for preventing and controlling early bolting of Angelica sinensis, and preparation of a microbial agent and use thereof, the strain is obtained by separation, purification and cultivation from rhizosphere soil of Angelica sinensis, and is identified as Bacillus spp. by Microbial 16S rDNA sequencing; the strain was deposited at China Center for Type Culture Collection on Jun. 24, 2021 under CCTCC NO: M 2021767; The Bacillus velezensis XG3 strain provided by the present invention can promote the seed germination of Angelica sinensis and delay the flowering of Arabidopsis thaliana for about 2 days; according to field test verification, the microbial agent can increase the root weight, root diameter and rootlet number of Angelica sinensis, can effectively prevent and control early bolting of Angelica sinensis.
    Type: Application
    Filed: June 26, 2024
    Publication date: October 17, 2024
    Applicant: NANJING UNIVERSITY OF CHINESE MEDICINE
    Inventors: Jinao DUAN, Pei LIU, Hui YAN, Weimeng FENG, Sheng GUO, Sen ZHANG
  • Patent number: 12119395
    Abstract: An insulated gate bipolar transistor, comprising an anode second conductivity-type region and an anode first conductivity-type region provided on a drift region; the anode first conductivity-type region comprises a first region and a second region, and the anode second conductivity-type region comprises a third region and a fourth region, the dopant concentration of the first region being less than that of the second region, the dopant concentration of the third region being less than that of the fourth region, the third region being provided between the fourth region and a body region, the first region being provided below the fourth region, and the second region being provided below the third region and located between the first region and the body region.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: October 15, 2024
    Assignees: SOUTHEAST UNIVERSITY, CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Long Zhang, Jie Ma, Yan Gu, Sen Zhang, Jing Zhu, Jinli Gong, Weifeng Sun, Longxing Shi
  • Publication number: 20240339734
    Abstract: An electrochemical device includes an electrode assembly. The electrode assembly includes a first electrode plate, a second electrode plate, and a separator. A plurality of first tabs are disposed on the first electrode plate. The separator is disposed between the first and second electrode plates. The first electrode plate, the separator, and the second electrode plate are stacked and wound. The first tabs are connected to a region of the first electrode plate other than first inner layers and first outer layers. The first inner layers include N layers along a direction from a start layer to an end layer of the first electrode plate. The first outer layers include M layers starting from the end layer of the first electrode plate along a direction from the end layer to the start layer of the first electrode plate, where M?1, and N?3.
    Type: Application
    Filed: June 21, 2024
    Publication date: October 10, 2024
    Applicant: Ningde Amperex Technology Limited
    Inventors: Sen ZHANG, ZhiFang DAI, Hai LONG, Qingwen ZHANG
  • Publication number: 20240295038
    Abstract: A metal-impregnated carbon material includes a mesoporous carbon matrix including a metal M. The metal M is bonded directly to the carbon matrix, M is bonded directly to an atom A that is bonded directly to the carbon matrix, or a combination thereof. At each occurrence, A is independently chosen from N, O, P, S, and B.
    Type: Application
    Filed: March 1, 2024
    Publication date: September 5, 2024
    Inventors: Long Qi, Wenyu Huang, Sen Zhang, Zhouyang Yin, Lun An, Kanika Lalit
  • Publication number: 20240222478
    Abstract: A reverse conducting lateral insulated-gate bipolar transistor includes a drift region formed on a substrate, a gate located on the drift region, an emitter region located on the drift region and close to one side of the gate, and a collector region located on the drift region and away from one side of the gate. Two or more N-well regions arranged at intervals are provided on the side of the drift region where the collector region is located. A P-well region is provided between the two or more N-well regions arranged at intervals; a P+ contact region is provided on the N-well region; an N+ contact region is provided on the P-well region; both the P+ contact region and the N+ contact region are conductively connected to a collector lead-out end.
    Type: Application
    Filed: January 24, 2022
    Publication date: July 4, 2024
    Inventors: Sen ZHANG, Yan GU, Siyu CHEN
  • Patent number: 12013961
    Abstract: Methods, systems, and computer-readable storage media for receiving a query request including authorization data and a query, the authorization data indicating a privilege level index, determining a set of row ranges based on the privilege level index and a row range table, the set of row ranges including one or more row ranges having a privilege level associated therewith in the row range table, providing an initial results set including one or more records of a data table that are determined to be responsive, determining a final results set including at least one record of the initial results set, the at least one record being included in the final results set in response to determining that the at least one record is included in a row range of the set of row ranges, and outputting the final results set as at least a portion of a query result.
    Type: Grant
    Filed: May 18, 2022
    Date of Patent: June 18, 2024
    Assignee: SAP SE
    Inventors: Sen Zhang, De-Li Xu, Zhi-Peng Dong, Jixiang Xv, Sheng Cheng, Ruiming Dang
  • Patent number: 12015025
    Abstract: A transient voltage suppression device includes: a substrate; a first conductive type well region including a first well and a second well; a second conductive type well region including a third well and a fourth well, the third well being disposed between the first well and the second well so as to isolate the first well and the second well, and the second well being disposed between the third well and the fourth well; a zener diode active region; a first doped region, provided in the first well; a second doped region, provided in the first well; a third doped region, provided in the second well; a fourth doped region, provided in the second well; a fifth doped region, provided in the zener diode active region; and a sixth doped region, provided in the zener diode active region.
    Type: Grant
    Filed: August 15, 2019
    Date of Patent: June 18, 2024
    Assignee: CSMC TECHNOLOGIES FAB2 CO., LTD.
    Inventors: Shikang Cheng, Yan Gu, Sen Zhang
  • Patent number: D1056577
    Type: Grant
    Filed: June 13, 2023
    Date of Patent: January 7, 2025
    Inventor: Sen Zhang