Abstract: A semiconductor device and a method of fabricating a semiconductor device provide high quality cylindrical capacitors. The semiconductor device includes a substrate defining a cell region and a peripheral circuit region, a plurality of capacitors in the cell region, and supports for supporting lower electrodes of the capacitors. The lower electrodes are disposed in a plurality of rows each extending in a first direction. A dielectric layer is disposed on the lower electrodes, and an upper electrode is disposed on the dielectric layer. The supports are in the form of stripes extending longitudinally in the first direction and spaced from each other along a second direction. Each of the supports engages the lower electrodes of a respective plurality of adjacent rows of the lower electrodes. Each one of the supports is also disposed at a different level in the device from the support that is adjacent thereto in the second direction.

Abstract: A backlight assembly includes: lamps; lamp holders each holding at least one of opposite ends of a corresponding one of the lamps, the lamp holders being electrically connected with external electrodes of the lamps; and a lower frame formed to partially cover the lamp holders such that the lower frame is formed in one unified body with the lamp holders.

Abstract: A liquid crystal display device includes a liquid crystal panel including a first substrate, a second substrate, and a liquid crystal layer disposed therebetween; and a backlight assembly including a plurality of lamps disposed in a first direction to provide light to the liquid crystal panel, and a plurality of lamp guides to fix the plurality of lamps, at least one of the lamp guides having a guide plate and a plurality of lamp fixing parts, wherein a first one of the lamp fixing parts is disposed on the guide plate at a lamp fixing part axis in a second direction perpendicular to the first direction, and wherein a second one of the lamp fixing parts is disposed on the guide plate space apart from the lamp fixing part axis.

Abstract: A backlight unit includes a plurality of lamps, a gripping device, and fasteners. The gripping device couples the ends of the plurality of lamps. The fasteners secure the lamps and gripping device to a frame of the backlight unit. A method of assembling a backlight display includes: aligning a cylindrical lamp with a flange of a gripping device; sliding the lamp past a flaring portion of a holding portion; and seating the lamp into the holding portion by pressing the lamp into a concave portion of the holding portion.

Abstract: A method of reworking a semiconductor substrate and a method of forming a pattern of semiconductor device using the same without damage to an organic anti-reflective coating (ARC) is provided. The method of reworking a semiconductor substrate includes forming a photoresist pattern on a substrate having the organic ARC formed thereon. An entire surface of the substrate having the photoresist pattern formed thereon may be exposed when a defect is present in the photoresist pattern. The entire-surface-exposed photoresist pattern may be removed by performing a developing process without damage to the organic ARC.

Abstract: A back light unit includes a plurality of lamps arranged at predetermined distances from each other, each lamp having a lamp tube provided with electrodes at both ends thereof. Common electrodes communicate with both ends of said plurality of lamps and contain a plurality of gripping members for accomodating each of said plurality of lamps. A plurality of releasable connectors fix the common electrodes to first and second lower structures formed below both ends of the plurality of lamps. Electrical connecting elements connect the common electrodes to an inverter.

Abstract: Provided are a nonvolatile memory device and a method of manufacturing the same. A floating gate electrode of the nonvolatile memory device may have a cross-shaped section as taken along a direction extending along a control gate electrode. The floating gate electrode may have an inverse T-shaped section as taken along a direction extending along an active region perpendicular to the control gate electrode. The floating gate electrode may include a lower gate pattern, a middle gate pattern and an upper gate pattern sequentially disposed on a gate insulation layer, in which the middle gate pattern is larger in width than the lower gate pattern and the upper gate pattern. A boundary between the middle gate pattern and the upper gate pattern may have a rounded corner.

Abstract: Provided is a method for forming patterns of a semiconductor device. According to the method, first mask patterns may be formed on a substrate, and second mask patterns may be formed on sidewalls of each first mask pattern. Third mask patterns may fill spaces formed between adjacent second mask patterns, and the second mask patterns may be removed. A portion of the substrate may then be removed using the first and third mask patterns as etch masks.

Abstract: Described is a method and system for measuring overlay of a semiconductor device. The method may include obtaining reference sample data and misaligned sample data from scattering data of a reference sample and misaligned samples, assigning reference fitting values based on the reference sample data and the misaligned sample data, collecting target wafer scattering data from a target wafer, evaluating a target wafer fitting value based on the reference sample data and the target wafer scattering data and comparing the target wafer fitting value with the reference fitting values to determine a target wafer misaligned value relating to the overlay between the first pattern and the second pattern of a target wafer.

Abstract: Methods of fabricating a semiconductor device are provided. Methods of forming a finer pattern of a semiconductor device using a buffer layer for retarding, or preventing, bridge formation between patterns in the formation of a finer pattern below resolution limits of a photolithography process by double patterning are also provided. A first hard mask layer and/or a second hard mask layer may be formed on a layer of a substrate to be etched. A first etch mask pattern of a first pitch may be formed on the second hard mask layer. After a buffer layer is formed on the overall surface of the substrate, a second etch mask pattern of a second pitch may be formed thereon in a region between the first etch mask pattern. The buffer layer may be anisotropically etched using the second etch mask pattern as an etch mask, forming a buffer layer pattern.

Abstract: The liquid crystal display module comprises a bottom cover having a plurality of lamps installed thereon and at least one or more of guide projection formed thereon; and a reflection sheet for reflecting light generated from the lamps and having a guide hole in order to be inserted in the guide projection.

Abstract: There are provided a semiconductor device having an overlay measurement mark, and a method of fabricating the same. The semiconductor device includes a scribe line region disposed on a semiconductor substrate. A first main scale layer having a first group of line and space patterns and a second group of line and space patterns is disposed on the scribe line region. Line-shaped second main scale patterns are disposed on space regions of the first group of the line and space patterns. Line-shaped vernier scale patterns are disposed on space regions of the second group of the line and space patterns. In the method, a first main scale layer having a first group of line and space patterns and a second group of line and space patterns is formed on a semiconductor substrate. Line-shaped second main scale patterns are formed on space regions of the first group of the line and space patterns. Line-shaped vernier scale patterns are formed on space regions of the second group of the line and space patterns.

Abstract: A method of detecting measurement errors in a measurement system includes: a) imaging a pattern, the imaged pattern including a plurality of critical dimension measurement dots, and b) automatically detecting a non-smooth connection of the plurality of the critical dimension measurement dots.

Abstract: Mask sets are provided which may be used to define a first pattern region that has a first pitch pattern and a second pattern region that has a second pitch pattern during the fabrication of a semiconductor device. These mask sets may include a first mask that has a first exposure region in which a first halftone pattern defines the first pattern region and a first screen region in which a first shield layer covers the second pattern region. These mask sets may further include a second mask that has a second exposure region in which a second halftone pattern defines the second pattern region and a second screen region in which a second shield layer covers the first pattern region. The second shield layer also extends from the second screen region to cover a portion of the second halftone pattern.

Abstract: In a method for forming a semiconductor device and a semiconductor device having an overlay mark, a first pattern for the semiconductor device is formed in a semiconductor device formation region of a semiconductor substrate and simultaneously in a first mark formation region of the semiconductor substrate. A second pattern for the semiconductor device is formed on a resultant structure in the semiconductor device formation region of the semiconductor substrate and simultaneously in a second mark formation region of the semiconductor substrate. The first and second patterns in the first and second mark formation regions, respectively, are inspected for misalignments using overlay marks formed to have shapes and sizes identical to those of real patterns in the semiconductor device formation region of the semiconductor substrate. By measuring misalignments of real patterns using the overlay marks, overlay mismatch between the semiconductor device formation region and the overlay mark may be prevented.

Abstract: In a method for forming a semiconductor device and a semiconductor device having an overlay mark, a first pattern for the semiconductor device is formed in a semiconductor device formation region of a semiconductor substrate and simultaneously in a first mark formation region of the semiconductor substrate. A second pattern for the semiconductor device is formed on a resultant structure in the semiconductor device formation region of the semiconductor substrate and simultaneously in a second mark formation region of the semiconductor substrate. The first and second patterns in the first and second mark formation regions, respectively, are inspected for misalignments using overlay marks formed to have shapes and sizes identical to those of real patterns in the semiconductor device formation region of the semiconductor substrate. By measuring misalignments of real patterns using the overlay marks, overlay mismatch between the semiconductor device formation region and the overlay mark may be prevented.

Abstract: A method for measuring dimensions of minute structures on a substrate include irradiating primary electrons onto the minute structures, and detecting secondary electrons generated from the minute structures. Image data of the minute structures is formed, and at least two measuring regions are determined over the minute structures using the image data. The dimensions of the minute structures corresponding to the measuring regions are calculated. The primary electrons are provided from an electron emission member to the minute structures, and the secondary electrons are converted into current signals and then imaged in a displaying member. An operation member calculates the dimensions of the minute structures corresponding to the measuring regions using the image data of the minute structures stored in a storage member and measurement data that is measured at the measuring regions.

Abstract: The liquid crystal display module comprises a bottom cover having a plurality of lamps installed thereon and at least one or more of guide projection formed thereon; and a reflection sheet for reflecting light generated from the lamps and having a guide hole in order to be inserted in the guide projection.

Abstract: In a method for forming a semiconductor device and a semiconductor device having an overlay mark, a first pattern for the semiconductor device is formed in a semiconductor device formation region of a semiconductor substrate and simultaneously in a first mark formation region of the semiconductor substrate. A second pattern for the semiconductor device is formed on a resultant structure in the semiconductor device formation region of the semiconductor substrate and simultaneously in a second mark formation region of the semiconductor substrate. The first and second patterns in the first and second mark formation regions, respectively, are inspected for misalignments using overlay marks formed to have shapes and sizes identical to those of real patterns in the semiconductor device formation region of the semiconductor substrate. By measuring misalignments of real patterns using the overlay marks, overlay mismatch between the semiconductor device formation region and the overlay mark may be prevented.

Abstract: A method of detecting measurement errors in a measurement system includes: a) imaging a pattern, the imaged pattern including a plurality of critical dimension measurement dots, and b) automatically detecting a non-smooth connection of the plurality of the critical dimension measurement dots.