Patents by Inventor Seon-Ho Han

Seon-Ho Han has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11863126
    Abstract: Disclosed is a phase shifter, which includes a signal generator that generates a first signal and a second signal having a phase orthogonal to a phase of the first signal, and outputs the first signal and the second signal, an operator that generates a first current and a second current, and amplifies the first current and the second current, and a signal converter converting a first digital signal and a second digital signal. The operator includes an input circuit converting the first signal and the second signal, a path selection circuit determining paths of the generated first current and the generated second current, and a cascode circuit buffering the first current and the second current. The operator sums the first current and the second current, controls a vector of the first current and a vector of the second current, and generates a voltage signal through an output load.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: January 2, 2024
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seon-Ho Han, Bon Tae Koo
  • Patent number: 11837996
    Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: December 5, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jang Hong Choi, Bon Tae Koo, Kyung Hwan Park, Min Park, Seon-Ho Han
  • Patent number: 11799424
    Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.
    Type: Grant
    Filed: January 26, 2022
    Date of Patent: October 24, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jang Hong Choi, Bon Tae Koo, Kyung Hwan Park, Min Park, Seon-Ho Han
  • Publication number: 20230318577
    Abstract: Disclosed is a phase shift circuit including an input circuit for generating first to fourth internal signals based on an in-phase signal, a complementary in-phase signal, a quadrature phase signal, and a complementary quadrature phase signal and a switching circuit for outputting first to fourth shift signals based on the first to fourth internal signals. The input circuit includes a first transistor connected between a ground node and a first node to operate based on the in-phase signal and the first bias signal, a second transistor connected between the ground node and a second node to operate based on the complementary in-phase signal and the first bias signal, a third transistor connected between the ground node and the first node to operate based on the second bias signal, and a fourth transistor connected between the ground node and the second node to operate based on the second bias signal.
    Type: Application
    Filed: March 13, 2023
    Publication date: October 5, 2023
    Inventors: Seon-Ho HAN, Bon Tae KOO
  • Publication number: 20230125872
    Abstract: Disclosed are a digital CDR circuit and a feedback loop circuit including the same. The digital CDR circuit includes a phase detector that receives an input signal and outputs a phase detection result signal corresponding to a determination result for a sampling time based on the input signal, a charge pump that receives the phase detection result signal and outputs an amplified signal obtained by multiplying the phase detection result signal by a gain, a loop filter that receives the amplified signal and filters the amplified signal to output a filtered signal, and a phase shift control code generator that generates a control signal for controlling a phase of a signal based on the filtered signal, and the input signal includes plural data signals and plural error signals, and the data signals and the error signals are digital signals which are quantized based on a signal magnitude.
    Type: Application
    Filed: August 4, 2022
    Publication date: April 27, 2023
    Inventors: Seon-Ho HAN, Young-Su KWON
  • Patent number: 11583200
    Abstract: An electronic device according to one embodiment of the present disclosure may include: a housing; an optical element unit which may be configured to emit light toward a user's body, receive light reflected from the user's body, and convert the received light into a first signal; an IC element which may be configured to convert the first signal provided from the optical element unit into a second signal, and provide the second signal to a main circuit board disposed in the housing; a first circuit board that may be disposed between the optical element unit and the IC element and may be electrically connected to the optical element unit and the IC element; and a second circuit board that may include at least one first opening in which the IC element is mounted. The housing may include at least one transparent region such that the light generated by the optical element unit is transmitted through the transparent region to an exterior of the housing.
    Type: Grant
    Filed: October 25, 2017
    Date of Patent: February 21, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seon-Ho Han, Tae-Gyun Kim, Jun-Hui Lee
  • Publication number: 20220302909
    Abstract: Disclosed is a phase demodulator, which includes a transmitter that outputs a reference signal to a target, a receiver that receives a target signal generated in response to the reference signal from the target, and a demodulation processor that demodulates the target signal, and the demodulation processor includes a phase controller that outputs a first phase signal based on the reference signal, a phase shifter that delays a phase of the first phase signal to output a first delayed signal, a mixer that outputs a first mixing signal based on the target signal and the first delay signal, and an amplifier that outputs a first feedback signal generated by amplifying the first mixing signal to the phase controller.
    Type: Application
    Filed: January 26, 2022
    Publication date: September 22, 2022
    Inventors: Jang Hong CHOI, Bon Tae KOO, Kyung Hwan PARK, Min PARK, Seon-Ho HAN
  • Publication number: 20210367337
    Abstract: Disclosed is a phase shifter, which includes a signal generator that generates a first signal and a second signal having a phase orthogonal to a phase of the first signal, and outputs the first signal and the second signal, an operator that generates a first current and a second current, and amplifies the first current and the second current, and a signal converter converting a first digital signal and a second digital signal. The operator includes an input circuit converting the first signal and the second signal, a path selection circuit determining paths of the generated first current and the generated second current, and a cascode circuit buffering the first current and the second current. The operator sums the first current and the second current, controls a vector of the first current and a vector of the second current, and generates a voltage signal through an output load.
    Type: Application
    Filed: May 21, 2021
    Publication date: November 25, 2021
    Inventors: Seon-Ho HAN, Bon Tae KOO
  • Patent number: 11061447
    Abstract: An electronic device is provided. The electronic device includes a housing including a first housing surface that faces a first side, a second housing surface that faces a second side, and a side surface that surrounds at least a portion of a space between the first housing surface and the second housing surface, a display arranged within the housing and including a first display surface including a display screen exposed through the first housing surface and a second display surface that faces the second side, a structure arranged between the second display surface and the second housing surface including a contact surface, the structure including a through-opening, and a sensor, at least a portion of which is arranged within the opening and which is arranged to detect at least a portion of light received from the outside of the housing after passing through the first housing surface and the display.
    Type: Grant
    Filed: June 2, 2020
    Date of Patent: July 13, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seon-Ho Han, Seung-Hyun Park, Jun-Hui Lee
  • Publication number: 20200293095
    Abstract: An electronic device is provided. The electronic device includes a housing including a first housing surface that faces a first side, a second housing surface that faces a second side, and a side surface that surrounds at least a portion of a space between the first housing surface and the second housing surface, a display arranged within the housing and including a first display surface including a display screen exposed through the first housing surface and a second display surface that faces the second side, a structure arranged between the second display surface and the second housing surface including a contact surface, the structure including a through-opening, and a sensor, at least a portion of which is arranged within the opening and which is arranged to detect at least a portion of light received from the outside of the housing after passing through the first housing surface and the display.
    Type: Application
    Filed: June 2, 2020
    Publication date: September 17, 2020
    Inventors: Seon-Ho HAN, Seung-Hyun PARK, Jun-Hui LEE
  • Patent number: 10705576
    Abstract: An electronic device is provided. The electronic device includes a housing including a first housing surface that faces a first side, a second housing surface that faces a second side, and a side surface that surrounds at least a portion of a space between the first housing surface and the second housing surface, a display arranged within the housing and including a first display surface including a display screen exposed through the first housing surface and a second display surface that faces the second side, a structure arranged between the second display surface and the second housing surface including a contact surface, the structure including a through-opening, and a sensor, at least a portion of which is arranged within the opening and which is arranged to detect at least a portion of light received from the outside of the housing after passing through the first housing surface and the display.
    Type: Grant
    Filed: February 25, 2019
    Date of Patent: July 7, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seon-Ho Han, Seung-Hyun Park, Jun-Hui Lee
  • Patent number: 10367569
    Abstract: Provided is a phase array receiver. A phase array receiver according to an embodiment of the present invention includes a plurality of antennas, a plurality of low-noise amplifiers, a plurality of phase shifters, a plurality of transconductors, and a frequency mixer. A plurality of low-noise amplifiers amplify RF signals received from the plurality of antennas. The plurality of phase shifters adjusts the phase of the RF signals to generate a plurality of RF phase adjustment signals. The plurality of transconductors convert a plurality of RF phase adjustment signals into a plurality of RF current signals based on the gain control signal. The frequency mixer converts a sum of the plurality of RF current signals into a mixed current signal. According to the inventive concept, the linearity of the signal processing may be improved and the area for the implementation of the phase array receiver may be reduced.
    Type: Grant
    Filed: March 14, 2018
    Date of Patent: July 30, 2019
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seon-Ho Han, Bon Tae Koo
  • Publication number: 20190187760
    Abstract: An electronic device is provided. The electronic device includes a housing including a first housing surface that faces a first side, a second housing surface that faces a second side, and a side surface that surrounds at least a portion of a space between the first housing surface and the second housing surface, a display arranged within the housing and including a first display surface including a display screen exposed through the first housing surface and a second display surface that faces the second side, a structure arranged between the second display surface and the second housing surface including a contact surface, the structure including a through-opening, and a sensor, at least a portion of which is arranged within the opening and which is arranged to detect at least a portion of light received from the outside of the housing after passing through the first housing surface and the display.
    Type: Application
    Filed: February 25, 2019
    Publication date: June 20, 2019
    Inventors: Seon-Ho HAN, Seung-Hyun PARK, Jun-Hui LEE
  • Patent number: 10261549
    Abstract: An electronic device is provided. The electronic device includes a housing including a first housing surface that faces a first side, a second housing surface that faces a second side, and a side surface that surrounds at least a portion of a space between the first housing surface and the second housing surface, a display arranged within the housing and including a first display surface including a display screen exposed through the first housing surface and a second display surface that faces the second side, a structure arranged between the second display surface and the second housing surface including a contact surface, the structure including a through-opening, and a sensor, at least a portion of which is arranged within the opening and which is arranged to detect at least a portion of light received from the outside of the housing after passing through the first housing surface and the display.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: April 16, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seon-Ho Han, Seung-Hyun Park, Jun-Hui Lee
  • Publication number: 20180359019
    Abstract: Provided is a phase array receiver. A phase array receiver according to an embodiment of the present invention includes a plurality of antennas, a plurality of low-noise amplifiers, a plurality of phase shifters, a plurality of transconductors, and a frequency mixer. A plurality of low-noise amplifiers amplify RF signals received from the plurality of antennas. The plurality of phase shifters adjusts the phase of the RF signals to generate a plurality of RF phase adjustment signals. The plurality of transconductors convert a plurality of RF phase adjustment signals into a plurality of RF current signals based on the gain control signal. The frequency mixer converts a sum of the plurality of RF current signals into a mixed current signal. According to the inventive concept, the linearity of the signal processing may be improved and the area for the implementation of the phase array receiver may be reduced.
    Type: Application
    Filed: March 14, 2018
    Publication date: December 13, 2018
    Inventors: Seon-Ho HAN, Bon Tae KOO
  • Publication number: 20180116532
    Abstract: An electronic device according to one embodiment of the present disclosure may include: a housing; an optical element unit which may be configured to emit light toward a user's body, receive light reflected from the user's body, and convert the received light into a first signal; an IC element which may be configured to convert the first signal provided from the optical element unit into a second signal, and provide the second signal to a main circuit board disposed in the housing; a first circuit board that may be disposed between the optical element unit and the IC element and may be electrically connected to the optical element unit and the IC element; and a second circuit board that may include at least one first opening in which the IC element is mounted. The housing may include at least one transparent region such that the light generated by the optical element unit is transmitted through the transparent region to an exterior of the housing.
    Type: Application
    Filed: October 25, 2017
    Publication date: May 3, 2018
    Inventors: Seon-Ho HAN, Tae-Gyun KIM, Jun-Hui LEE
  • Patent number: 9698738
    Abstract: A bandpass filter that provides a wide gain control range is provided. The bandpass filter performs channel filtering and gain control while maintaining the bandpass characteristic of the bandpass filter. The bandpass filter enables gain control for a wide signal amplitude range while maintaining performance characteristics, such as an out-of-band attenuation ratio capable of high linearity and good pass-band flatness.
    Type: Grant
    Filed: January 22, 2016
    Date of Patent: July 4, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seon-Ho Han, Cheon-Soo Kim, Nam Nguyen Hoai, Ki-Su Kim
  • Publication number: 20170045918
    Abstract: An electronic device is provided. The electronic device includes a housing including a first housing surface that faces a first side, a second housing surface that faces a second side, and a side surface that surrounds at least a portion of a space between the first housing surface and the second housing surface, a display arranged within the housing and including a first display surface including a display screen exposed through the first housing surface and a second display surface that faces the second side, a structure arranged between the second display surface and the second housing surface including a contact surface, the structure including a through-opening, and a sensor, at least a portion of which is arranged within the opening and which is arranged to detect at least a portion of light received from the outside of the housing after passing through the first housing surface and the display.
    Type: Application
    Filed: August 11, 2016
    Publication date: February 16, 2017
    Inventors: Seon-Ho HAN, Seung-Hyun PARK, Jun-Hui LEE
  • Publication number: 20160241214
    Abstract: A bandpass filter that provides a wide gain control range is provided. The bandpass filter performs channel filtering and gain control while maintaining the bandpass characteristic of the bandpass filter. The bandpass filter enables gain control for a wide signal amplitude range while maintaining performance characteristics, such as an out-of-band attenuation ratio capable of high linearity and good pass-band flatness.
    Type: Application
    Filed: January 22, 2016
    Publication date: August 18, 2016
    Inventors: Seon-Ho Han, Cheon-Soo Kim, Nam Nguyen Hoai, Ki-Su Kim
  • Patent number: 9378184
    Abstract: Disclosed are an accumulator for reducing nonlinearity of a data converter and a data weighted average device including the accumulator. According to the accumulator including a register configured to output input data according to a clock signal; a first adder configured to receive a digital input signal having any bit width and an output signal from the register to perform an add operation; a preset unit configured to output a preset value or a 0 value according to whether a carry of the first adder is generated; and a second adder configured to receive an output signal of the first adder and an output signal of the preset unit to perform the add operation and input the add operation to the register and the data weighted average device including the accumulator, it is possible to improve the nonlinearity occurring in the data converter by generating a number of DAC codes in addition to 2n DAC codes.
    Type: Grant
    Filed: March 29, 2013
    Date of Patent: June 28, 2016
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Seon-Ho Han, Hyun Kyu Yu