Abstract: The present invention relates to an integrated filter circuit for digitally controlling characteristics of inductor and capacitor to thereby produce a controlled resonant frequency. The integrated circuit includes a number of inductors being connected in series between a high frequency input node and a high frequency output node, a plurality of capacitors each connected to a connection node of said each inductors, a plurality of switches, each connected between each capacitor and a ground and a feedback control unit for controlling the switches by sensing an output signal from the high frequency output node to thereby selectively couple each capacitor to the ground through a selected switches based on the sensed output signal.

Abstract: The present invention relates to a ROM division method for reducing the size of a ROM in a direct digital frequency synthesizer (DDFS), which is used to synthesize a frequency in a communication system requiring fast frequency conversion. A ROM consuming most energy in the system, a modified Nicholas architecture is brought forth to reduce the size of ROM. In this modified Nicholas architecture, a ROM is divided into coarse ROM and fine ROM to convert phase to sine value. The present invention divides the coarse ROM and the fine ROM into quantized ROM and error ROM respectively. Then, value stored in each ROM is segmented in certain intervals and the minimum quantized value in each of the section is stored in the quantized ROM, while the difference between the original ROM value and the quantized ROM value is stored in the error ROM. This way, the size of a ROM can be reduced. Phase value inputted in a DDFS, a sine value is calculated by adding the four ROM values, i.e.