Patents by Inventor Seong-Il Kim

Seong-Il Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210181549
    Abstract: The present disclosure relates a privacy film and a display device including the privacy film. More specifically, by including a light collector including a plurality of first light blocking patterns arranged to be spaced apart from one another, an adhesive layer disposed on the light collector and having at least one first groove in at least a part overlapping the plurality of first light blocking patterns, and a light diffuser disposed on the adhesive layer and including a plurality of capsules, the privacy film and the display device including the privacy film can prevent light discharge efficiency of the privacy film from being degraded and be easily reworked.
    Type: Application
    Filed: December 11, 2020
    Publication date: June 17, 2021
    Applicant: LG DISPLAY CO., LTD.
    Inventors: Sooyoun KIM, SeokHo LEE, SEONG-IL KIM
  • Patent number: 11025171
    Abstract: A power converter having a Scott-T transformer includes a direct current to alternating current converter configured to have at least two multilevel converters converting input direct current power to alternating current power, a Scott-T transformer configured to operate in medium frequency of several hundreds of Hz to several tens of kHz, to transform a voltage level of the alternating current power from each of the at least two multilevel converters of the direct current to alternating current converter into three-phase alternating current power, and to output the three-phase alternating current power, and an alternating current to direct current converter configured to convert the three-phase alternating current power from the Scott-T transformer to direct current power.
    Type: Grant
    Filed: May 2, 2019
    Date of Patent: June 1, 2021
    Assignee: Hyundai Electric & Energy Systems Co., Ltd.
    Inventors: Young-Ho Park, Seung-Pyo Ryu, Soo-Nam Kim, Seong-Il Kim, Milovanovic Stefan, Dujic Drazen
  • Patent number: 11017399
    Abstract: An electronic device and a method of payment by the electronic device are provided. The electronic device includes a local wireless communication circuit, a first biometric sensor and a second biometric sensor, a security module configured to store payment information corresponding to a payment card, a processor electrically connected to the first biometric sensor, the second biometric sensor, the local wireless communication circuit, and the security module, and a memory electrically connected to the processor, wherein the memory is configured to store instructions that cause the processor to select at least one of the first biometric sensor or the second biometric sensor, based on a security policy of an issuer of the payment card or a security policy of the payment card, authenticate a user by using the selected biometric sensor, and if the authentication is successful, transmit the payment information to an external device through the local wireless communication circuit.
    Type: Grant
    Filed: July 28, 2017
    Date of Patent: May 25, 2021
    Inventors: Yong Seok Park, Seong Il Kim, In Ho Kim, Tae Yun Kim, Seung Won Oh, Ji Su Oh, Yong Wan Lee, You Na Lee, Dong Ho Jang, Jae Man Cho
  • Publication number: 20210125243
    Abstract: An electronic device is provided. The electronic device includes a communicator; a memory storing one or more instructions; and a processor electrically connected to the communicator and the memory, wherein the processor executes the one or more instructions to group a plurality of electronic devices into one group, control the communicator to receive cost information from at least one electronic device included in the group, sum the received cost information, distribute the summed cost information based on a number of the plurality of electronic devices, and control the communicator to transmit the distributed cost information to the plurality of electronic devices.
    Type: Application
    Filed: August 8, 2018
    Publication date: April 29, 2021
    Inventors: Won-jin HUR, Seon-jae KIM, Seong-il KIM, Jun-seong PARK, Min-woo LEE
  • Publication number: 20210083632
    Abstract: Provided is an amplification circuit for amplifying an input signal. The amplification circuit includes an input stage including an input matching circuit that receives the input signal and an input attenuation circuit that attenuates a gain for the input signal outside an operating frequency band of the amplification circuit, a transistor that amplifies the input signal provided from the input stage, and an output stage including an output matching circuit that receives a signal amplified by the transistor and an output attenuation circuit that attenuates the gain for the input signal outside the operating frequency band of the amplification circuit, and the input attenuation circuit includes a first resistor and a second resistor that are connected to a ground voltage, a first passive element connected between the input matching circuit and the second resistor, and a second passive element connected between the first passive element and the first resistor.
    Type: Application
    Filed: July 29, 2020
    Publication date: March 18, 2021
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Woojin CHANG, SEONG-IL KIM, Sang-Heung LEE, Jongmin LEE
  • Publication number: 20200186043
    Abstract: A power converter having a Scott-T transformer includes a direct current to alternating current converter configured to have at least two multilevel converters converting input direct current power to alternating current power, a Scott-T transformer configured to operate in medium frequency of several hundreds of Hz to several tens of kHz, to transform a voltage level of the alternating current power from each of the at least two multilevel converters of the direct current to alternating current converter into three-phase alternating current power, and to output the three-phase alternating current power, and an alternating current to direct current converter configured to convert the three-phase alternating current power from the Scott-T transformer to direct current power.
    Type: Application
    Filed: May 2, 2019
    Publication date: June 11, 2020
    Inventors: Young-Ho Park, Seung-Pyo Ryu, Soo-Nam Kim, Seong-Il Kim, Milovanovic Stefan, Dujic Drazen
  • Patent number: 10608102
    Abstract: Provided is a semiconductor device including a substrate in which an insulation layer is disposed between a first semiconductor layer and a second semiconductor layer, a through-hole penetrating through the substrate, the through-hole having a first hole penetrating through the first semiconductor layer and a second hole penetrating through the insulation layer and the second semiconductor layer from a bottom surface of the first hole, an epi-layer disposed inside the through-hole, a drain electrode disposed inside the second hole and contacting one surface of the epi-layer, and a source electrode and a gate electrode which are disposed on the other surface of the epi-layer.
    Type: Grant
    Filed: September 20, 2018
    Date of Patent: March 31, 2020
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Hokyun Ahn, Min Jeong Shin, Jeong Jin Kim, Hae Cheon Kim, Jae Won Do, Byoung-Gue Min, Hyung Sup Yoon, Hyung Seok Lee, Jong-Won Lim, Sungjae Chang, Hyunwook Jung, Kyu Jun Cho, Dong Min Kang, Dong-Young Kim, Seong-Il Kim, Sang-Heung Lee, Jongmin Lee, Hong Gu Ji
  • Patent number: 10530980
    Abstract: Provided is an apparatus for managing image data, by which the image data transferred to a mobile device from an image capturing device connected to the mobile device is managed. The apparatus may include a first controller located in a native layer for communicating with a java layer, a second controller located in a java layer for communicating with the native layer, and a plurality of ring-buffer type shared memories in which the image data transferred from the image capturing device is stored. The first controller may store the image data in the shared memory at a first state according to the order of the shared memories and may change the state information of the shared memory to a second state when the image data is completely stored. The second controller may read the image data stored in the shared memories at the second state according to the order of the shared memories and may change the state information of the shared memory to the first state when the image data is completely read.
    Type: Grant
    Filed: November 16, 2016
    Date of Patent: January 7, 2020
    Assignee: VAULT MICRO, INC.
    Inventors: Seong Il Kim, Yong Hoon Kim
  • Publication number: 20190278638
    Abstract: Provided is an image data management apparatus, by which the image data transferred to a mobile device from an image capturing device connected to the mobile device is managed. The apparatus may include a first controller located in a native layer for communicating with a java layer, a second controller located in a java layer for communicating with the native layer, and a shared memory in which the image data transferred from the image capturing device is stored. The first controller may store the image data transferred from the image capturing device in the shared memory when state information of the shared memory is at a first state, and change the state information of the shared memory to a second state when the image data is completely stored in the shared memory.
    Type: Application
    Filed: November 16, 2016
    Publication date: September 12, 2019
    Inventors: Seong Il KIM, Yong hoon KIM
  • Publication number: 20190215435
    Abstract: Provided is an apparatus for managing image data, by which the image data transferred to a mobile device from an image capturing device connected to the mobile device is managed. The apparatus may include a first controller located in a native layer for communicating with a java layer, a second controller located in a java layer for communicating with the native layer, and a plurality of ring-buffer type shared memories in which the image data transferred from the image capturing device is stored. The first controller may store the image data in the shared memory at a first state according to the order of the shared memories and may change the state information of the shared memory to a second state when the image data is completely stored. The second controller may read the image data stored in the shared memories at the second state according to the order of the shared memories and may change the state information of the shared memory to the first state when the image data is completely read.
    Type: Application
    Filed: November 16, 2016
    Publication date: July 11, 2019
    Inventors: Seong Il KIM, Yong Hoon KIM
  • Patent number: 10281795
    Abstract: A liquid crystal lens film structure can includes a first substrate; a second substrate opposite to the first substrate; an adhesive layer on the second substrate; and a liquid crystal lens film between the first substrate and the adhesive layer. The liquid crystal lens film includes a resin layer configured to include a plurality of concave portions and a plurality of liquid crystal portions configured to each include liquid crystal molecules filled in the respective concave portion. The adhesive layer comes in contact with the liquid crystal lens film.
    Type: Grant
    Filed: December 28, 2015
    Date of Patent: May 7, 2019
    Assignee: LG DISPLAY CO., LTD.
    Inventors: Seong-il Kim, Su Seok Choi, Jong Hoon Woo, Joong Ha Lee, Sang Hoon Oh
  • Patent number: 10256811
    Abstract: Provided is a cascode circuit including first and second transistors connected between a drain terminal and a source terminal in cascode form, a level sifter configured to change a voltage level of a switching control signal applied to a gate terminal and provide the changed switching control signal to a gate of the first transistor, a buffer configured to delay the switching control signal and provide the delayed switching control signal to a gate of the second transistor, and a first resistor connected between the level shifter and the gate of the first transistor.
    Type: Grant
    Filed: July 20, 2017
    Date of Patent: April 9, 2019
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Woojin Chang, Jong-Won Lim, Dong Min Kang, Dong-Young Kim, Seong-il Kim, Hae Cheon Kim, Jae Won Do, Byoung-Gue Min, Min Jeong Shin, Hokyun Ahn, Hyung Sup Yoon, Sang-Heung Lee, Jongmin Lee, Sungjae Chang, Yoo Jin Jang, Hyunwook Jung, Kyu Jun Cho, Hong Gu Ji
  • Publication number: 20190103483
    Abstract: Provided is a semiconductor device including a substrate in which an insulation layer is disposed between a first semiconductor layer and a second semiconductor layer, a through-hole penetrating through the substrate, the through-hole having a first hole penetrating through the first semiconductor layer and a second hole penetrating through the insulation layer and the second semiconductor layer from a bottom surface of the first hole, an epi-layer disposed inside the through-hole, a drain electrode disposed inside the second hole and contacting one surface of the epi-layer, and a source electrode and a gate electrode which are disposed on the other surface of the epi-layer.
    Type: Application
    Filed: September 20, 2018
    Publication date: April 4, 2019
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Hokyun AHN, Min Jeong SHIN, Jeong Jin KIM, Hae Cheon KIM, Jae Won DO, Byoung-Gue MIN, Hyung Sup YOON, Hyung Seok LEE, Jong-Won LIM, Sungjae CHANG, Hyunwook JUNG, Kyu Jun CHO, Dong Min KANG, Dong-Young KIM, SEONG-IL KIM, Sang-Heung LEE, Jongmin LEE, Hong Gu JI
  • Publication number: 20190081166
    Abstract: Provided is a gate-all-around device. The gate-all-around device includes a substrate, a pair of heterojunction source/drain regions provided on the substrate, a heterojunction channel region provided between the pair of heterojunction source/drain regions, and a pair of ohmic electrodes provided on the pair of heterojunction source/drain regions, respectively. Each of the pair of heterojunction source/drain regions includes a pair of two-dimensional electron gas layers. The pair of ohmic electrodes extends toward an upper surface of the substrate and pass through the pair of heterojunction source/drain regions, respectively.
    Type: Application
    Filed: July 6, 2018
    Publication date: March 14, 2019
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae Won DO, Dong Min KANG, Dong-Young KIM, SEONG-IL KIM, Hae Cheon KIM, Byoung-Gue MIN, Min Jeong SHIN, Hokyun AHN, Hyung Sup YOON, Sang-Heung LEE, Jongmin LEE, Jong-Won LIM, Sungjae CHANG, Yoo Jin JANG, Hyunwook JUNG, Kyu Jun CHO, Hong Gu JI
  • Patent number: 10134854
    Abstract: A high electron mobility transistor includes a substrate including a first surface and a second surface facing each other and having a via hole passing through the first surface and the second surface, an active layer on the first surface, a cap layer on the active layer and including a gate recess region exposing a portion of the active layer, a source electrode and a drain electrode on one of the cap layer and the active layer, an insulating layer on the source electrode and the drain electrode and having on opening corresponding to the gate recess region to expose the gate recess region, a first field electrode on the insulating layer, a gate electrode electrically connected to the first field electrode on the insulating layer, and a second field electrode on the second surface and contacting the active layer through the via hole.
    Type: Grant
    Filed: August 26, 2016
    Date of Patent: November 20, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Ho Kyun Ahn, Dong Min Kang, Yong-Hwan Kwon, Dong-Young Kim, Seong Il Kim, Hae Cheon Kim, Eun Soo Nam, Jae Won Do, Byoung-Gue Min, Hyung Sup Yoon, Sang-Heung Lee, Jong Min Lee, Jong-Won Lim, Hyun Wook Jung, Kyu Jun Cho
  • Publication number: 20180225846
    Abstract: Provided is a method of converting data format by which image data may be converted into texture data at high speed in a mobile. The method may include generating a Canvas, a Surface, a SurfaceTexture, and Texture from among objects provided by android system; drawing the image data on the Surface by using a function provided by the Canvas; and when the drawing is completed, converting the data drawn on the Surface into the texture data and storing the converted data in the Texture by using a function provided by the SurfaceTexture.
    Type: Application
    Filed: February 17, 2017
    Publication date: August 9, 2018
    Inventors: Seong Il KIM, Yong Hoon KIM
  • Publication number: 20180145684
    Abstract: Provided is a cascode circuit including first and second transistors connected between a drain terminal and a source terminal in cascode form, a level sifter configured to change a voltage level of a switching control signal applied to a gate terminal and provide the changed switching control signal to a gate of the first transistor, a buffer configured to delay the switching control signal and provide the delayed switching control signal to a gate of the second transistor, and a first resistor connected between the level shifter and the gate of the first transistor.
    Type: Application
    Filed: July 20, 2017
    Publication date: May 24, 2018
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Woojin CHANG, Jong-Won LIM, Dong Min KANG, Dong-Young KIM, Seong-il KIM, Hae Cheon KIM, Jae Won DO, BYOUNG-GUE MIN, Min Jeong SHIN, Hokyun AHN, Hyung Sup YOON, Sang-Heung LEE, JONGMIN LEE, Sungjae CHANG, Yoo Jin JANG, HYUNWOOK JUNG, Kyu Jun CHO, Hong Gu JI
  • Patent number: 9899226
    Abstract: Provided herein is a semiconductor device including a substrate; an active layer formed on top of the substrate; a protective layer formed on top of the active layer and having a first aperture; a source electrode, driving gate electrode and drain electrode formed on top of the protective layer; and a first additional gate electrode formed on top of the first aperture, wherein an electric field is applied to the active layer, protective layer and driving gate electrode due to a voltage applied to each of the source electrode, drain electrode and driving gate electrode, and the first additional gate electrode is configured to attenuate a size of the electric field applied to at least a portion of the active layer, protective layer and driving gate electrode.
    Type: Grant
    Filed: March 13, 2015
    Date of Patent: February 20, 2018
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Ho Kyun Ahn, Hae Cheon Kim, Jong Won Lim, Dong Min Kang, Yong Hwan Kwon, Seong Il Kim, Zin Sig Kim, Eun Soo Nam, Byoung Gue Min, Hyung Sup Yoon, Kyung Ho Lee, Jong Min Lee, Kyu Jun Cho
  • Patent number: 9837719
    Abstract: Provided herein is a patch antenna including a multilayered substrate on which a plurality of dielectric layers are laminated; at least one metal pattern layer disposed between the plurality of dielectric layers outside a central area of the multilayered substrate; an antenna patch disposed on an upper surface of the multilayered substrate and within the central area; a ground layer disposed on a lower surface of the multilayered substrate; a plurality of connection via patterns penetrating the plurality of dielectric layers to connect the metal pattern layer and the ground layer, and surrounding the central area; a transmission line comprising a first transmission line unit disposed on the upper surface of the multilayered substrate and located outside the central area, and a second transmission line unit disposed on the upper surface of the multilayered substrate and located within the central area; and an impedance transformer located below the second transmission line unit within the central area of the m
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: December 5, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Dong-Young Kim, Dong Min Kang, Seong-Il Kim, Hae Cheon Kim, Jae Won Do, Byoung-Gue Min, Ho Kyun Ahn, Hyung Sup Yoon, Sang-Heung Lee, Jong Min Lee, Jong-Won Lim, Yoo Jin Jang, Hyun Wook Jung, Kyu Jun Cho, Chull Won Ju
  • Patent number: 9780176
    Abstract: The present invention relates to a high reliability field effect power device and a manufacturing method thereof. A method of manufacturing a field effect power device includes sequentially forming a transfer layer, a buffer layer, a barrier layer and a passivation layer on a substrate, patterning the passivation layer by etching a first region of the passivation layer, and forming at least one electrode on the first region of the barrier layer exposed by patterning the passivation layer, wherein the first region is provided to form the at least one electrode, and the passivation layer may include a material having a wider bandgap than the barrier layer to prevent a trapping effect and a leakage current of the field effect power device.
    Type: Grant
    Filed: August 16, 2016
    Date of Patent: October 3, 2017
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jong Min Lee, Byoung-Gue Min, Hyung Sup Yoon, Dong Min Kang, Dong-Young Kim, Seong-Il Kim, Hae Cheon Kim, Jae Won Do, Ho Kyun Ahn, Sang-Heung Lee, Jong-Won Lim, Hyun Wook Jung, Kyu Jun Cho, Chull Won Ju