Patents by Inventor SEONG IN HWANG

SEONG IN HWANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150042896
    Abstract: A display panel includes an upper plate including a first substrate, a first electrode layer formed on an inner surface of the first substrate, and an absorptive polarizing film formed on an outer surface of the first substrate and having a first polarization axis, a lower plate including a second substrate, a second electrode layer formed on an inner surface of the second substrate, and a reflective polarizing film formed on an outer surface of the second substrate and having a second polarization axis perpendicular or parallel to the first polarization axis, an LC layer filled between the upper plate and the lower plate, and an LC driving power supply connected between the first electrode layer and the second electrode layer and configured to selectively provide an LC driving voltage to the LC layer changing a polarization direction of incident light in the LC layer.
    Type: Application
    Filed: July 9, 2014
    Publication date: February 12, 2015
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Won-yong LEE, Hyeong-sik CHOI, Ju-seong HWANG
  • Publication number: 20150031180
    Abstract: A method for fabricating vertical channel transistors includes forming a plurality of pillars which have laterally opposing both sidewalls, over a substrate; forming a gate dielectric layer on both sidewalls of the pillars; forming first gate electrodes which cover any one sidewalls of the pillars and shield gate electrodes which cover the other sidewalls of the pillars and have a height lower than the first gate electrodes, over the gate dielectric layer; and forming second gate electrodes which are connected with upper portions of sidewalls of the first gate electrodes.
    Type: Application
    Filed: October 10, 2014
    Publication date: January 29, 2015
    Inventors: Heung-Jae CHO, Eui-Seong HWANG, Eun-Shil PARK
  • Patent number: 8936982
    Abstract: A method for fabricating a semiconductor device includes etching a semiconductor substrate to form bulb-type trenches that define a plurality of active regions in the semiconductor substrate; forming a supporter in each of the bulb-type trenches; dividing each active region, of the plurality of active regions, into a pair of body lines by forming a trench through each active region; and forming a bit line in each body line of the pair of body lines.
    Type: Grant
    Filed: December 19, 2012
    Date of Patent: January 20, 2015
    Assignee: SK hynix Inc.
    Inventors: Heung-Jae Cho, Eui-Seong Hwang, Eun-Shil Park
  • Patent number: 8921930
    Abstract: A semiconductor device includes trenches defined in a substrate, buried bit lines partially filling the trenches, a first source/drain layer filling remaining portions of the trenches on the buried bit lines, stack patterns having a channel layer and a second source/drain layer stacked therein and bonded to the first source/drain layer, wherein the channel layer contacts with the first source/drain layer, and word lines crossing with the buried bit lines and disposed adjacent to sidewalls of the channel layer.
    Type: Grant
    Filed: December 31, 2013
    Date of Patent: December 30, 2014
    Assignee: SK Hynix Inc.
    Inventor: Eui-Seong Hwang
  • Patent number: 8912604
    Abstract: A semiconductor device includes body lines, formed substantially perpendicular to a substrate, and having recessed sidewalls, buried bit lines, buried in the recessed sidewalls, and including a metal silicide, and a barrier layer interposed between each of the buried bit lines and the body lines corresponding thereto, and containing germanium.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: December 16, 2014
    Assignee: SK Hynix Inc.
    Inventors: Ju-Hyun Myung, Eui-Seong Hwang, Eun-Shil Park, Tae-Yoon Kim
  • Patent number: 8906775
    Abstract: A method for fabricating a semiconductor device includes forming a first semiconductor wafer, in which a circuit part and a first bonding layer are stacked, on a first semiconductor substrate, forming a second semiconductor wafer, which includes structures and an insulating layer for gap-filling between the structures, on a second semiconductor substrate, the structures including a pillar and bit lines stacked therein, bonding the first semiconductor wafer with the second semiconductor wafer so that the first bonding layer faces the insulating layer, and separating the second semiconductor substrate from the bonded second semiconductor wafer.
    Type: Grant
    Filed: December 17, 2012
    Date of Patent: December 9, 2014
    Assignee: SK Hynix Inc.
    Inventors: Heung-Jae Cho, Eui-Seong Hwang, Tae-Yoon Kim, Kyu-Hyung Yoon
  • Patent number: 8907409
    Abstract: A semiconductor device includes semiconductor bodies formed substantially perpendicular to a semiconductor substrate, buried bit lines formed in the semiconductor bodies and including a metal silicide; and barrier layers formed under and over the buried bit lines and containing germanium.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: December 9, 2014
    Assignee: SK Hynix Inc.
    Inventors: Ju-Hyun Myung, Eui-Seong Hwang, Eun-Shil Park, Tae-Yoon Kim
  • Publication number: 20140308802
    Abstract: Described herein is a method and precursor composition for depositing a multicomponent film. In one embodiment, the method and composition described herein is used to deposit a germanium-containing film such as Germanium Tellurium, Antimony Germanium, and Germanium Antimony Tellurium (GST) films via an atomic layer deposition (ALD) and/or other germanium, tellurium and selenium based metal compounds for phase change memory and photovoltaic devices. In this or other embodiments, the Ge precursor used comprises trichlorogermane.
    Type: Application
    Filed: April 4, 2014
    Publication date: October 16, 2014
    Applicant: AIR PRODUCTS AND CHEMICALS, INC.
    Inventors: Manchao Xiao, Iain Buchanan, MOO-SUNG KIM, Sergei Vladimirovich Ivanov, Xinjian Lei, Cheol Seong Hwang, TAEHONG GWON
  • Patent number: 8860127
    Abstract: A method for fabricating vertical channel transistors includes forming a plurality of pillars which have laterally opposing both sidewalls, over a substrate; forming a gate dielectric layer on both sidewalls of the pillars; forming first gate electrodes which cover any one sidewalls of the pillars and shield gate electrodes which cover the other sidewalls of the pillars and have a height lower than the first gate electrodes, over the gate dielectric layer; and forming second gate electrodes which are connected with upper portions of sidewalls of the first gate electrodes.
    Type: Grant
    Filed: September 6, 2012
    Date of Patent: October 14, 2014
    Assignee: SK Hynix Inc.
    Inventors: Heung-Jae Cho, Eui-Seong Hwang, Eun-Shil Park
  • Publication number: 20140252776
    Abstract: A high-altitude wind power generation system with a cycloidal turbine and a motor-generator, and a method of operating the same. The system includes a buoyant apparatus configured to be inflated when buoyancy generating gas is injected therein; a cycloidal turbine configured to be placed under the buoyant apparatus, and comprise a rotary shaft arranged to be substantially horizontal to the ground, and a plurality of blades arranged along a circumferential direction of the rotary shaft while their pitch center lines are long extended to be parallel with a center line of the rotary shaft and are spaced apart from the rotary shaft at a preset distance as being arranged to be substantially perpendicular to a flowing direction of fluid blowing from a front, having pitch angles individually adjustable with respect to the pitch center line; and a motor-generator configured to connect with the rotary shaft of the cycloidal turbine.
    Type: Application
    Filed: October 22, 2012
    Publication date: September 11, 2014
    Applicant: KOREA AEROSPACE RESEARCH INSTITUTE
    Inventors: Wang Gu Kang, In Seong Hwang, Seung Jo Kim
  • Publication number: 20140124729
    Abstract: Provided are 3D non-volatile memory devices and methods of fabricating the same. A 3D non-volatile memory device according to an embodiment of the present invention includes a plurality of conductive lines, which are separated from one another in parallel; a plurality of conductive planes, which extend across the plurality of conductive lines and are separated from one another in parallel; and non-volatile data storage layer patterns, which are respectively arranged at regions of intersection at which the plurality of conductive lines and the plurality of conductive planes cross each others.
    Type: Application
    Filed: June 11, 2012
    Publication date: May 8, 2014
    Applicant: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Cheol Seong Hwang, Jun Yeong Seok
  • Publication number: 20140115083
    Abstract: The invention relates to a system, to a server apparatus, to a terminal apparatus, and to a recording medium for generating a user affinity-based address book, and to a method for generating a user affinity-based address book, which support a user so that the user may intuitively recognize an affinity with a number of other users whose contact information is registered in the address book of the user. The invention is implemented such that: that information on a user's address book is provided; the result of a determination on whether or not the same contact number is shared between the user address book and an address book of each person whose contact information is registered, and the duration and frequency of talks between the user and each person whose contact information is registered; and information on a social address book is generated based on the determined affinity.
    Type: Application
    Filed: June 28, 2012
    Publication date: April 24, 2014
    Applicant: SK PLANET CO., LTD
    Inventors: Kiwon Kwak, Eun Bok Lee, In Seong Hwang
  • Publication number: 20140110781
    Abstract: A semiconductor device includes trenches defined in a substrate, buried bit lines partially filling the trenches, a first source/drain layer filling remaining portions of the trenches on the buried bit lines, stack patterns having a channel layer and a second source/drain layer stacked therein and bonded to the first source/drain layer, wherein the channel layer contacts with the first source/drain layer, and word lines crossing with the buried bit lines and disposed adjacent to sidewalls of the channel layer.
    Type: Application
    Filed: December 31, 2013
    Publication date: April 24, 2014
    Applicant: SK hynix Inc.
    Inventor: Eui-Seong HWANG
  • Publication number: 20140097519
    Abstract: A method for fabricating a semiconductor device includes forming a first semiconductor wafer, in which a circuit part and a first bonding layer are stacked, on a first semiconductor substrate, forming a second semiconductor wafer, which includes structures and an insulating layer for gap-filling between the structures, on a second semiconductor substrate, the structures including a pillar and bit lines stacked therein, bonding the first semiconductor wafer with the second semiconductor wafer so that the first bonding layer faces the insulating layer, and separating the second semiconductor substrate from the bonded second semiconductor wafer.
    Type: Application
    Filed: December 17, 2012
    Publication date: April 10, 2014
    Applicant: SK HYNIX INC.
    Inventors: Heung-Jae CHO, Eui-Seong HWANG, Tae-Yoon KIM, Kyu-Hyung YOON
  • Publication number: 20140061745
    Abstract: A semiconductor device includes body lines, formed substantially perpendicular to a substrate, and having recessed sidewalls, buried bit lines, buried in the recessed sidewalls, and including a metal silicide, and a barrier layer interposed between each of the buried bit lines and the body lines corresponding thereto, and containing germanium.
    Type: Application
    Filed: March 13, 2013
    Publication date: March 6, 2014
    Applicant: SK hynix Inc.
    Inventors: Ju-Hyun MYUNG, Eui-Seong HWANG, Eun-Shil PARK, Tae-Yoon KIM
  • Publication number: 20140061746
    Abstract: A method for fabricating a semiconductor device includes etching a semiconductor substrate to form bulb-type trenches that define a plurality of active regions in the semiconductor substrate; forming a supporter in each of the bulb-type trenches; dividing each active region, of the plurality of active regions, into a pair of body lines by forming a trench through each active region; and forming a bit line in each body line of the pair of body lines.
    Type: Application
    Filed: December 19, 2012
    Publication date: March 6, 2014
    Applicant: SK HYNIX INC.
    Inventors: Heung-Jae CHO, Eui-Seong HWANG, Eun-Shil PARK
  • Publication number: 20140061850
    Abstract: A method for fabricating a semiconductor device includes forming active regions which are separated by a plurality of first trenches, forming supports which fill the first trenches; etching the active regions and defining second trenches which are shallower than the first trenches, forming spacers on sidewalls of the second trenches, etching bottoms of the second trenches and defining third trenches, forming punch-through preventing patterns which fill lower portions of the third trenches, etching sidewalls which are not protected by the punch-through preventing patterns and the spacers, and forming recessed sidewalls which face each other, and forming buried bit lines in the recessed sidewalls.
    Type: Application
    Filed: December 18, 2012
    Publication date: March 6, 2014
    Applicant: SK HYNIX INC.
    Inventors: Heung-Jae CHO, Eui-Seong HWANG, Eun-Shil PARK, Tae-Yoon KIM, Ju-Hyun MYUNG, Kyu-Hyung YOON
  • Publication number: 20140061778
    Abstract: A semiconductor device includes semiconductor bodies formed substantially perpendicular to a semiconductor substrate, buried bit lines formed in the semiconductor bodies and including a metal silicide; and barrier layers formed under and over the buried bit lines and containing germanium.
    Type: Application
    Filed: March 13, 2013
    Publication date: March 6, 2014
    Applicant: SK HYNIX INC.
    Inventors: Ju-Hyun MYUNG, Eui-Seong HWANG, Eun-Shil PARK, Tae-Yoon KIM
  • Patent number: 8643096
    Abstract: A semiconductor device includes trenches defined in a substrate, buried bit lines partially filling the trenches, a first source/drain layer filling remaining portions of the trenches on the buried bit lines, stack patterns having a channel layer and a second source/drain layer stacked therein and bonded to the first source/drain layer, wherein the channel layer contacts with the first source/drain layer, and word lines crossing with the buried bit lines and disposed adjacent to sidewalls of the channel layer.
    Type: Grant
    Filed: July 20, 2012
    Date of Patent: February 4, 2014
    Assignee: SK Hynix Inc.
    Inventor: Eui-Seong Hwang
  • Patent number: 8609491
    Abstract: A method for fabricating a semiconductor device includes etching a substrate to form trenches that separate active regions, forming an insulation layer having an opening to open a portion of a sidewall of each active region, forming a silicon layer pattern to gap-fill a portion of each trench and cover the opening in the insulation layer, forming a metal layer over the silicon layer pattern, and forming a metal silicide layer as buried bit lines, where the metal silicide layer is formed when the metal layer reacts with the silicon layer pattern.
    Type: Grant
    Filed: June 6, 2011
    Date of Patent: December 17, 2013
    Assignee: Hynix Semiconductor Inc.
    Inventor: Eui-Seong Hwang