Abstract: An apparatus for processing natural language according to an embodiment includes a collection module that collects documents having tags, a parsing module that extracts text from the collected documents and extracts tag-related information on the tag surrounding each extracted text, and a preprocessing module that generates tokens of a preset unit by tokenizing each extracted text, generates token position information for each token in full text of the document, and sets the token and the token position information as training data in matching with the tag-related information.

Abstract: A lighting device including at least one light emitter to emit blue light, a green phosphor having an emission peak in a range of 500 nm to 550 nm, a yellow phosphor having an emission peak in a range of 550 nm to 600 nm, and a red phosphor having an emission peak in a range of 600 nm to 650 nm, in which the yellow phosphor and the red phosphor have different full widths at half maximum, and the full width at half maximum of the yellow phosphor is longer than that of the red phosphor, and, in an emission spectrum, an intensity of light emitted from the lighting device increases from 500 nm to 600 nm, and the intensity of light emitted from the lighting device at 700 nm is less than about 10% of the maximum intensity of light emitted from the lighting device.

Abstract: A wheel for reducing a resonance noise in a vehicle may include a cylindrical-shaped rim on which a tire is mounted, and waveguides mounted on the rim, disposed in a cavity which is a space between the rim and the tire, having a ‘U’-shaped internal passage through which a sound wave generated in the cavity enters, and configured to reflect the sound wave entering the internal passage to generate a sound wave having an inverse phase, wherein a center portion of the internal passage extends in an axial direction of the rim, and first and second end portions of the internal passage are connected to a center portion of the internal passage to allow the sound wave to propagate and extend in a circumferential direction of the rim.

Abstract: The present invention provides a battery safety test device includes: a mechanical switch element having one end connected to either a battery positive or negative electrode and the other end connected to an electronic switching element; the electronic switching element having one end connected to the mechanical switch element and the other end connected to the other of the battery positive or negative electrode; a voltage sensor for measuring a voltage of the battery after the mechanical switch element and the electronic switching element are turned on; and a current sensor for measuring a current of the battery after the mechanical switch element and the electronic switching element are turned on.

Abstract: A system-on-chip (SoC) may comprise a semi-conductor substrate; a first circuitry, disposed on the semi-conductor substrate, provided for a first neural processing unit (NPU) configured to perform operations of an artificial neural network model (ANN); a second circuitry, disposed on the semi-conductor substrate, provided for a second NPU configured to perform operations of an ANN model, each of the first NPU and the second NPU including a plurality of processing elements (PEs), the plurality of PEs including an adder, a multiplier, and an accumulator; and a clock signal supply circuit, disposed on the semi-conductor substrate, configured to output one or more clock signals, wherein a first clock signal among the one or more clock signals may be supplied to the first NPU, and a second clock signal among the one or more clock signals may be supplied to the second NPU.

Abstract: A system may comprise a neural processing unit (NPU) including a plurality of processing elements (PEs) capable of performing computations for at least one artificial neural network (ANN) model; and a switching circuit. The switching circuit may be configured to select one clock signal among a plurality of clock signals having different frequencies, and supply the selected clock signal to the NPU. The one clock signal may be selected based on a utilization rate of the plurality of PEs for a particular layer among a plurality of layers of the at least one ANN model.

Abstract: An embodiment provides a motor comprising: a stator; a rotor provided inside the stator; and a shaft coupled to the rotor, wherein the stator comprises a stator core, a coil wound around the stator coil, and an insulator provided between the stator core and the coil. The insulator comprises an upper insulator and a lower insulator, wherein an upper body of the upper insulator comprises: a first side wall portion; a second side wall portion provided spaced apart from the first side wall portion; and a first cover portion extending from an end portion of the first side wall portion and connected to an end portion of one side of the second side wall portion, wherein the number of a plurality of first grooves formed in the first side wall portion is different from the number of a plurality of second grooves formed in the second side wall portion.

Abstract: A system may comprise a neural processing unit (NPU) including a plurality of processing elements (PEs) capable of performing computations for at least one artificial neural network (ANN) model; and a switching circuit. The switching circuit may be configured to select one clock signal among a plurality of clock signals having different frequencies, and supply the selected clock signal to the NPU. The one clock signal may be selected based on a utilization rate of the plurality of PEs for a particular layer among a plurality of layers of the at least one ANN model.

Abstract: A system may comprise a neural processing unit (NPU) including at least one memory and a plurality of processing elements (PEs) capable of performing operations for at least one artificial neural network (ANN) model. The plurality of PEs may include an adder, a multiplier, and an accumulator. The plurality of PEs may include a first group of PEs configured to operate on a first portion of a clock signal and a second group of PEs configured to operate on a second portion of the clock signal.

Abstract: A light emitting device, comprising a substrate, a first emitter disposed on the substrate and comprising a first LED array including at least one first LED chip, a second emitter disposed on the substrate and comprising a second LED array including at least one second LED chip, and a resistor disposed on the substrate, the resistor being connected in series to the first emitter and connected in parallel to the second emitter, wherein the second emitter is connected in parallel to the first emitter and the resistor, and the first emitter and the second emitter emit light having different color temperatures, and wherein a ratio of a resistance offered by the first emitter and the resistor to a resistance offered by the second emitter is changed as a power change according to the dimming signal.

Abstract: A system-on-chip (SoC) may comprise a semi-conductor substrate; a first circuitry, disposed on the semi-conductor substrate, provided for a first neural processing unit (NPU) configured to perform operations of an artificial neural network model (ANN); a second circuitry, disposed on the semi-conductor substrate, provided for a second NPU configured to perform operations of an ANN model, each of the first NPU and the second NPU including a plurality of processing elements (PEs), the plurality of PEs including an adder, a multiplier, and an accumulator; and a clock signal supply circuit, disposed on the semi-conductor substrate, configured to output one or more clock signals, wherein a first clock signal among the one or more clock signals may be supplied to the first NPU, and a second clock signal among the one or more clock signals may be supplied to the second NPU.

Abstract: A lighting device includes a substrate having a plurality of flat portions and a non-flat portion disposed between the flat portions, a plurality of light emitting sources disposed on the substrate, a fluorescent substrate layer covering one or more light emitting sources and converting a wavelength of a light from the light emitting source, and a connection line disposed on the substrate and electrically connecting the light emitting sources adjacent to each other between the adjacent light emitting sources. The substrate has a first end and a second end are arranged at different distance from a central axis.

Abstract: The present invention may provide a motor including a stator including coils, a rotor disposed inside the stator, and a busbar disposed above the stator, wherein the stator includes a first unit stator core and a second unit stator core, the coils include a first unit coil and a second unit coil, the busbar includes a body and a plurality of terminals connected to the coils of the stator, the plurality of terminals include first terminals and second terminals, the first unit coil is wound around the first unit stator core, the second unit coil is wound around the second unit stator core, one end of the first unit coil and one end of the second unit coil are connected to the first terminals, and the other end of the first unit coil and the other end of the second unit coil are connected to the second terminals.

Abstract: According to an embodiment, provided is a motor which comprises: a shaft; a rotor coupled to the shaft; a stator disposed corresponding to the rotor; and a housing disposed on the outside of the stator. The stator includes: a stator core; an insulator coupled to the stator core; a plurality of projections extending from the lower end of the insulator; and a protruding portion disposed below the insulator and fixed to the housing. The plurality of projections are spaced apart from each other in the circumferential direction, and at least a portion of the protruding portion is disposed in the spaces formed between the plurality of projections.

Abstract: A neural processing unit (NPU) is proposed. The NPU may comprise a first circuit configured to perform operations for an artificial neural network (ANN) model, and arranged for a plurality of processing elements (PE) groups including a plurality of PEs, and a second circuit configured to operate as a clock divider configured to generate a plurality of clock signals having different phases, respectively, by dividing a source clock signal and provide the plurality of clock signals to the plurality of PE groups. A first clock signal of the plurality of clock signals may be provided to a first PE group of the plurality of PE groups, and a second clock signal of the plurality of clock signals may be provided to a second PE group of the plurality of PE groups.

Abstract: A neural processing unit may comprise a first circuit configured to perform operations for an artificial neural network (ANN) model, and arranged for a plurality of groups of processing elements (PEs) including a plurality of PEs; a second circuit arranged to output a plurality of clock signals to the first circuit; a third circuit configured to measure a ratio of peak power and average power of at least the first circuit; and a fourth circuit, arranged to dynamically calibrate a phase of at least one of the plurality of clock signals of the second circuit based on the ratio of peak power and average power measured in the third circuit.

Abstract: A lighting device includes a substrate having a plurality of flat portions and a non-flat portion disposed between the flat portions, a plurality of light emitting sources disposed on the substrate, a fluorescent substrate layer covering one or more light emitting sources and converting a wavelength of a light from the light emitting source, and a connection line disposed on the substrate and electrically connecting the light emitting sources adjacent to each other between the adjacent light emitting sources. The substrate has a first end and a second end are arranged at different distance from a central axis.

Abstract: A light emitting device including a first light source including a plurality of first light emitting structures and a first wavelength converter and configured to emit a first light, a second light source including a second light emitting structure and a second wavelength converter and configured to emit a second light, and a resistor member connected to the first light source and configured to distribute current to the first light emitting structures, in which a color temperature of the first light is configured to be higher than that of the second light, and the first light and second light are configured to have different light intensity.

Abstract: A neural processing unit (NPU) is proposed. The NPU may comprise a first circuit configured to perform operations for an artificial neural network (ANN) model, and arranged for a plurality of processing elements (PE) groups including a plurality of PEs, and a second circuit configured to operate as a clock divider configured to generate a plurality of clock signals having different phases, respectively, by dividing a source clock signal and provide the plurality of clock signals to the plurality of PE groups. A first clock signal of the plurality of clock signals may be provided to a first PE group of the plurality of PE groups, and a second clock signal of the plurality of clock signals may be provided to a second PE group of the plurality of PE groups.

Abstract: A system-on-chip (SoC) may comprise a semiconductor substrate; a first circuitry, disposed on the semiconductor substrate, provided for a first neural processing unit (NPU) configured to perform operations of an artificial neural network (ANN) model; a second circuitry, disposed on the semiconductor substrate, provided for a second NPU configured to perform operations of an ANN model; and a third circuitry, disposed on the semiconductor substrate, configured to generate a control signal to selectively output one or more clock signals, wherein each of the first NPU and the second NPU may include a plurality of processing elements (PEs), and the plurality of PEs may include an adder, a multiplier, and an accumulator, and wherein the one or more clock signals may include an original clock signal and one or more phase-delayed clock signals based on a phase of the original clock signal.