Abstract: A graphene device and an electronic apparatus including the same are provided. According to example embodiments, the graphene device includes a transistor including a source, a gate, and a drain, an active layer through which carriers move, and a graphene layer between the gate and the active layer. The graphene layer may be configured to function both as an electrode of the active layer and a channel layer of the transistor.

Abstract: The present invention relates to an austenitic light-weight high-strength steel with excellent properties of welds, and a method of manufacturing the same, the method including: (a) hot-rolling a steel including 20 wt % to 30 wt % of manganese (Mn), 6 wt % to 12 wt % of aluminum (Al), 0.6 wt % to 1.5 wt % of carbon (C), 0.3 wt % to 0.95 wt % of vanadium (V), and a remaining amount of iron (Fe) and other unavoidable impurities; (b) homogenizing the hot-rolled steel; and (c) aging the homogenized steel.

Abstract: Disclosed are memory devices including a two-dimensional (2D) material, methods of manufacturing the same, and methods of operating the same. A memory device may include a transistor, which includes graphene and 2D semiconductor contacting the graphene, and a capacitor connected to the transistor. The memory device may include a first electrode, a first insulation layer, a second electrode, a semiconductor layer, a third electrode, a second insulation layer, and a fourth electrode which are sequentially arranged. The second electrode may include the graphene, and the semiconductor layer may include the 2D semiconductor. Alternatively, the memory device may include first and second electrode elements, a graphene layer between the first and second electrode elements, a 2D semiconductor layer between the graphene layer and the first electrode element, and a dielectric layer between the graphene layer and the second electrode.

Abstract: Provided are a modified polyvinyl alcohol-based resin with an acrylic group introduced thereto and including a hydroxyl group formed during the introduction of the acrylic group, an adhesive including the modified polyvinyl alcohol-based resin having excellent adhesion, humidity resistance, and water resistance, an adhesive including a polyvinyl alcohol-based resin, and a compound having an epoxy group, and an acrylic group, a polarizing plate and an image display device including the adhesive. The adhesive for a polarizing plate according to an embodiment of the present invention has excellent adhesion, humidity resistance, and water resistance as well as having excellent solubility with respect to water and an increase in adhesion while physical properties of a typical polyvinyl alcohol-based resin are maintained.

Abstract: A graphene device including separated junction contacts and a method of manufacturing the same are disclosed. The graphene device is a field effect transistor (FET) in which graphene is used as a channel. A source electrode and a drain electrode do not directly contact the graphene channel, and junction contacts formed by doping semiconductor are separately disposed between the graphene channel and the source electrode and between the graphene channel and the drain electrode. Therefore, in an off state where a voltage is not applied to a gate electrode, due to a barrier between the graphene channel and the junction contacts, carriers may not move. As a result, the graphene device may have low current in the off state.

Abstract: A graphene device includes: a semiconductor substrate having a first region and a second region; a graphene layer on the first region, but not on the second region of the semiconductor substrate; a first electrode on a first portion of the graphene layer; a second electrode on a second portion of the graphene layer; an insulating layer between the graphene layer and the second electrode; and a third electrode on the second region of the semiconductor substrate. The semiconductor substrate has a tunable Schottky barrier formed by junction of the graphene layer and the semiconductor substrate.

Abstract: According to example embodiments, an electronic device includes: a semiconductor layer; a graphene directly contacting a desired (and/or alternatively predetermined) area of the semiconductor layer; and a metal layer on the graphene. The desired (and/or alternatively predetermined) area of the semiconductor layer include one of: a constant doping density, a doping density that is equal to or less than 1019 cm?3, and a depletion width of less than or equal to 3 nm.

Abstract: A memory device includes a graphene switching device having a source electrode, a drain electrode and a gate electrode. The graphene switching device includes a Schottky barrier formed between the drain electrode and a channel in a direction from the source electrode toward the drain electrode. The memory device need not include additional storage element.

Abstract: A switching device includes a semiconductor layer, a graphene layer, a gate insulation layer, and a gate formed in a three-dimensional stacking structure between a first electrode and a second electrode formed on a substrate.

Abstract: A method of transferring graphene includes patterning an upper surface of a substrate to form at least one trench therein, providing a graphene layer on the substrate, the graphene layer including an adhesive liquid thereon, pressing the graphene layer with respect to the substrate, and removing the adhesive liquid by drying the substrate.

Abstract: According to example embodiments, a field effect transistor includes a graphene channel layer on a substrate. The graphene channel layer defines a slit. A source electrode and a drain electrode are spaced apart from each other and arranged to apply voltages to the graphene channel layer. A gate insulation layer is between the graphene channel layer and a gate electrode.

Abstract: Inverter logic devices include a gate oxide on a back substrate, a first graphene layer and a second graphene layer separated from each other on the gate oxide, a first electrode layer and a first semiconductor layer separated from each other on the first graphene layer, a second electrode layer and a second semiconductor layer separated from each other on the second graphene layer, and an output electrode on the first and second semiconductor layers and configured to output an output signal. The first semiconductor layer is doped with a different type of impurities selected from n-type impurities and p-type impurities than the second semiconductor layer.

Abstract: An inverter device including a tunable diode device and a diode device that includes a control terminal connected to an input terminal of the inverter device, an anode terminal connected to a high-level voltage terminal, and a cathode terminal connected to an output terminal of the inverter device, wherein the diode device is configured to turn on or off according to a voltage applied to the control terminal.

Abstract: According to example embodiments, a field effect transistor includes a graphene channel layer on a substrate. The graphene channel layer defines a slit. A source electrode and a drain electrode are spaced apart from each other and arranged to apply voltages to the graphene channel layer. A gate insulation layer is between the graphene channel layer and a gate electrode.

Abstract: According to example embodiments, a tunneling field-effect transistor (TFET) includes a first electrode on a substrate, a semiconductor layer on a portion of the first electrode, a graphene channel on the semiconductor layer, a second electrode on the graphene channel, a gate insulating layer on the graphene channel, and a gate electrode on the gate insulating layer. The first electrode may include a portion that is adjacent to the first area of the substrate. The semiconductor layer may be between the graphene channel and the portion of the first electrode. The graphene channel may extend beyond an edge of at least one of the semiconductor layer and the portion of the first electrode to over the first area of the substrate.

Abstract: Example embodiments relate to a stacking structure having a material layer formed on a graphene layer, and a method of forming the material layer on the graphene layer. In the stacking structure, when the material layer is formed on the graphene layer by using an ALD method, an intermediate layer as a seed layer may be formed on the graphene layer by using a linear type precursor.

Abstract: A thin film structure includes a metal seed layer, and a method of forming an oxide thin film on a conductive substrate by using the metal seed layer is disclosed. The thin film structure includes a transparent conductive substrate, a metal seed layer that is deposited on the transparent conductive substrate, and a metal oxide layer that is deposited on the metal seed layer.

Abstract: According to example embodiments, a graphene switching devices has a tunable barrier. The graphene switching device may include a gate substrate, a gate dielectric on the gate substrate, a graphene layer on the gate dielectric, a semiconductor layer and a first electrode sequentially stacked on a first region of the graphene layer, and a second electrode on a second region of the graphene layer. The semiconductor layer may be doped with one of an n-type impurity and a p-type impurity. The semiconductor layer may face the gate substrate with the graphene layer being between the semiconductor layer and the gate substrate. The second region of the graphene layer may be separated from the first region on the graphene layer.

Abstract: A method of preparing graphene includes forming a silicon carbide thin film on a substrate, forming a metal thin film on the silicon carbide thin film, and forming a metal composite layer and graphene on the substrate by heating the silicon carbide thin film and the metal thin film.

Abstract: A touch sensor using a graphene diode and/or a touch panel including the touch sensor. The touch sensor includes a first sensing electrode configured to sense a touch; a first output line configured to transmit an electrical signal; and a first diode device including a first control terminal connected to the first sensing electrode, a first anode terminal connected to a voltage application unit, and a first cathode terminal connected to the first output line.