Abstract: A thin film transistor array panel is provided, which includes: a display cell array circuit including a plurality of gate lines, a plurality of data lines, a plurality of thin film transistors, and a plurality of pixel electrodes; a gate driving circuit supplying gate signals to the gate lines; and a signal line connected to the gate driving circuit and including first and second line segments separated from each other and a connection member connected to the first and second line segments through at least a contact hole exposing at least one of the first and the second line segments.

Abstract: A display device includes; a first substrate, a first pixel electrode disposed on the first substrate, a second pixel electrode disposed on the first substrate and neighboring the first pixel electrode, a first color filter disposed under the first pixel electrode, a second color filter disposed under the second pixel electrode and overlapping the first color filter in an area between the first pixel electrode and the second pixel electrode, and a data line including a first portion and a second portion respectively disposed on left and right sides of the area wherein the first and second color filters overlap.

Abstract: In accordance with one or more embodiments of the present invention, a driving portion of a display device is formed on the same plane as a display portion of a display device. The driving portion includes cumulative layers of a control electrode, a first insulating layer, a semiconductor layer, a second insulating layer, an input electrode, an output electrode, and an auxiliary layer on top of the layers. Thus, the transistors within the driving portion may be more compact, while possibly reducing the likelihood of a short circuit between the electrodes.

Abstract: A display device according to the present invention includes a first substrate, a driving portion formed on the first substrate, a plurality of signal lines formed on the first substrate to transmit signals to the driving portion, a second substrate facing the first substrate, and a conductive member formed on the second substrate, wherein the driving portion overlaps with the conductive member, and the signal lines are disposed at a position outside a region of overlap of the conductive member. Accordingly, the capacitances between the signal lines may be substantially the same.

Abstract: In an array substrate capable of improving the quality of displayed images and a method for manufacturing the array substrate, the array substrate includes a base substrate, a first conductive pattern including a gate line and a first light-blocking pattern, a semiconductor layer overlapping the light-blocking pattern, a second conductive pattern including a data line and a storage line overlapping the first light-blocking pattern, and a pixel electrode overlapping the storage line to form a storage capacitor. The first conductive pattern may further include a second light-blocking pattern overlapping the semiconductor layer which is formed under the data line. The first and second light-blocking patterns block light proceeding toward the semiconductor layer formed under the storage line and under the data line, respectively, so that the semiconductor layer may be prevented from being excited by light energy.

Abstract: Disclosed is a thin film transistor array panel. The panel includes a plurality of pixels arranged in the form of a matrix each with a pixel electrode and a switching element connected to the pixel electrode, and a plurality of gate lines connected to the switching elements and extending in the row direction. A pair of the gate lines are connected to pixels in each pixel row. A plurality of data lines are connected to the switching elements, and elongated in the column direction. Each data line is provided between two columns of the pixels. The respective data lines are horizontally bent between the two adjacent gate lines, and vertically extend between the two pixel rows.

Abstract: A display apparatus includes a panel part having a plurality of gate lines, a plurality of data lines, a plurality of pixels, a data driver and a gate driver part. Each pixel of the plurality of pixels includes a first sub-pixel and a second sub-pixel. The first sub-pixel is connected to a first gate line of the plurality of gate lines and the second sub-pixel is connected to a second gate line of the plurality of gate lines. The first sub-pixel and the second sub-pixel are each commonly connected to one data line of the plurality of data lines. The gate driver part is disposed on the panel part and applies a plurality of gate signals to the plurality of gate lines. A current gate signal of the plurality of gate signals is temporally overlapped with a previous gate signal for a predetermined time interval.

Abstract: A display device and a driving method therefor includes a plurality of unit pixels arranged in a matrix form, a plurality of gate lines extending in a row direction and connected to the unit pixels, respectively, pluralities of first and second data lines extending in a column direction and connected to the unit pixels, respectively, a plurality of charge control lines extending in the row direction and connected to the unit pixels, respectively, a plurality of gate connection lines connected to at least two adjacent gate lines, respectively, and a plurality of charge connection lines connected to at least two adjacent charge control lines, respectively.

Abstract: A thin film array panel is provided, which includes: a plurality of signal lines including contact parts for contact with an external device; a plurality of thin film transistors connected to the signal lines; an insulating layer formed on the signal lines and the thin film transistors; and a plurality of pixel electrodes formed on the insulating layer and connected to the thin film transistors, wherein the insulating layer includes a contact portion disposed on the contact parts of the signal lines and having a thickness smaller than other portions and the contact portion of the insulating layer includes an inclined portion having an inclination angle smaller than about 45 degrees.

Abstract: A gate line is formed on a substrate, and a gate insulating layer is formed thereon. A data line is formed on the gate insulating layer, and a passivation layer is formed on the data line. The passivation layer has an opening exposing the gate insulating layer. A pixel electrode is formed on the passivation layer and it overlaps the data line and the passivation layer.

Abstract: Disclosed therein are a coupling boss and a method for fabricating a coupling boss, that a collar part is formed through a collar drawing process using a metal plate material, and then, a body part of the coupling boss is firmly combined to a substrate plate through processes of deep drawing, tapping, cleansing, plating and iron coining in order, thereby maximizing competitive power in price, miniaturizing the coupling boss in size, and maximizing tensile strength, compression strength, and surface roughness. In this instance, a more stable material thickness can be kept by performing a collar drawing process or a curling process when a screw part of the coupling boss is formed.

Abstract: A liquid crystal display device includes a first substrate; a second substrate which faces the first substrate and comprises a common electrode; and a liquid crystal layer located between the first and second substrates, the first substrate comprises: a data line and a gate line which cross each other; and a pixel electrode which is bent at least once and comprises a first sub-pixel electrode and a second sub-pixel electrode which are separated from each other, the first sub-pixel electrode is extended along the direction of the data line, the second sub-pixel electrode comprises a first part located on the right side of the first sub-pixel electrode and a second part located on the left side of the first sub-pixel electrode, and the data line comprises a first data line passing through the first part and a second data line passing through the second part.

Abstract: The liquid crystal display device includes a first insulation substrate, a gate line which is disposed on the first insulation substrate and extends substantially in a first direction, first and second data lines which are insulated from the gate line, extend substantially in a second direction and intersect the gate line, a pixel electrode which includes first and second sub-pixel electrodes which are each provided with different data voltages via the first and second data lines, respectively, and which are separated from each other by a gap, the second sub-pixel electrode at least partially overlapping the first and second data lines, a second insulation substrate which faces the first insulation substrate, a black matrix which is disposed on the second insulation substrate and includes an irregular shape and extends substantially along the first and second data lines and a liquid crystal layer which is interposed between the first and second insulation substrates.

Abstract: A liquid crystal display (“LCD”) capable of improving display quality includes a first insulating substrate, gate wiring lines formed on the first insulating substrate and extending in a first direction, data wiring lines insulated from and crossing the gate wiring lines and extending in a second direction, and pixel electrodes, each of which includes first and second sub-pixel electrodes that are applied with different data voltages from the data wiring lines, in which at least a part of the second sub-pixel electrode overlaps the data wiring lines.

Abstract: A thin film array panel is provided, which includes: a plurality of signal lines including contact parts for contact with an external device; a plurality of thin film transistors connected to the signal lines; an insulating layer formed on the signal lines and the thin film transistors; and a plurality of pixel electrodes formed on the insulating layer and connected to the thin film transistors, wherein the insulating layer includes a contact portion disposed on the contact parts of the signal lines and having a thickness smaller than other portions and the contact portion of the insulating layer includes an inclined portion having an inclination angle smaller than about 45 degrees.

Abstract: A liquid crystal display includes a conductive spacer that connects a common voltage line of an array substrate to a common electrode of an opposite substrate. The conductive spacer has a bar-like shape and extends along the common voltage line.

Abstract: A liquid crystal display including the first and second substrates facing each other and a liquid crystal layer interposed between the first and second substrates is provided. A storage electrode, a transparent insulating layer pattern, and a pixel electrode are formed on the first substrate. A common electrode having a domain divider is formed on the second substrate. The transparent insulating layer pattern includes an opening having a first area having a first width and a second area having a second width narrower than the first width. The domain divider partially overlaps the storage electrode in the second area of the opening of the transparent insulating layer pattern.

Abstract: The present invention relates to a liquid crystal display. A liquid crystal display according to an exemplary embodiment of the present invention includes a pixel electrode having first and second sub-pixel electrodes; a first thin film transistor connected to the first sub-pixel electrode; a second thin film transistor connected to the second sub-pixel electrode; a first data line connected to the first thin film transistor; a second data line connected to the second thin film transistor; a gate line connected to the first and second thin film transistors and intersecting the first and second data lines; and a blocking member overlapping at least one portion of the first sub-pixel electrode.

Abstract: A gate line is formed on a substrate, and a gate insulating layer is formed thereon. A data line is formed on the gate insulating layer, and a passivation layer is formed on the data line. The passivation layer has an opening exposing the gate insulating layer. A pixel electrode is formed on the passivation layer and it overlaps the data line and the passivation layer.

Abstract: A gate line is formed on a substrate, and a gate insulating layer is formed thereon. A data line is formed on the gate insulating layer, and a passivation layer is formed on the data line. The passivation layer has an opening exposing the gate insulating layer. A pixel electrode is formed on the passivation layer and it overlaps the data line and the passivation layer.