Abstract: Embodiments of the disclosure relate to a system, apparatus and method for polishing thin substrates with high planarity. The apparatus comprises a chemical mechanical polishing head and a plate. The polishing head comprises a bottom surface, a retaining ring, a workpiece-receiving pocket defined between the bottom surface and the retaining ring, and at least one vacuum port adapted to provide a vacuum to the workpiece-receiving pocket through the bottom surface of the polishing head. The plate is disposed in the workpiece-receiving pocket such that the upper side of the plate faces the bottom surface of the polishing head and the lower side of the plate faces away from the bottom surface of the polishing head. The plate has a geometry or a material property configured to allow fluid to pass between the upper side and the lower side of the plate upon application of vacuum in the workpiece-receiving pocket.

Abstract: An electrostatic chucking force tool is described that may be used on workpiece carriers for micromechanical and semiconductor processing. One example includes a workpiece fitting to hold a workpiece when gripped by an electrostatic chucking force by an electrostatic chuck, an arm coupled to the workpiece fitting to pull the workpiece through the workpiece fitting laterally across the chuck, and a force gauge coupled to the arm to measure an amount of force with which the workpiece fitting is pulled by the arm in order to move the workpiece.

Abstract: A substrate carrier with contacts is described that is balanced for thermal stress. In one example workpiece carrier has a rigid substrate configured to support a workpiece to be carried for processing, a first dielectric layer over the substrate, an electrostatic conductive electrode over the first dielectric layer to electrostatically hold the workpiece to be carried, a second dielectric layer over the electrode to electrically isolate the workpiece from the electrode, and a third dielectric layer under the substrate to counter thermal stress applied to the substrate by the first and second dielectric layers.

Abstract: A method of singulating a plurality of semiconductor dies includes providing a carrier substrate and joining a semiconductor substrate to the carrier substrate. The semiconductor substrate includes a plurality of devices. The method also includes forming a mask layer on the semiconductor substrate, exposing a predetermined portion of the mask layer to light, and processing the predetermined portion of the mask layer to form a predetermined mask pattern on the semiconductor substrate. The method further includes forming the plurality of semiconductor dies, each of the plurality of semiconductor dies being associated with the predetermined mask pattern and including one or more of the plurality of devices and separating the plurality of semiconductor dies from the carrier substrate.

Abstract: A sealing structure is between a workpiece or substrate and a carrier for plasma processing. In one example, a substrate carrier has a top surface for holding a substrate, the top surface having a perimeter and a resilient sealing ridge on the perimeter of the top surface to contact the substrate when the substrate is being carried on the carrier.

Abstract: Methods of dicing semiconductor wafers, and transporting singulated die, are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a water soluble material layer over and between the plurality of singulated dies, above the dicing tape.

Abstract: Methods of dicing semiconductor wafers, and transporting singulated die, are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a water soluble material layer over and between the plurality of singulated dies, above the dicing tape.

Abstract: A method of singulating a plurality of semiconductor dies includes providing a carrier substrate and joining a semiconductor substrate to the carrier substrate. The semiconductor substrate includes a plurality of devices. The method also includes forming a mask layer on the semiconductor substrate, exposing a predetermined portion of the mask layer to light, and processing the predetermined portion of the mask layer to form a predetermined mask pattern on the semiconductor substrate. The method further includes forming the plurality of semiconductor dies, each of the plurality of semiconductor dies being associated with the predetermined mask pattern and including one or more of the plurality of devices and separating the plurality of semiconductor dies from the carrier substrate.

Abstract: Methods of dicing semiconductor wafers, and transporting singulated die, are described. In an example, a method of dicing a wafer having a plurality of integrated circuits thereon involves dicing the wafer into a plurality of singulated dies disposed above a dicing tape. The method also involves forming a water soluble material layer over and between the plurality of singulated dies, above the dicing tape.

Abstract: A method of singulating a plurality of semiconductor dies includes providing a carrier substrate and joining a semiconductor substrate to the carrier substrate. The semiconductor substrate includes a plurality of devices. The method also includes forming a mask layer on the semiconductor substrate, exposing a predetermined portion of the mask layer to light, and processing the predetermined portion of the mask layer to form a predetermined mask pattern on the semiconductor substrate. The method further includes forming the plurality of semiconductor dies, each of the plurality of semiconductor dies being associated with the predetermined mask pattern and including one or more of the plurality of devices and separating the plurality of semiconductor dies from the carrier substrate.

Abstract: A method of singulating a plurality of semiconductor dies includes providing a carrier substrate and joining a semiconductor substrate to the carrier substrate. The semiconductor substrate includes a plurality of devices. The method also includes forming a mask layer on the semiconductor substrate, exposing a predetermined portion of the mask layer to light, and processing the predetermined portion of the mask layer to form a predetermined mask pattern on the semiconductor substrate. The method further includes forming the plurality of semiconductor dies, each of the plurality of semiconductor dies being associated with the predetermined mask pattern and including one or more of the plurality of devices and separating the plurality of semiconductor dies from the carrier substrate.

Abstract: Increased sidewall coverage by a sputtered material is achieved by generating an ionizing plasma in a relatively low pressure sputtering gas. By reducing the pressure of the sputtering gas, it is believed that the ionization rate of the deposition material passing through the plasma is correspondingly reduced which in turn is believed to increase the sidewall coverage by the underlayer. Although the ionization rate is decreased, sufficient bottom coverage of the by the material is maintained. In an alternative embodiment, increased sidewall coverage by the material may be achieved even in a high density plasma chamber by generating the high density plasma only during an initial portion of the material deposition. Once good bottom coverage has been achieved, the RF power to the coil generating the high density plasma may be turned off entirely and the remainder of the deposition conducted without the high density plasma.

Abstract: Increased sidewall coverage by a sputtered material is achieved by generating an ionizing plasma in a relatively low pressure sputtering gas. By reducing the pressure of the sputtering gas, it is believed that the ionization rate of the deposition material passing through the plasma is correspondingly reduced which in turn is believed to increase the sidewall coverage by the underlayer. Although the ionization rate is decreased, sufficient bottom coverage of the by the material is maintained. In an alternative embodiment, increased sidewall coverage by the material may be achieved even in a high density plasma chamber by generating the high density plasma only during an initial portion of the material deposition. Once good bottom coverage has been achieved, the RF power to the coil generating the high density plasma may be turned off entirely and the remainder of the deposition conducted without the high density plasma.

Abstract: A method and apparatus is provided for improving adherence of metal seed layers to barrier layers in electrochemical deposition techniques. The method includes depositing an adhesion layer continuously or semi-continuously without agglomeration onto a barrier layer prior to depositing a seed layer by controlling the substrate temperature, the chamber pressure, and/or the power delivered to a deposition chamber. Deposition of the adhesion layer prevents layer delamination which leads to agglomeration of the deposited layers and formation of voids in the high aspect ratio features.

Abstract: A deposition system in a semiconductor fabrication system provides at least one electron gun which injects energetic electrons into a semiconductor fabrication chamber to initiate and sustain a relatively high density plasma at extremely low pressures. In addition to ionizing atoms of the extremely low pressure gas, such as an argon gas at 100 microTorr, for example, the energetic electrons are also believed to collide with target material atoms sputtered from a target positioned above a substrate, thereby ionizing the target material atoms and losing energy as a result of the collisions. Preferably, the electrons are injected substantially tangentially to the walls of a chamber shield surrounding the plasma in a magnetic field generally parallel to a central axis of the semiconductor fabrication chamber connecting the target to and the substrate.

Abstract: Increased sidewall coverage by a sputtered material is achieved by generating an ionizing plasma in a relatively low pressure sputtering gas. By reducing the pressure of the sputtering gas, it is believed that the ionization rate of the deposition material passing through the plasma is correspondingly reduced which in turn is believed to increase the sidewall coverage by the underlayer. Although the ionization rate is decreased, sufficient bottom coverage of the by the material is maintained. In an alternative embodiment, increased sidewall coverage by the material may be achieved even in a high density plasma chamber by generating the high density plasma only during an initial portion of the material deposition. Once good bottom coverage has been achieved, the RF power to the coil generating the high density plasma may be turned off entirely and the remainder of the deposition conducted without the high density plasma.

Abstract: Improved targets for use in DC magnetron sputtering of nickel or like ferromagnetic face-centered cubic (FCC) metals are disclosed for forming metallization films having effective edge-to-edge deposition uniformity of 5%(3&sgr;) or better. Such targets may be characterized as having: (a) a homogeneous texture mix that is at least 20% of a <200> texture content and less than 50% of a <111> texture content, (b) an initial pass-through flux factor (% PTF) of about 30% or greater; and(c) a homogeneous grain size of about 200 &mgr;m or less.

Abstract: Improved targets for use in DC magnetron sputtering of nickel or like ferromagnetic face-centered cubic (FCC) metals are disclosed for forming metallization films having effective edge-to-edge deposition uniformity of 5%(3&sgr;) or better. Such targets may be characterized as having: (a) a homogeneous texture mix that is at least 20% of a <200> texture content and less than 50% of a <111> texture content, (b) an initial pass-through flux factor (LPTF) of about 30% or greater; and (c) a homogeneous grain size of about 200 &mgr;m or less.

Abstract: Increased sidewall coverage by a sputtered material is achieved by generating an ionizing plasma in a relatively low pressure sputtering gas. By reducing the pressure of the sputtering gas, it is believed that the ionization rate of the deposition material passing through the plasma is correspondingly reduced which in turn is believed to increase the sidewall coverage by the underlayer. Although the ionization rate is decreased, sufficient bottom coverage of the by the material is maintained. In an alternative embodiment, increased sidewall coverage by the material may be achieved even in a high density plasma chamber by generating the high density plasma only during an initial portion of the material deposition. Once good bottom coverage has been achieved, the RF power to the coil generating the high density plasma may be turned off entirely and the remainder of the deposition conducted without the high density plasma.

Abstract: Improved targets for use in DC magnetron sputtering of nickel or like ferromagnetic face-centered cubic (FCC) metals are included for forming metallization films having effective edge-to-edge deposition uniformity of 5% (3&sgr;) or better. Such targets may be characterized as having: (a) a homogeneous texture mix that is at least 20% of a <200> texture content and less than 50% of a <111> texture content, (b) an initial pass-through flux factor (% PTF) of about 30% or greater; and(c) a homogeneous grain size of about 200 &mgr;m or less.