Patents by Inventor Seshadri Ramaswami

Seshadri Ramaswami has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6455921
    Abstract: An electrically conductive plug on a semiconductor workpiece. A dielectric layer is deposited on the workpiece, and a cavity is etched in the dielectric. An etchant-resistant material is deposited on the wall of the cavity adjacent the cavity mouth so as to form an inwardly-extending lateral protrusion, the etchant-resistant material being resistant to etching by at least one etchant substance which etches said electrically conductive material substantially faster than it etches the etchant resistant material. The cavity is filled by an electrically conductive material. In another aspect of the method, the etchant-resistant material can be omitted. Instead, upper and lower portions of the cavity are etched anisotropically and isotropically, respectively, so as to form a lower portion of the cavity that is wider than the upper portion.
    Type: Grant
    Filed: February 18, 2000
    Date of Patent: September 24, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Seshadri Ramaswami, Jaim Nulman
  • Publication number: 20020125123
    Abstract: The resistivity of titanium nitride films is reduced, by about 40% (to less than about 60 &mgr;Ohm-cm), for example; and, the film surface roughness is reduced, by about 45% (to less than 6 Å) by using a combination of particular process conditions during deposition of the film. In particular, titanium atoms produced by impact of inert gas ions upon a titanium target travel through a high density, inductively coupled rf plasma, an ion metal plasma (IMP), in which the titanium atoms are at least partially ionized. The ionized titanium ions are contacted with ionized nitrogen atoms also present in the processing chamber. The resultant gas phase composition is contacted with the surface of a semiconductor substrate on which a titanium nitride barrier layer is to be deposited.
    Type: Application
    Filed: May 7, 2002
    Publication date: September 12, 2002
    Inventors: Kenny King-tai Ngan, Seshadri Ramaswami
  • Patent number: 6436207
    Abstract: Improved targets for use in DC magnetron sputtering of nickel or like ferromagnetic face-centered cubic (FCC) metals are disclosed for forming metallization films having effective edge-to-edge deposition uniformity of 5% (3&sgr;) or better. Such targets may be characterized as having: (a) a homogeneous texture mix that is at least 20% of a <200> texture content and less than 50% of a <111>texture content, (b) an initial pass-through flux factor (%PTF) of about 30% or greater; and(c) a homogeneous grain size of about 200 &mgr;m or less.
    Type: Grant
    Filed: May 8, 2000
    Date of Patent: August 20, 2002
    Assignee: Applied Material, Inc.
    Inventors: Murali Abburi, Seshadri Ramaswami
  • Patent number: 6420260
    Abstract: The present disclosure pertains to particular Ti/TiN/TiNx barrier/wetting layer structures which enable the warm aluminum filling of high aspect vias while providing an aluminum fill exhibiting a high degree of aluminum <111> crystal orientation. It has been discovered that an improved Ti/TiN/TiNx barrier layer deposited using IMP techniques can be obtained by increasing the thickness of the first layer of Ti to range from greater than about 100 Å to about 500 Å (the feature geometry controls the upper thickness limit); by decreasing the thickness of the TiN second layer to range from greater than about 100 Å to less than about 800 Å (preferably less than about 600 Å); and, by controlling the application of the TiNx third layer to provide a Ti content ranging from about 50 atomic percent titanium (stoichiometric) to about 100 atomic percent titanium.
    Type: Grant
    Filed: October 24, 2000
    Date of Patent: July 16, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Kenny King-tai Ngan, Seshadri Ramaswami
  • Publication number: 20020088716
    Abstract: The present invention provides a method and apparatus for forming a copper layer on a substrate, preferably using a sputtering process. The sputtering process involves bombarding a conductive member of enhanced hardness with ions to dislodge the copper from the conductive member. The hardness of the target may be enhanced by alloying the copper conductive member with another material and/or mechanically working the material of the conductive member during its manufacturing process in order to improve conductive member and film qualities. The copper may be alloyed with magnesium, zinc, aluminum, iron, nickel, silicon and any combination thereof.
    Type: Application
    Filed: March 6, 2002
    Publication date: July 11, 2002
    Inventors: Vikram Pavate, Murali Abburi, Murali Narasimhan, Seshadri Ramaswami
  • Patent number: 6391163
    Abstract: The present invention provides a method and apparatus for forming a copper layer on a substrate, preferably using a sputtering process. The sputtering process involves bombarding a conductive member of enhanced hardness with ions to dislodge the copper from the conductive member. The hardness of the target may be enhanced by alloying the copper conductive member with another material and/or mechanically working the material of the conductive member during its manufacturing process in order to improve conductive member and film qualities. The copper may be alloyed with magnesium, zinc, aluminum, iron, nickel, silicon and any combination thereof.
    Type: Grant
    Filed: March 2, 2000
    Date of Patent: May 21, 2002
    Assignee: Applied Materials, Inc.
    Inventors: Vikram Pavate, Murali Abburi, Murali Narasimhan, Seshadri Ramaswami
  • Publication number: 20020005348
    Abstract: A deposition system in a semiconductor fabrication system provides at least one electron gun which injects energetic electrons into a semiconductor fabrication chamber to initiate and sustain a relatively high density plasma at extremely low pressures. In addition to ionizing atoms of the extremely low pressure gas, such as an argon gas at 100 microTorr, for example, the energetic electrons are also believed to collide with target material atoms sputtered from a target positioned above a substrate, thereby ionizing the target material atoms and losing energy as a result of the collisions. Preferably, the electrons are injected substantially tangentially to the walls of a chamber shield surrounding the plasma in a magnetic field generally parallel to a central axis of the semiconductor fabrication chamber connecting the target to and the substrate.
    Type: Application
    Filed: March 7, 1997
    Publication date: January 17, 2002
    Inventors: ZHENG XU, SESHADRI RAMASWAMI
  • Patent number: 6228186
    Abstract: Improved targets for use in DC_magnetron sputtering of aluminum or like metals are disclosed for forming metallization films having low defect densities. Methods for manufacturing and using such targets are also disclosed. Conductivity anomalies such as those composed of metal oxide inclusions can induce arcing between the target surface and the plasma. The arcing can lead to production of excessive deposition material in the form of splats or blobs. Reducing the content of conductivity anomalies and strengthening the to-be-deposited material is seen to reduce production of such splats or blobs. Other splat limiting steps include smooth finishing of the target surface and low-stress ramp up of the plasma.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: May 8, 2001
    Assignee: Applied Materials, Inc.
    Inventors: Vikram Pavate, Keith J. Hansen, Glen Mori, Murali Narasimhan, Seshadri Ramaswami, Jaim Nulman
  • Patent number: 6171455
    Abstract: Improved targets for use in DC_magnetron sputtering of aluminum or like metals are disclosed for forming metallization films having low defect densities. Methods for manufacturing and using such targets are also disclosed. Conductivity anomalies such as those composed of metal oxide inclusions can induce arcing between the target surface and the plasma. The arcing can lead to production of excessive deposition material in the form of splats or blobs. Reducing the content of conductivity anomalies and strengthening the to-be-deposited material is seen to reduce production of such splats or blobs. Other splat limiting steps include smooth finishing of the target surface and low-stress ramp up of the plasma.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: January 9, 2001
    Assignee: Applied Materials Inc.
    Inventors: Vikram Pavate, Keith J. Hansen, Glen Mori, Murali Narasimhan, Seshadri Ramaswami, Jaim Nulman
  • Patent number: 6149777
    Abstract: An ion deposition sputtering process for producing a titanium nitride film having a resistivity less than about 70 .mu..OMEGA.-cm is disclosed, which comprises the steps of: (1) adjusting a percentage of ionization of a gas phase mixture to a predetermined range by adjusting the power to an ionization source; and (2) adjusting a deposition rate of said film on a substrate to a predetermined range so that a combination of said percentage of ionization of said deposition mixture and said deposition rate produces said film.
    Type: Grant
    Filed: January 25, 1999
    Date of Patent: November 21, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Kenny King-tai Ngan, Seshadri Ramaswami
  • Patent number: 6139701
    Abstract: A copper sputtering target is provided for producing copper films having reduced in-film defect densities. In addition to reducing dielectric inclusion content of the copper target material, the hardness of the copper target is maintained within a range greater than 45 Rockwell. Within this range defect generation from arc-induced mechanical failure is reduced. Preferably hardness is achieved by limiting grain size to less than 50 microns, and most preferably to less than 25 microns. The surface roughness preferably is limited to less than 20 micro inches, or more preferably, less than 5 micro inches to reduce defect generation from field-enhanced emission. This grain size range preferably is achieved by limiting the purity level of the copper target material to a level less than 99.9999%, preferably within a range between 99.995% to 99.9999%, while reducing particular impurity levels.
    Type: Grant
    Filed: March 18, 1999
    Date of Patent: October 31, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Vikram Pavate, Seshadri Ramaswami, Murali Abburi, Murali Narasimhan
  • Patent number: 6126791
    Abstract: Improved targets for use in DC.sub.-- magnetron sputtering of aluminum or like metals are disclosed for forming metallization films having low defect densities. Methods for manufacturing and using such targets are also disclosed. Conductivity anomalies such as those composed of metal oxide inclusions can induce arcing between the target surface and the plasma. The arcing can lead to production of excessive deposition material in the form of splats or blobs. Reducing the content of conductivity anomalies and strengthening the to-be-deposited material is seen to reduce production of such splats or blobs. Other splat limiting steps include smooth finishing of the target surface and low-stress ramp up of the plasma.
    Type: Grant
    Filed: October 14, 1999
    Date of Patent: October 3, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Vikram Pavate, Keith J. Hansen, Glen Mori, Murali Narasimhan, Seshadri Ramaswami, Jaim Nulman
  • Patent number: 6086725
    Abstract: Improved targets for use in DC magnetron sputtering of nickel or like ferromagnetic face-centered cubic (FCC) metals are disclosed for forming metallization films having effective edge-to-edge deposition uniformity of 5%(3.sigma.) or better. Such targets may be characterized as having: (a) a homogeneous texture mix that is at least 20% of a <200> texture content and less than 50% of a <111> texture content, (b) an initial pass-through flux factor (% PTF) of about 30% or greater; and (c) a homogeneous grain size of about 200 .mu.m or less.
    Type: Grant
    Filed: April 2, 1998
    Date of Patent: July 11, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Murali Abburi, Seshadri Ramaswami
  • Patent number: 6059872
    Abstract: The resistivity of titanium nitride films is reduced, by about 40% (to less than about 60 .mu.Ohm-cm), for example; and, the film surface roughness is reduced, by about 45% (to less than 6 .ANG.) by using a combination of particular process conditions during deposition of the film. In particular, titanium atoms produced by impact of inert gas ions upon a titanium target travel through a high density, inductively coupled rf plasma, an ion metal plasma (IMP), in which the titanium atoms are at least partially ionized. The ionized titanium ions are contacted with ionized nitrogen atoms also present in the processing chamber. The resultant gas phase composition is contacted with the surface of a semiconductor substrate on which a titanium nitride barrier layer is to be deposited.
    Type: Grant
    Filed: January 21, 1998
    Date of Patent: May 9, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Kenny King-tai Ngan, Seshadri Ramaswami
  • Patent number: 6046100
    Abstract: A method of fabricating an electrically conductive plug on a semiconductor workpiece. A dielectric layer is deposited on the workpiece, and a cavity is etched in the dielectric. An etchant-resistant material is deposited on the wall of the cavity adjacent the cavity mouth so as to form an inwardly-extending lateral protrusion, the etchant-resistant material being resistant to etching by at least one etchant substance which etches said electrically conductive material substantially faster than it etches the etchant resistant material. The cavity is filled by an electrically conductive material. In another aspect of the method, the etchant-resistant material can be omitted. Instead, upper and lower portions of the cavity are etched anisotropically and isotropically, respectively, so as to form a lower portion of the cavity that is wider than the upper portion. In a third aspect of the method, a higher density upper layer of dielectric is deposited over a lower density lower layer of dielectric.
    Type: Grant
    Filed: December 12, 1996
    Date of Patent: April 4, 2000
    Assignee: Applied Materials, Inc.
    Inventors: Seshadri Ramaswami, Jaim Nulman
  • Patent number: 6001227
    Abstract: Improved targets for use in DC.sub.-- magnetron sputtering of aluminum or like metals are disclosed for forming metallization films having low defect densities. Methods for manufacturing and using such targets are also disclosed. Conductivity anomalies such as those composed of metal oxide inclusions can induce arcing between the target surface and the plasma. The arcing can lead to production of excessive deposition material in the form of splats or blobs. Reducing the content of conductivity anomalies and strengthening the to-be-deposited material is seen to reduce production of such splats or blobs. Other splat limiting steps include smooth finishing of the target surface and low-stress ramp up of the plasma.
    Type: Grant
    Filed: November 26, 1997
    Date of Patent: December 14, 1999
    Assignee: Applied Materials, Inc.
    Inventors: Vikram Pavate, Keith J. Hansen, Glen Mori, Murali Narasimhan, Seshadri Ramaswami, Jaim Nulman
  • Patent number: 5925225
    Abstract: The resistivity of titanium nitride films is reduced, by about 40% (to less than about 60 .mu. Ohm-cm), for example; and, the film surface roughness is reduced, by about 45% (to less than 6 .ANG.) by using a combination of particular process conditions during deposition of the film by an ion-deposition sputtering process.
    Type: Grant
    Filed: March 27, 1997
    Date of Patent: July 20, 1999
    Assignee: Applied Materials, Inc.
    Inventors: Kenny King-tai Ngan, Seshadri Ramaswami
  • Patent number: 5882399
    Abstract: The aluminum <111> crystal orientation content of an aluminum interconnect layer or the copper <111> crystal orientation content of a copper interconnect can be maintained at a consistently high value during the processing of an entire series of semiconductor substrates in a given process chamber. To provide the stable and consistent aluminum <111> content, or the stable and consistent copper <111> content, it is necessary that the barrier layer structure underlying the aluminum or the copper have a consistent crystal orientation throughout the processing of the entire series of substrates, as well. We have determined that to ensure the consistent crystal orientation content of the barrier layer structure, it is necessary to form the first layer of the barrier layer structure to have a minimal thickness of at least about 150 .ANG., to compensate for irregularities in the crystal orientation which may by present during the initial deposition of this layer.
    Type: Grant
    Filed: August 23, 1997
    Date of Patent: March 16, 1999
    Assignee: Applied Materials, Inc.
    Inventors: Kenny King-tai Ngan, Barry Hogan, Seshadri Ramaswami
  • Patent number: 5614446
    Abstract: A holding apparatus, a metal deposition system and a wafer processing method which preserve topographical marks, including those used as alignment targets, on a semiconductor wafer by preventing metal from depositing on such marks during metal deposition. The invention eliminates the need to use window mask and etch techniques to provide replication of topographical marks on a newly formed metal layer when a CMP planarization technique is used prior to metal deposition. As a result, cost, cycle time and yield loss due to the additional window mask and etch steps can be eliminated. The holding apparatus includes a wafer retainer for retaining a wafer which has at least one topographical mark and a clamp ring with at least one tab. The wafer is pressed against the clamp ring by the retainer for securing the wafer in the retainer.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 25, 1997
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Seshadri Ramaswami, Darin A. Chan
  • Patent number: 5539247
    Abstract: Metal pillars (18) having diameters of less than about 1.0 .mu.m are grown in vias (16) in dielectric layers (14) between metal layers (12, 22) by a process comprising: (a) forming a first metal layer (12) at a first temperature and patterning the metal layer; (b) forming the dielectric layer to encapsulate the first patterned metal layer, the dielectric layer having a compressive stress of at least about 100 MegaPascal and being formed at a second temperature; (c) opening vias in the dielectric layer to exposed underlying portions of the patterned metal layer, the vias being less than about 1.0 .mu.m in diameter; (d) heating the semiconductor wafer at a temperature that is greater than either the first or second temperatures to induce growth of metal in the vias from the metal layer; and (e) forming the second metal layer (22) over the dielectric layer to make contact with the metal pillars.
    Type: Grant
    Filed: May 24, 1995
    Date of Patent: July 23, 1996
    Assignee: Advanced Micro Devices, Incorporated
    Inventors: Robin W. Cheung, Seshadri Ramaswami, David F. Kyser