Patents by Inventor Seung-Ha Choi

Seung-Ha Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11943976
    Abstract: A display device includes a substrate, a first conductive layer on the substrate, the first conductive layer including a data signal line, a first insulating layer on the first conductive layer, a semiconductor layer on the first insulating layer, the semiconductor layer including a first semiconductor pattern, a second insulating layer on the semiconductor layer, and a second conductive layer on the second insulating layer, the second conductive layer including a gate electrode disposed to overlap the first semiconductor pattern, a transistor first electrode disposed to overlap a part of the first semiconductor pattern, wherein the transistor first electrode is electrically connected to the data signal line through a contact hole that penetrates the first and second insulating layers, and a transistor second electrode disposed to overlap another part of the first semiconductor pattern.
    Type: Grant
    Filed: June 4, 2020
    Date of Patent: March 26, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seung Sok Son, Woo Geun Lee, Seul Ki Kim, Kap Soo Yoon, Hyun Woong Baek, Jae Hyun Lee, Su Jung Jung, Jung Kyoung Cho, Seung Ha Choi, June Whan Choi
  • Publication number: 20240065045
    Abstract: A display panel includes a base substrate, a transistor disposed on the base substrate and including a semiconductor pattern including a source area, a drain area, and an active area, a gate insulating pattern layer disposed on the semiconductor pattern, and a gate electrode disposed on the gate insulating pattern, and connection electrodes disposed on the gate insulating pattern layer and connected to the semiconductor pattern through contact holes, respectively. The gate insulating pattern layer includes a first portion overlapping at least one of the source area and the drain area and a second portion extending from the first portion. A thickness of the first portion is equal to or smaller than about 50% of a thickness of the second portion.
    Type: Application
    Filed: March 22, 2023
    Publication date: February 22, 2024
    Inventors: HYUN KIM, SHOYEON KIM, SEUL-KI KIM, KAP SOO YOON, JAEHYUN LEE, SEUNG-HA CHOI
  • Publication number: 20240016002
    Abstract: A display device includes a base substrate, a circuit layer including a transistor including a gate electrode, an auxiliary conductive layer, a first insulating layer disposed on the transistor and the auxiliary conductive layer, and a second insulating layer disposed on the first insulating layer, and a display element layer including a pixel defining layer disposed on the circuit layer and a light-emitting element including a first electrode, a functional layer, and a second electrode, which are sequentially stacked.
    Type: Application
    Filed: May 16, 2023
    Publication date: January 11, 2024
    Applicant: Samsung Display Co., Ltd.
    Inventors: HYUN KIM, SEUL-KI KIM, SEUNG-HA CHOI, KAP SOO YOON, WOOGEUN LEE, YEEUN KANG, JUNG KYOUNG CHO
  • Publication number: 20240016011
    Abstract: A display device includes a first base portion, a first conductive layer comprising a lower light blocking layer on the first base portion, and a lower wiring spaced apart from the lower light blocking layer, a buffer layer disposed on the first conductive layer, a semiconductor layer disposed on the first buffer layer and comprising a first area, a second area on one side of the first area, and a third area on the other side of the first area, a gate insulating layer on the semiconductor layer, and a second conductive layer comprising a gate electrode overlapping the first area on the gate insulating layer, wherein conductivity of each of the first area and the second area is higher than conductivity of the first area, the third area is electrically connected to the lower wiring, and the second area is directly connected to the lower light blocking layer.
    Type: Application
    Filed: March 8, 2023
    Publication date: January 11, 2024
    Inventors: Kwang Soo LEE, Sho Yeon KIM, Hyun KIM, Kap Soo YOON, Woo Geun LEE, Seung Ha CHOI
  • Publication number: 20230413632
    Abstract: A display device includes a first conducive layer including a first and second wiring, a semiconductor layer on the first conductive layer and including a first to third semiconductor part, a gate insulating layer on the semiconductor layer, and a second conductive layer on the gate insulating layer and including a gate electrode overlapping the first semiconductor part, a first connecting electrode overlapping the second semiconductor part, and a second connecting electrode overlapping the third semiconductor part. The first and second connecting electrodes are directly connected to the second and third semiconductor parts, respectively. The second and third semiconductor parts include semiconductor openings. The first connecting electrode includes a (1-1)-th and (1-2)-th connecting electrodes.
    Type: Application
    Filed: March 8, 2023
    Publication date: December 21, 2023
    Applicant: Samsung Display Co., LTD.
    Inventors: Hyun KIM, Ye Eun KANG, Dong Hyun WON, Kwang Soo LEE, Seung Ha CHOI
  • Publication number: 20230411561
    Abstract: A display device includes a first base part, a semiconductor layer including a first semiconductor part disposed on the first base part and a second semiconductor part adjacent to a first side of the first semiconductor part in a first direction, a gate insulating layer disposed on the semiconductor layer and including a first gate insulating layer and a second gate insulating layer spaced apart from each other, and a gate conductive layer including a gate electrode disposed on the first gate insulating layer and overlapping the first semiconductor part and a first connecting electrode overlapping the second gate insulating layer and the second semiconductor part. The first connecting electrode includes a protrusion, the second gate insulating layer includes a recess, and the protrusion of the first connecting electrode overlaps the recess of the second gate insulating layer.
    Type: Application
    Filed: March 7, 2023
    Publication date: December 21, 2023
    Applicant: Samsung Display Co., LTD.
    Inventors: Ki Su JIN, Jae Hyun LEE, Seul Ki KIM, Min Sik JUNG, Seung Ha CHOI, Jong Bum CHOI
  • Publication number: 20230128398
    Abstract: A display device includes a pixel, a first pad electrode disposed around the pixel, a buffer layer disposed on the first pad electrode, a first insulating layer disposed on the buffer layer, and a second pad electrode disposed on the first insulating layer, the second pad electrode being electrically connected to the first pad electrode through a contact hole in the first insulating layer and the buffer layer. A first step, a second step below the first step, and a third step below the second step are defined on the first insulating layer and the buffer layer around the first pad electrode and the second pad electrode.
    Type: Application
    Filed: July 27, 2022
    Publication date: April 27, 2023
    Applicant: Samsung Display Co., Ltd.
    Inventors: JAEHYUN LEE, SEUL-KI KIM, KAP SOO YOON, KI SU JIN, SEUNG-HA CHOI, JONGBUM CHOI
  • Publication number: 20230062993
    Abstract: A display device includes: a substrate; a first conductive layer on the substrate and including a first pattern; a first insulating layer on the first conductive layer; a semiconductor layer on the first insulating layer and including an active pattern; a second insulating layer on the semiconductor layer; and a second conductive layer on the second insulating layer, wherein the second conductive layer includes a first electrode partially in contact with the active pattern, the first electrode is in contact with the first pattern through a first contact hole, the first contact hole penetrates the first insulating layer and includes a first hole defined by a sidewall of the first insulating layer, and a second hole defined by a sidewall of the active pattern and a sidewall of the second insulating layer, and a width of the second hole is greater than a width of the first hole.
    Type: Application
    Filed: July 25, 2022
    Publication date: March 2, 2023
    Inventors: Seul Ki KIM, Kwang Soo LEE, Jae Hyun LEE, Seung Ha CHOI, Jong Bum CHOI
  • Publication number: 20230053184
    Abstract: A display device and a method of fabricating the same, the display device including a light-blocking layer disposed on a substrate, a buffer layer disposed on the light-blocking layer, a semiconductor layer disposed on the buffer layer, a gate insulating layer disposed on the semiconductor layer, a connection pattern layer and a gate electrode disposed on the gate insulating layer and spaced apart from each other, an interlayer dielectric layer disposed on the connection pattern layer and the gate electrode, a via layer disposed on the interlayer dielectric layer, a first bridge layer and a second bridge layer disposed on the via layer, a pixel electrode disposed on the second bridge layer, and a light-emitting layer disposed on the pixel electrode. An end of the first bridge layer is connected to the light-blocking layer through the connection pattern layer, and another end thereof is connected to the semiconductor layer. The second bridge layer connects the semiconductor layer with the pixel electrode.
    Type: Application
    Filed: June 2, 2022
    Publication date: February 16, 2023
    Inventors: Seul Ki KIM, Kap Soo YOON, Jae Hyun LEE, Seung Ha CHOI, Jong Bum CHOI
  • Patent number: 11574970
    Abstract: A display device includes a substrate having a display area and a pad area. A gate conductive layer disposed on the substrate includes a gate conductive metal layer and a gate capping layer. The gate conductive layer forms a gate electrode in the display area and a wire pad in the pad area that is exposed by a pad opening. An interlayer insulating film disposed on the gate conductive layer covers the gate electrode. A data conductive layer disposed on the interlayer insulating film in the display area includes source and drain electrodes. A passivation layer disposed on the data conductive layer covers the source and drain electrodes. A via layer is disposed on the passivation layer. A pixel electrode is disposed on the via layer. The pixel electrode is connected to the source electrode through a contact hole penetrating the via layer and the passivation layer.
    Type: Grant
    Filed: June 8, 2020
    Date of Patent: February 7, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Seul Ki Kim, Seung Sok Son, Kap Soo Yoon, Woo Geun Lee, Su Jung Jung, Seung Ha Choi
  • Publication number: 20220392966
    Abstract: Provided is a display device which comprises a substrate, a first insulating layer disposed on the substrate, a semiconductor layer disposed on the first insulating layer, wherein the semiconductor layer includes an active pattern, a second insulating layer disposed on the semiconductor layer, and a first conductive layer disposed on the second insulating layer. The display device further comprises a gate electrode and source/drain electrodes composed of the same conductive layer, and comprises a semiconductor layer having reduced resistance against an electrical signal applied to the transistor. Thus, reliability of the display device is improved due to the decrease in the resistance of the semiconductor layer.
    Type: Application
    Filed: January 4, 2022
    Publication date: December 8, 2022
    Inventors: Kwang Soo LEE, Seul Ki KIM, Seung Rae KIM, Jae Hyun LEE, Seung Ha CHOI
  • Publication number: 20210091163
    Abstract: A display device includes a substrate, a first conductive layer on the substrate, the first conductive layer including a data signal line, a first insulating layer on the first conductive layer, a semiconductor layer on the first insulating layer, the semiconductor layer including a first semiconductor pattern, a second insulating layer on the semiconductor layer, and a second conductive layer on the second insulating layer, the second conductive layer including a gate electrode disposed to overlap the first semiconductor pattern, a transistor first electrode disposed to overlap a part of the first semiconductor pattern, wherein the transistor first electrode is electrically connected to the data signal line through a contact hole that penetrates the first and second insulating layers, and a transistor second electrode disposed to overlap another part of the first semiconductor pattern.
    Type: Application
    Filed: June 4, 2020
    Publication date: March 25, 2021
    Applicant: Samsung Display Co., LTD.
    Inventors: Seung Sok SON, Woo Geun LEE, Seul Ki KIM, Kap Soo YOON, Hyun Woong BAEK, Jae Hyun LEE, Su Jung JUNG, Jung Kyoung CHO, Seung Ha CHOI, June Whan CHOI
  • Publication number: 20210036076
    Abstract: A display device includes a substrate having a display area and a pad area. A gate conductive layer disposed on the substrate includes a gate conductive metal layer and a gate capping layer. The gate conductive layer forms a gate electrode in the display area and a wire pad in the pad area that is exposed by a pad opening. An interlayer insulating film disposed on the gate conductive layer covers the gate electrode. A data conductive layer disposed on the interlayer insulating film in the display area includes source and drain electrodes. A passivation layer disposed on the data conductive layer covers the source and drain electrodes. A via layer is disposed on the passivation layer. A pixel electrode is disposed on the via layer. The pixel electrode is connected to the source electrode through a contact hole penetrating the via layer and the passivation layer.
    Type: Application
    Filed: June 8, 2020
    Publication date: February 4, 2021
    Inventors: Seul Ki KIM, Seung Sok SON, Kap Soo YOON, Woo Geun LEE, Su Jung JUNG, Seung Ha CHOI
  • Publication number: 20200358040
    Abstract: A method of manufacturing a thin film transistor includes: forming an active pattern on a substrate; forming an insulating layer and a gate electrode layer on the active pattern in order; forming a photoresist pattern on the gate electrode layer; forming a preliminary gate electrode by wet etching the gate electrode layer using the photoresist pattern; forming an insulating pattern by dry etching the insulating layer using the photoresist pattern and the preliminary gate electrode; and forming a gate electrode by wet etching a side surface of the preliminary gate electrode using the photoresist pattern.
    Type: Application
    Filed: March 27, 2020
    Publication date: November 12, 2020
    Inventors: Keum Hee LEE, Joongeol KIM, Kap Soo YOON, Woo Geun LEE, Seung-Ha CHOI, Jiyun HONG
  • Patent number: 10295869
    Abstract: A display device is provided. The display device includes: a first substrate that comprises a first base substrate, an insulating layer located on the first base substrate, and a barrier layer located on the insulating layer; a second substrate that faces the first substrate; a liquid crystal layer that is located between the first substrate and the second substrate; and a first spacer that is located between the first substrate and the second substrate and is in contact with the first substrate, wherein the first substrate further comprises a second spacer that is located on the barrier layer and overlaps with the first spacer.
    Type: Grant
    Filed: September 6, 2016
    Date of Patent: May 21, 2019
    Assignee: Samsung Display Co., Ltd.
    Inventors: Hyun Kim, Seul Ki Kim, Seung Ha Choi, Yun Seok Han, Kap Soo Yoon, Jeong Uk Heo
  • Patent number: 10141348
    Abstract: Provided are a display device its method of manufacturing. The device includes a base; first and second thin-film transistors (TFT) on the base, adjacent to each; an organic layer covering the first and second TFT, including a first and second opening overlapping the drain electrodes of the first and second TFT, respectively; a common electrode on the organic layer comprising a common electrode opening overlapping the first opening and another common electrode opening overlapping the second opening; an insulating layer on a bump spacer which is on the common electrode; a first and second pixel electrode on the insulating layer overlapping the common electrode and electrically connected to the first and second TFT, respectively, wherein a minimum distance between the bump spacer and the common electrode opening is substantially equal to a minimum distance between the bump spacer and the other common electrode opening.
    Type: Grant
    Filed: January 23, 2017
    Date of Patent: November 27, 2018
    Assignee: Samsung Display Co., Ltd.
    Inventors: Seul Ki Kim, Seung Ha Choi, Hyun Kim, Yun Seok Han
  • Patent number: 9825066
    Abstract: A thin film transistor substrate includes a gate electrode, a channel layer overlapping the gate electrode, a source electrode overlapping the channel layer, a drain electrode overlapping the channel layer and the source electrode, and a spacer disposed between the source electrode and the drain electrode.
    Type: Grant
    Filed: January 7, 2016
    Date of Patent: November 21, 2017
    Assignee: Samsung Display Co., Ltd.
    Inventors: Myung-Kwan Ryu, Eok-Su Kim, Kyoung Seok Son, Seung-Ha Choi, Sho-Yeon Kim, Hyun Kim, Eun-Hye Park, Byung-Hwan Chu
  • Publication number: 20170317105
    Abstract: Provided are a display device its method of manufacturing. The device includes a base; first and second thin-film transistors (TFT) on the base, adjacent to each; an organic layer covering the first and second TFT, comprising a first and second opening overlapping the drain electrodes of the first and second TFT, respectively; a common electrode on the organic layer comprising a common electrode opening overlapping the first opening and another common electrode opening overlapping the second opening; an insulating layer on a bump spacer which is on the common electrode; a first and second pixel electrode on the insulating layer overlapping the common electrode and electrically connected to the first and second TFT, respectively, wherein a minimum distance between the bump spacer and the common electrode opening is substantially equal to a minimum distance between the bump spacer and the other common electrode opening.
    Type: Application
    Filed: January 23, 2017
    Publication date: November 2, 2017
    Inventors: Seul Ki KIM, Seung Ha CHOI, Hyun KIM, Yun Seok HAN
  • Publication number: 20170102574
    Abstract: A display device is provided. The display device includes: a first substrate that comprises a first base substrate, an insulating layer located on the first base substrate, and a barrier layer located on the insulating layer; a second substrate that faces the first substrate; a liquid crystal layer that is located between the first substrate and the second substrate; and a first spacer that is located between the first substrate and the second substrate and is in contact with the first substrate, wherein the first substrate further comprises a second spacer that is located on the barrier layer and overlaps with the first spacer.
    Type: Application
    Filed: September 6, 2016
    Publication date: April 13, 2017
    Inventors: Hyun KIM, Seul Ki KIM, Seung Ha CHOI, Yun Seok HAN, Kap Soo YOON, Jeong Uk HEO
  • Publication number: 20170077246
    Abstract: A thin film transistor panel includes an insulating substrate, a gate insulating layer disposed on the insulating substrate, an oxide semiconductor layer disposed on the gate insulating layer, an etch stopper disposed on the oxide semiconductor layer, and a source electrode and a drain electrode disposed on the etch stopper.
    Type: Application
    Filed: November 4, 2016
    Publication date: March 16, 2017
    Inventors: Pil-Sang YUN, Ki-Won KIM, Hye-Young RYU, Woo-Geun LEE, Seung-Ha CHOI, Jae-Hyoung YOUN, Kyoung-Jae CHUNG, Young-Wook LEE, Je-Hun LEE, Kap-Soo YOON, Do-Hyun KIM, Dong-Ju YANG, Young-Joo CHOI