Patents by Inventor Seung-hun Lee

Seung-hun Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10925933
    Abstract: The present disclosure relates to a method of preventing rheumatoid arthritis comprising administering a polynucleotide encoding Ssu72.
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: February 23, 2021
    Assignee: CUROGEN TECHNOLOGY CO., LTD.
    Inventors: Mi-La Cho, Sung-Hwan Park, Seung-Ki Kwok, Jong-Young Choi, Seung-Hun Lee, Hyeon-Beom Seo, Young-Mee Moon, Jin-Sil Park, Min-Jung Park, Jin-Kwan Lee, Chang Woo Lee
  • Patent number: 10930668
    Abstract: A semiconductor device includes an active fin on a substrate, a gate electrode and intersecting the active fin, gate spacer layers on both side walls of the gate electrode, and a source/drain region in a recess region of the active fin at at least one side of the gate electrode. The source/drain region may include a base layer in contact with the active fin, and having an inner end and an outer end opposing each other in the first direction on an inner sidewall of the recess region. The source/drain region may include a first layer on the base layer. The first layer may include germanium (Ge) having a concentration higher than a concentration of germanium (Ge) included in the base layer. The outer end of the base layer may contact the first layer, and may have a shape convex toward outside of the gate electrode on a plane.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: February 23, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Namkyu Edward Cho, Seok Hoon Kim, Myung Ii Kang, Geo Myung Shin, Seung Hun Lee, Jeong Yun Lee, Min Hee Choi, Jeong Min Choi
  • Publication number: 20210050398
    Abstract: A display device and a method of manufacturing a display device are provided. A display device includes a first conductive layer on a first gate insulating film and including a first gate electrode and a first electrode of a capacitor connected to the first gate electrode, and a second conductive layer on the second interlayer insulating film and including a first and a second source/drain electrode, and a second electrode of the capacitor, the second electrode of the capacitor is in a trench structure in which the second interlayer insulating film is partially removed.
    Type: Application
    Filed: May 19, 2020
    Publication date: February 18, 2021
    Applicant: Samsung Display Co., LTD.
    Inventors: Myeong Ho KIM, Jay Bum KIM, Kyoung Seok SON, Seung Jun LEE, Seung Hun LEE, Jun Hyung LIM
  • Patent number: 10923726
    Abstract: An artificial solid electrolyte interphase (ASEI) of an anode for a secondary battery includes a first film composed of amino-functionalized, reduced graphene oxide (rGO) that is amino-functionalized by binding with polyethyleneimine present in an amount of from 1 to 50% by weight, based on total weight of the amino-functionalized, reduced graphene oxide (rGO) and that is disposed in contact with an anode material to protect the anode material; and a second film comprised of amino-functionalized, multi-walled carbon nanotubes that is amino-functionalized by binding with polyethyleneimine and that is stacked on the first film. An anode of a secondary battery including the ASEI enables rapid diffusion and stable deposition of lithium to inhibit the formation of dendrites. In a secondary battery including the anode, the ASEI prevents side reactions between a lithium metal anode and the electrolyte, achieving good electrochemical stability and high Coulombic efficiency.
    Type: Grant
    Filed: March 7, 2019
    Date of Patent: February 16, 2021
    Assignee: Korea Institute of Science and Technology
    Inventors: Won Il Cho, Mun Sek Kim, Seung Hun Lee, Min Seop Kim, Van Dung Do, In Wook Nah, In Hwan Oh
  • Patent number: 10923725
    Abstract: A method for producing an anode for a lithium metal secondary battery includes coating a thin film comprised of Nb2C, Ti2C or Ti3C2 on a substrate; providing a lithium metal electrode; and laminating the thin film to a surface of the lithium metal electrode. Coating is accomplished by providing a dispersion of a powder comprising Nb2C, Ti2C or Ti3C2; and coating the dispersion on the substrate by Langmuir-Blodgett scooping (LBS). The method may further include, prior to providing the dispersion, obtaining the powder by etching a MAX phase structure represented by Formula 1, Formula 2 or Formula 3 below: Nb2AC??(1); Ti2AC??(2); and Ti3AC2??(3), where A is a metal selected from among Group IIIA elements, Group IVA elements, Cd, and combinations thereof. The method may further include, after laminating the thin film, removing the substrate from the thin film.
    Type: Grant
    Filed: February 26, 2019
    Date of Patent: February 16, 2021
    Assignee: Korea Institute of Science and Technology
    Inventors: Won Il Cho, Mun Sek Kim, Ji Hyun Ryu, Seung Hun Lee
  • Patent number: 10903108
    Abstract: Semiconductor devices and methods of forming the same are provided. The methods may implanting dopants into a substrate to form a preliminary impurity region and heating the substrate to convert the preliminary impurity region into an impurity region. Heating the substrate may be performed at an ambient temperature of from about 800° C. to about 950° C. for from about 20 min to about 50 min. The method may also include forming first and second trenches in the impurity region to define an active tin and forming a first isolation layer and a second isolation layer in the first and second trenches, respectively. The first and second isolation layers may expose opposing sides of the active fin. The method may further include forming a gate insulation layer extending on the opposing sides and an upper surface of the active fin and forming a gate electrode traversing the active fin.
    Type: Grant
    Filed: January 12, 2018
    Date of Patent: January 26, 2021
    Inventors: Sunguk Jang, Seokhoon Kim, Seung Hun Lee, Yang Xu, Jeongho Yoo, Jongryeol Yoo, Youngdae Cho
  • Patent number: 10894086
    Abstract: The present invention relates to a functional hydrated hyaluronic acid and a method for producing 5th generation coated lactic acid bacteria having excellent intestinal mucoadhesive ability and a selective antagonism using the same and, more specifically, to a functional hydrated hyaluronic acid in which components fermented by lactic acid bacteria are captured in hyaluronic acid, which is a natural polymer substance, and a method for producing coated lactic acid bacteria using the same. The quadruply coated lactic acid bacteria coated using the functional hydrated hyaluronic acid according to the present invention is quadruply coated with a water-soluble polymer, a functional hydrated hyaluronic acid, a coating agent having porous particles, and a protein, thereby producing an excellent intestinal mucoadhesive ability, exhibiting an antibacterial action against deleterious bacteria in the intestines, and promoting growth of beneficial bacteria in the intestines.
    Type: Grant
    Filed: September 19, 2016
    Date of Patent: January 19, 2021
    Assignee: ILDONG PHARMACEUTICAL CO., LTD.
    Inventors: Seung-Hun Lee, Dae Jung Kang, Jae-Hoon Kang
  • Patent number: 10896957
    Abstract: A semiconductor device includes fin patterns on a substrate, at least one gate electrode intersecting the fin patterns, source/drain regions on upper surfaces of the fin patterns, and at least one blocking layer on a sidewall of a first fin pattern of the fin patterns, the at least one blocking layer extending above an upper surface of the first fin pattern of the fin patterns, wherein a first source/drain region of the source/drain regions that is on the upper surface of the first fin pattern has an asymmetric shape and is in direct contact with the at least one blocking layer.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: January 19, 2021
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Namkyu Edward Cho, Seung Soo Hong, Geum Jung Seong, Seung Hun Lee, Jeong Yun Lee
  • Patent number: 10876242
    Abstract: Provided is a washing apparatus and a method of controlling the same. The washing apparatus includes a washing tub; and a controller configured to determine whether laundry put into the washing tub is wet laundry or dry laundry, and to determine a weight of the laundry in the washing tub through a detection of wet laundry weight or a detection of dry laundry weight, based on a result of the determination. The washing apparatus includes a washing tub; and a controller configured to detect a water level of washing water in the washing tub, configured to perform at least one of detecting a weight of wet laundry weight and dry laundry according to the water level, and configured to allow washing to be performed according to at least one result of the detection of the wet laundry weight and the dry laundry weight.
    Type: Grant
    Filed: March 15, 2016
    Date of Patent: December 29, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyun Oh Kim, Seung Hun Lee, Jun Hyun Park, Sung Mo Lee, So Dam Han
  • Publication number: 20200403100
    Abstract: A semiconductor device includes a first fin type pattern on a substrate, a second fin type pattern, parallel to the first fin type pattern, on the substrate, and an epitaxial pattern on the first and second fin type patterns. The epitaxial pattern may include a shared semiconductor pattern on the first fin type pattern and the second fin type pattern. The shared semiconductor pattern may include a first sidewall adjacent to the first fin type pattern and a second sidewall adjacent to the second fin type pattern. The first sidewall may include a first lower facet, a first upper facet on the first lower facet and a first connecting curved surface connecting the first lower and upper facets. The second sidewall may include a second lower facet, a second upper facet on the second lower facet and a second connecting curved surface connecting the second lower and upper facets.
    Type: Application
    Filed: September 3, 2020
    Publication date: December 24, 2020
    Inventors: Seok Hoon KIM, Dong Myoung KIM, Dong Suk SHIN, Seung Hun LEE, Cho Eun LEE, Hyun Jung LEE, Sung Uk JANG, Edward Nam Kyu CHO, Min-Hee CHOI
  • Publication number: 20200388682
    Abstract: A semiconductor device includes a substrate, a device isolation layer on the substrate, the device isolation layer defining a first active pattern, a pair of first source/drain patterns on the first active pattern, the pair of first source/drain patterns being spaced apart from each other in a first direction, and each of the pair of first source/drain patterns having a maximum first width in the first direction, a first channel pattern between the pair of first source/drain patterns, a gate electrode on the first channel pattern and extends in a second direction intersecting the first direction, and a first amorphous region in the first active pattern, the first amorphous region being below at least one of the pair of first source/drain patterns, and having a maximum second width in the first direction that is less than the maximum first width.
    Type: Application
    Filed: December 19, 2019
    Publication date: December 10, 2020
    Inventors: Seojin JEONG, Jinyeong JOE, Seokhoon KIM, Jeongho YOO, Seung Hun LEE, Sihyung LEE
  • Publication number: 20200388311
    Abstract: A semiconductor apparatus includes a command decoding circuit and an enable signal generation circuit. The command decoding circuit generates a plurality of operation codes and a strobe pulse based on a command signal and a clock signal. The enable signal generation circuit generates a seed signal based on at least a part of an operation code, among the plurality of operation codes, and the strobe pulse, and generates an enable signal by shifting the seed signal. The enable signal generation circuit generates a plurality of guard keys, after the seed signal is generated, based on the plurality of operation codes and the strobe pulse, and prevents the generation of the enable signal when any one of the plurality of guard keys is disabled.
    Type: Application
    Filed: December 30, 2019
    Publication date: December 10, 2020
    Applicant: SK hynix Inc.
    Inventors: Seung Hun LEE, Hyeong Soo JEONG
  • Publication number: 20200381251
    Abstract: A method includes forming an active pattern on a substrate, the active pattern comprising first semiconductor patterns and second semiconductor patterns, which are alternately stacked, forming a capping pattern on a top surface and a sidewall of the active pattern, performing a deposition process on the capping pattern to form an insulating layer, and forming a sacrificial gate pattern intersecting the active pattern on the insulating layer. The capping pattern has a crystalline structure and is in physical contact with sidewalls of the first semiconductor patterns and sidewalls of the second semiconductor patterns.
    Type: Application
    Filed: April 2, 2020
    Publication date: December 3, 2020
    Inventors: JAEMUN KIM, GYEOM KIM, SEUNG HUN LEE, DAHYE KIM, ILGYOU SHIN, SANGMOON LEE, KYUNGIN CHOI
  • Patent number: 10844335
    Abstract: Disclosed is a post-chemical-mechanical-polishing cleaning composition, which is capable of effectively removing impurities from the surface of a wafer substrate after chemical mechanical polishing and also of preventing the corrosion of metal line materials, and which includes choline hydroxide, tetrabutylammonium hydroxide, 1,2,4-triazole, 2-hydroxypyridine, and the remainder of ultrapure water.
    Type: Grant
    Filed: March 6, 2018
    Date of Patent: November 24, 2020
    Assignee: YOUNG CHANG CHEMICAL CO., LTD
    Inventors: Seung Hun Lee, Seung Hyun Lee, Seong Hwan Kim
  • Publication number: 20200363724
    Abstract: A photoresist developer composition for an EUV (extreme ultraviolet) light source in a semiconductor-manufacturing process is proposed. Further, the photoresist developer composition for an EUV light source for forming a micropattern and a lithography process of forming a pattern on a semiconductor substrate using an EUV light source using the composition are proposed. The composition includes an aqueous solution containing 2 to 10 wt % of tetraethylammonium hydroxide (TEAH). When a photoresist is developed, an Eop is reduced, which shortens a process time, prevents a pattern from collapsing, and enables a pattern to have a uniform profile.
    Type: Application
    Filed: January 9, 2019
    Publication date: November 19, 2020
    Inventors: Su Jin LEE, Gi Hong KIM, Seung Hun LEE
  • Publication number: 20200349000
    Abstract: A memory device includes a plurality of memory chips storing and outputting data in response to a control command and an address command, at least one ECC memory chip providing an error check and correction (ECC) function on the data stored and output by the plurality of the memory chips, and a controller, marking a memory chip in which a defective memory cell is detected among the plurality of memory chips, as a defective memory chip, storing data of the defective memory chip in the ECC memory chip, and controlling the defective memory chip to execute a post package repair (PPR).
    Type: Application
    Filed: July 21, 2020
    Publication date: November 5, 2020
    Inventors: Hui Chung BYUN, Yoen Hwa LEE, Seung Hun LEE
  • Patent number: 10824314
    Abstract: The present invention provides a user terminal and a control method of the same, in which a first object is easily changed into a second object by moving to an edge region on a screen. The user terminal includes: an image processor configured to process an image; a display configured to display the processed image; and a controller configured to control the image processor so that a first object included in the image can be moved to an edge region on a screen of the display in response to a user's input for moving the first object to the edge region on the screen of the display, and the first object can be changed into a second object smaller than the first object and displayed on the display.
    Type: Grant
    Filed: April 26, 2016
    Date of Patent: November 3, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seung Hun Lee, Do Youn Kang, Sung Bae Park, Ju Yeon Lee, Jung Hwan Choi
  • Publication number: 20200332456
    Abstract: Provided is a washing machine including a main body having a first inlet, a drum arranged inside the main body to accommodate laundry, and a door configured to open and close the first inlet, wherein the door includes a second inlet to allow laundry to be introduced into the drum while the first inlet closed, an auxiliary door configured to open and close the second inlet, and a restraining device configured to restrain the auxiliary door such that the auxiliary door remains locked onto the door, and the main body includes a pressing device arranged inside the main body and configured to press the restraining device such that the restraining device locks the auxiliary door and to release from the retraining device such that the restraining device unlocks the auxiliary door.
    Type: Application
    Filed: April 20, 2020
    Publication date: October 22, 2020
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seongwoo YI, Jun-Young CHOI, Minhyung KIM, Joonho KIM, Dong-Il BACK, Byoungwoong AN, Seung-Hun LEE
  • Patent number: 10811541
    Abstract: A semiconductor device includes a gate electrode extending in a first direction on a substrate, a first active pattern extending in a second direction intersecting the first direction on the substrate to penetrate the gate electrode, the first active pattern including germanium, an epitaxial pattern on a side wall of the gate electrode, a first semiconductor oxide layer between the first active pattern and the gate electrode, and including a first semiconductor material, and a second semiconductor oxide layer between the gate electrode and the epitaxial pattern, and including a second semiconductor material. A concentration of germanium of the first semiconductor material may be less than a concentration of germanium of the first active pattern, and the concentration of germanium of the first semiconductor material may be different from a concentration of germanium of the second semiconductor material.
    Type: Grant
    Filed: January 23, 2019
    Date of Patent: October 20, 2020
    Assignees: Samsung Electronics Co., Ltd., Research & Business Foundation Sungkyunkwan University
    Inventors: Jin Bum Kim, Hyoung Sub Kim, Seong Heum Choi, Jin Yong Kim, Tae Jin Park, Seung Hun Lee
  • Publication number: 20200328290
    Abstract: A method of manufacturing a semiconductor device, the method including: forming, in a first region of a substrate, an active fin and a sacrificial gate structure intersecting the active fin; forming a first spacer and a second spacer on the substrate to cover the sacrificial gate structure; forming a mask in a second region of the substrate to expose the first region of the substrate; removing the second spacer from the first spacer in the first region of the substrate by using the mask; forming recesses at opposite sides of the sacrificial gate structure by removing portions of the active fin; forming a source and a drain in the recesses; and forming an etch-stop layer to cover both sidewalls of the sacrificial gate structure and a top surfaces of the source and drain.
    Type: Application
    Filed: November 18, 2019
    Publication date: October 15, 2020
    Inventors: HYUN KWAN YU, Seung Hun LEE, Yang XU