Abstract: In a method of controlling a battery system having a battery module comprising a plurality of battery sub modules connected in parallel between system terminals, the method includes: measuring voltage values of the plurality of battery sub modules and/or cells in the plurality of battery sub modules and current values that flow on the battery module; detecting an occurrence of an internal short in the battery module by monitoring the voltage values or the current values; and electrically separating at least one battery sub module in which the internal short occurs from among the plurality of battery sub modules from the system terminals in response to the internal short occurring in the battery module.

Abstract: An oriented electrical steel sheet according to an exemplary embodiment of the present invention includes C: 0.01% or less (excluding 0%), Si: 2.0%-4.0%, Mn: 0.01%-0.20%, acid soluble Al: 0.040% or less (excluding 0%), N: 0.008% (excluding 0%), S: 0.008% (excluding 0%), Se: 0.0001-0.008%, Cu: 0.002-0.1%, Ni: 0.005-0.1%, Cr: 0.005-0.1%, P: 0.005%-0.1% and Sn: 0.005%-0.20%, one or more among Sb: 0.0005%-0.10%, Ge: 0.0005%-0.10%, As: 0.0005%-0.10%, Pb: 0.0001%-0.10%, Bi: 0.0001%-0.10% and Mo: 0.001-0.1% as wt %, and consisting of the balance of Fe and other inevitable impurities, and after final secondary recrystallization, a magnetic flux density B8 is 1.92 Tesla or more.

Abstract: A non-oriented electrical steel sheet according to an embodiment of the present invention includes: in wt %, C at 0.004 wt % or less (excluding 0 wt %), Si at 2.5 to 4.0 wt %, P at 0.1 wt % or less (excluding 0 wt %), Al at 0.3 to 2.0 wt %, N at 0.003 wt % or less (excluding 0 wt %), S at 0.003 wt % or less (excluding 0 wt %), Mn at 0.15 to 2.5 wt %, Cr at 0.5 wt % (excluding 0 wt %), and the balance including Fe and other impurities unavoidably added thereto; satisfies the following Equation 1; and has an average grain size of 20 ?m or less. [Mn]?1450×[S]?0.8??[Equation 1] (In Equation 1, [Mn] and [S] represent a content (wt %) of Mn and S, respectively.

Abstract: A development cartridge which is mountable in an image forming apparatus includes a toner container portion to store toner and a toner refilling portion to receive, from a toner refill cartridge mountable to the toner refilling portion, toner to be stored in the toner container portion. The toner refilling portion includes an inlet shutter rotatable to an inlet position at which the toner is capable of being received by the toner refilling portion from the toner refill cartridge, and a shutter protrusion provided on a surface of the inlet shutter to, while the inlet shutter is rotated, contact an object and cause feedback indicating the inlet shutter is rotated to the inlet position.

Abstract: The present technology relates to a storage device and a method of operating the same. The storage device includes a memory controller configured to generate and output a get parameter command set, including normal addresses and a dummy address, during a parameter read operation, and a memory device configured to, in response to the get parameter command set, read parameter data that is stored in a CAM block and store the read parameter data in target registers corresponding to the normal addresses. The memory device stores dummy data in a dummy register corresponding to the dummy address.

Abstract: The present disclosure relates to an electronic device. A storage device includes a memory device configured to include a plurality of memory cells and a memory controller configured to determine a read voltage for a read operation to be performed on the memory device according to whether the read operation is a cache read operation.

Abstract: Provided herein may be a memory controller and a method of operating the same. The memory controller may include a read operation controller configured to provide a read command to a memory device and receive read data corresponding to the read command, a read fail determiner configured to determine, based on the read data, whether a read operation has passed or failed, and to generate read information including a result of the read operation and information about performance of the read operation and a read fail processor configured to select, based on the read information, one of a read retry operation, among a plurality of read retry operations, to be performed on the selected page and an operation of setting a control time for a bit line coupled to the selected page, and to control the memory device to perform the selected operation.

Abstract: In an electric handheld hair trimmer and method of operating the same, at least one of a first blade and a second blade of a blade assembly is operatively connected to a motor for driven movement in a working direction. A displacement mechanism is operable to selectively displace at least one of the first blade and the second blade independent of operation of the motor. The displacement mechanism includes at least one of an actuator or a separator. The actuator is movable along the longitudinal axis relative to the body and operatively connected to the second blade to selectively move the second blade along the longitudinal axis relative to the first blade independent of operation of the motor. The separator is operable independently of the motor and is positionable between the first blade and the second blade to at least in part separate the first blade from the second blade.

Abstract: The present technology relates to a memory system and a method of operating the memory system. The memory system includes a memory device including a plurality of memory blocks, the memory device configure to perform on each of the plurality of memory blocks at least one of a program operation, a read operation, or an erase operation in response to an internal command; and a controller in communication with a host and the memory device and configured to receive a request from the host and generate the internal command in response to the request from the host, the controller further configured to control the memory device to perform a stress check operation on a first memory block of the plurality of memory blocks in which the program operation has been completed.

Abstract: The memory controller controls a memory device. The controller is configured to determine to perform a target operation on a first memory block and determine an activation voltage level transferred to a block word line based on block state information of a second memory block.

Abstract: The present disclosure relates to an electronic device. A storage device includes a memory device configured to include a plurality of memory cells and a memory controller configured to determine a read voltage for a read operation to be performed on the memory device according to whether the read operation is a cache read operation.

Abstract: In a method of controlling a battery system having a battery module comprising a plurality of battery sub modules connected in parallel between system terminals, the method includes: measuring voltage values of the plurality of battery sub modules and/or cells in the plurality of battery sub modules and current values that flow on the battery module; detecting an occurrence of an internal short in the battery module by monitoring the voltage values or the current values; and electrically separating at least one battery sub module in which the internal short occurs from among the plurality of battery sub modules from the system terminals in response to the internal short occurring in the battery module.

Abstract: A method of operating a controller that controls an operation of a semiconductor memory device includes controlling the semiconductor memory device to perform an operation for a selected memory block, determining whether or not the operation is successful, and compensating for a change in a threshold voltage distribution of select transistors by changing an operation voltage applied to the select transistors included in the selected memory block, based on whether or not the operation is successful.

Abstract: A memory controller for controlling a memory device including a register for storing a plurality of parameters includes: a register information storage configured to store the plurality of parameters as a plurality of setting parameters, a register controller configured to provide the memory device with a parameter change command for requesting a selected parameter to be changed to a set value, and acquire, from the memory device, Cyclic Redundancy Check (CRC) calculation information on the plurality of parameters including the selected parameter, a CRC reference information generator configured to generate CRC reference information on the plurality of setting parameters including at least one setting parameter changed to the set value, and a CRC information comparator configured to determine whether an error is included in the plurality of parameters according to a comparison result between the CRC calculation information and the CRC reference information.

Abstract: The present disclosure relates to an electronic device. A storage device includes a memory device configured to include a plurality of memory cells and a memory controller configured to determine a read voltage for a read operation to be performed on the memory device according to whether the read operation is a cache read operation.

Abstract: The present technology relates to a storage device and a method of operating the same. The storage device includes a memory controller configured to generate and output a get parameter command set, including normal addresses and a dummy address, during a parameter read operation, and a memory device configured to, in response to the get parameter command set, read parameter data that is stored in a CAM block and store the read parameter data in target registers corresponding to the normal addresses. The memory device stores dummy data in a dummy register corresponding to the dummy address.

Abstract: The present technology relates to a memory system and a method of operating the memory system. The memory system includes a memory device including a plurality of memory blocks, the memory device configure to perform on each of the plurality of memory blocks at least one of a program operation, a read operation, or an erase operation in response to an internal command; and a controller in communication with a host and the memory device and configured to receive a request from the host and generate the internal command in response to the request from the host, the controller further configured to control the memory device to perform a stress check operation on a first memory block of the plurality of memory blocks in which the program operation has been completed.

Abstract: The memory controller controls a memory device. The controller is configured to determine to perform a target operation on a first memory block and determine an activation voltage level transferred to a block word line based on block state information of a second memory block.

Abstract: A method of operating a controller that controls an operation of a semiconductor memory device includes controlling the semiconductor memory device to perform an operation for a selected memory block, determining whether or not the operation is successful, and compensating for a change in a threshold voltage distribution of select transistors by changing an operation voltage applied to the select transistors included in the selected memory block, based on whether or not the operation is successful.

Abstract: A memory system includes a memory device including a first memory region of higher density storage and a second memory region of lower density storage; and a controller configured to control the memory device to sequentially perform a backup program operation to the second memory region and perform coarse program and fine program operations to the first memory region for each of data chunks, wherein the controller controls, for at least two among the data chunks, the memory device to first perform the coarse program and then perform the fine program operation, and wherein the controller controls the memory device to perform the backup program operation without a program verify process.