Patents by Inventor Seung Min Oh

Seung Min Oh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8489528
    Abstract: Various embodiments of the invention are neural network adaptive control systems and methods configured to concurrently consider both recorded and current data, so that persistent excitation is not required. A neural network adaptive control system of the present invention can specifically select and record data that has as many linearly independent elements as the dimension of the basis of the uncertainty. Using this recorded data along with current data, the neural network adaptive control system can guarantee global exponential parameter convergence in adaptive parameter estimation problems. Other embodiments of the neural network adaptive control system are also disclosed.
    Type: Grant
    Filed: July 28, 2010
    Date of Patent: July 16, 2013
    Assignee: Georgia Tech Research Corporation
    Inventors: Girish V. Chowdhary, Eric N. Johnson, Seung Min Oh
  • Patent number: 8482996
    Abstract: Various embodiments of a nonvolatile memory apparatus configured to operate in a first operation mode and a second operation mode are disclosed. In one exemplary embodiment, the apparatus may include: a controller configured to enable complementary signal input/output buffers in response to a command for entry into the first operation mode and disable the complementary signal input/output buffers in response to a command for transition to the second operation mode while operating under the first operation mode.
    Type: Grant
    Filed: December 14, 2010
    Date of Patent: July 9, 2013
    Assignee: SK Hynix Inc.
    Inventor: Seung Min Oh
  • Publication number: 20130099833
    Abstract: An integrated circuit chip includes: an internal circuit; a data output circuit configured to output a data packet of the internal circuit in response to a strobe signal; an oscillator configured to generate a first clock signal; a divider configured to divide the first clock signal and generate a second clock signal; and a strobe signal supply unit configured to supply the second clock signal as the strobe signal during an initial period of transmission of the data packet and supply the first clock signal as the strobe signal after the initial period.
    Type: Application
    Filed: September 11, 2012
    Publication date: April 25, 2013
    Inventor: Seung-Min OH
  • Publication number: 20130103868
    Abstract: An integrated circuit system includes: a master chip; a slave chip configured to operate under a control of the master chip; and a data channel configured to transfer data between the master chip and the slave chip, wherein a data transfer rate from the master chip to the slave chip through the data channel is different from a data transfer rate from the slave chip to the master chip through the data channel.
    Type: Application
    Filed: September 11, 2012
    Publication date: April 25, 2013
    Inventor: Seung-Min OH
  • Publication number: 20130099830
    Abstract: An integrated circuit chip includes a first single ended type buffer configured to receive a first signal through a first pad, a second single ended type buffer configured to receive a second signal through a second pad, a differential type buffer configured to receive a third signal through the first pad and the second pad, a strobe input unit configured to receive a strobe signal synchronized with the third signal inputted to the first pad and the second pad, and a buffer control unit configured to control activation of the first and second single ended type buffers and the differential type buffer in response to the strobe signal.
    Type: Application
    Filed: September 7, 2012
    Publication date: April 25, 2013
    Inventor: Seung-Min OH
  • Patent number: 8303928
    Abstract: The present invention relates to a fluorine-containing magnesium oxide powder using a vapor phase reaction and a method of preparing the same and more particularly to a fluorine-containing magnesium oxide powder brings about a cathode-luminescence emission having a peak within a wavelength range of 220 to 320 nm upon being excited by electron beams. The present invention provides a fluorine-containing magnesium oxide powder using a vapor phase reaction that sprays fluorine-containing gas and oxygen-containing gas to magnesium vapor, and the purity of magnesium oxide containing fluorine (i.e. the purity of fluorine-containing magnesium oxide) of 0.001 to 2 wt % is at least 98 wt % and a BET specific surface area thereof is 0.1 to 50 m2/g.
    Type: Grant
    Filed: January 26, 2011
    Date of Patent: November 6, 2012
    Assignee: Daejoo Electronic Materials Co, Ltd.
    Inventors: Seung-min Oh, Jong-hoon Byun, Yoon-gu Hwang
  • Publication number: 20120170671
    Abstract: An integrated circuit chip includes: a plurality of input pads; a plurality of first buffers respectively coupled with the input pads; and a plurality of second buffers respectively coupled with the input pads, wherein the first buffers are configured to receive signals of a higher frequency than the second buffer, wherein the second buffers and the first buffers are configured to selectively output the signals input to the selected buffers according to an operation mode that is set in response to an input signal.
    Type: Application
    Filed: December 21, 2011
    Publication date: July 5, 2012
    Inventor: Seung-Min OH
  • Publication number: 20120169370
    Abstract: A system includes an input/output channel and a plurality of chips coupled to the input/output channel, wherein only one chip of the plurality of chips performs a termination operation for impedance matching of the input/output channel.
    Type: Application
    Filed: December 21, 2011
    Publication date: July 5, 2012
    Inventor: Seung-Min OH
  • Publication number: 20120170383
    Abstract: A system includes integrated circuit chip including a first buffer configured to receive signals and a second buffer configured to receive signals, wherein the first buffer receives signals of a higher frequency than the second buffer, a controller chip configured to control the integrated circuit chip, an I/O channel formed between the controller chip and the integrated circuit chip to transfer a first signal and a second speed signal, wherein the first signal has a higher frequency than the second signal, and a status channel formed between the controller chip and the integrated circuit chip to transfer at least one status signal, wherein the integrated circuit chip is configured to select one of the first buffer and the second buffer and actives the selected buffer in response to the at least one status signal and receive a signal transferred through the I/O channel.
    Type: Application
    Filed: December 21, 2011
    Publication date: July 5, 2012
    Inventor: Seung-Min OH
  • Publication number: 20120170384
    Abstract: An integrated circuit includes an input pad configured to receive a low-speed signal and a high-speed signal, a high-speed buffer coupled to the input pad, a low-speed buffer coupled to the input pad, a strobe input unit configured to receive a strobe signal for indicating an input of the high-speed signal to the input pad, and a buffer control unit configured to control an activation of the high-speed buffer in response to the strobe signal.
    Type: Application
    Filed: December 29, 2011
    Publication date: July 5, 2012
    Inventor: Seung-Min OH
  • Publication number: 20120170593
    Abstract: A method for transmitting a data packet includes transmitting the data packet at a first frequency during an initial period for transmitting the data packet and transmitting the data packet at a second frequency different from the first frequency after the initial period.
    Type: Application
    Filed: December 21, 2011
    Publication date: July 5, 2012
    Inventor: Seung-Min OH
  • Patent number: 8184483
    Abstract: A nonvolatile memory device includes a memory cell array, including a first memory cell group configured to store data and a second memory cell group configured to store operation information, including first and second program start voltages, a page buffer unit, including page buffers each configured to store program data for memory cells or store data read from the memory cells, and a control unit configured to, when a program operation is first performed after power is supplied, count a number of program pulses until a verification operation using a first verification voltage is a pass, compare the counted number and a first number of program pulses, select either the first or second program start voltages according to a result of the comparison, and control the program operation to be performed using the selected program start voltage until the power is off.
    Type: Grant
    Filed: May 26, 2010
    Date of Patent: May 22, 2012
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seung Min Oh
  • Publication number: 20120098576
    Abstract: A data output driver includes a pull-up output pre-driver configured to output a plurality of pull-up signals, wherein whether each of the plurality of pull-up signals is enabled is determined in accordance with a driver mode signal, a pull-down output pre-driver configured to output a plurality of pull-down signals, wherein whether each of the plurality of pull-down signals is enabled is determined in accordance with the driver mode signal, and an output driver circuit configured to output data, wherein a driver strength of the output driver circuit is determined in accordance with the pull-up signals and pull-down signals.
    Type: Application
    Filed: October 25, 2011
    Publication date: April 26, 2012
    Applicant: HYNIX SEMICONDUCTOR INC.
    Inventor: Seung Min OH
  • Publication number: 20120081981
    Abstract: Various embodiments of a nonvolatile memory apparatus configured to operate in a first operation mode and a second operation mode are disclosed. In one exemplary embodiment, the apparatus may include: a controller configured to enable complementary signal input/output buffers in response to a command for entry into the first operation mode and disable the complementary signal input/output buffers in response to a command for transition to the second operation mode while operating under the first operation mode.
    Type: Application
    Filed: December 14, 2010
    Publication date: April 5, 2012
    Applicant: Hynix Semiconductor Inc.
    Inventor: Seung Min OH
  • Publication number: 20120029135
    Abstract: The present invention provides a polyphenylene sulfide synthetic hair filament. The synthetic hair filament comprises (A) a polyphenylene sulfide resin; and (B) an inorganic particle quencher additive, wherein said PPS resin melt index range is 60˜110, wherein said inorganic quencher additive is added at 0.1˜2.0 parts by weight on a 100 parts by weight PPS resin. The synthetic hair filament has a filament size of about 30 to about 80 dtex. The polyphenylene sulfide resin (A) has a p-phenylene sulfide repeating unit above 85% mole. The inorganic particle quencher additive may be of silicon dioxide, talc or the combinations thereof. A suitable inorganic particle quencher additive has an average diameter range of 0.01˜3.0 ?m.
    Type: Application
    Filed: October 7, 2010
    Publication date: February 2, 2012
    Applicant: UNO & COMPANY LTD.
    Inventors: Jong Chun Kim, Hwan Chul Kim, Chan Young Kim, Seung Min Oh
  • Patent number: 8018775
    Abstract: A nonvolatile memory device having a memory cell array configured to include a number of memory cells coupled to a bit line, a control circuit configured to output a code signal in response to a verification operation command signal during a verification operation being performed, a page buffer operation voltage generator configured to generate a precharge signal and a sense signal in response to the code signal, and a page buffer configured to precharge the bit line in response to the precharge signal and to sense data programmed into the memory cell in response to the sense signal. A sense signal having a sequentially lowered voltage level is outputted in response to the verification operation being repeatedly performed.
    Type: Grant
    Filed: December 31, 2009
    Date of Patent: September 13, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seung Min Oh
  • Patent number: 7972586
    Abstract: The present invention relates to a fluorine-containing magnesium oxide powder using a vapor phase reaction and a method of preparing the same and more particularly to a fluorine-containing magnesium oxide powder brings about a cathode-luminescence emission having a peak within a wavelength range of 220 to 320 nm upon being excited by electron beams. The present invention provides a fluorine-containing magnesium oxide powder using a vapor phase reaction that sprays fluorine-containing gas and oxygen-containing gas to magnesium vapor, and the purity of magnesium oxide containing fluorine (i.e. the purity of fluorine-containing magnesium oxide) of 0.001 to 2 wt % is at least 98 wt % and a BET specific surface area thereof is 0.1 to 50 m2/g.
    Type: Grant
    Filed: September 18, 2008
    Date of Patent: July 5, 2011
    Assignee: Daejoo Electronic Materials Co., Ltd.
    Inventors: Seung-min Oh, Jong-hoon Byun, Yoon-gu Hwang
  • Publication number: 20110161267
    Abstract: Various embodiments of the invention are neural network adaptive control systems and methods configured to concurrently consider both recorded and current data, so that persistent excitation is not required. A neural network adaptive control system of the present invention can specifically select and record data that has as many linearly independent elements as the dimension of the basis of the uncertainty. Using this recorded data along with current data, the neural network adaptive control system can guarantee global exponential parameter convergence in adaptive parameter estimation problems. Other embodiments of the neural network adaptive control system are also disclosed.
    Type: Application
    Filed: July 28, 2010
    Publication date: June 30, 2011
    Applicant: Georgia Tech Research Corporation
    Inventors: Girish V. Chowdhary, Eric N. Johnson, Seung Min Oh
  • Publication number: 20110117005
    Abstract: The present invention relates to a fluorine-containing magnesium oxide powder using a vapor phase reaction and a method of preparing the same and more particularly to a fluorine-containing magnesium oxide powder brings about a cathode-luminescence emission having a peak within a wavelength range of 220 to 320 nm upon being excited by electron beams. The present invention provides a fluorine-containing magnesium oxide powder using a vapor phase reaction that sprays fluorine-containing gas and oxygen-containing gas to magnesium vapor, and the purity of magnesium oxide containing fluorine (i.e. the purity of fluorine-containing magnesium oxide) of 0.001 to 2 wt % is at least 98 wt % and a BET specific surface area thereof is 0.1 to 50 m2/g.
    Type: Application
    Filed: January 26, 2011
    Publication date: May 19, 2011
    Applicant: DAEJOO ELECTRONIC MATERIALS CO., LTD.
    Inventors: Seung-min Oh, Jong-hoon Byun, Yoon-gu Hwang
  • Patent number: 7919988
    Abstract: An output circuit includes a pre-driving unit configured to drive an input signal by using a different driving power according to an output operation mode and generate pull-up and pull-down signals corresponding to the resultant input signal and an output driving unit configured to output data in response to the pull-up and pull-down signals.
    Type: Grant
    Filed: June 29, 2009
    Date of Patent: April 5, 2011
    Assignee: Hynix Semiconductor Inc.
    Inventor: Seung-Min Oh