Abstract: A method for forming device isolation film of semiconductor device is provided, the method including forming a pad oxide film, a pad nitride film, and an oxide film for device isolation on a semiconductor substrate, etching a predetermined region of the oxide film for device isolation, the pad nitride film, the pad oxide film, and the semiconductor substrate to form a trench, forming a SEG silicon layer in the trench to form an active region, and forming a gap-fill insulating film on the resulting structure having a gap between sidewalls of the trench and the SEG silicon layer.

Abstract: Provided is a method for manufacturing a semiconductor device comprising forming a device isolation layer on a semiconductor substrate; forming gate insulating layers on the upper part of the semiconductor substrate having the device isolation layers formed thereon; forming an undoped layer for a gate electrode; implanting mixed dopant ions consisting of at least two dopant ions containing 11B ions into the undoped layer, utilizing an ion-implantation mask; and heat-treating the mixed dopant ion-implanted layer.

Abstract: Disclosed is an ion implantation method capable of preventing a channeling phenomenon caused by a lattice structure of a semiconductor substrate. The ion implantation method includes the steps of forming a predetermined mask pattern on the semiconductor substrate, performing an ion implantation process with respect to the semiconductor substrate exposed by the predetermined mask without forming a tilt angle, thereby forming an impurity area in the semiconductor substrate, and applying vibration to a lattice structure of the semiconductor substrate when the ion implantation process is carried out with respect to the semiconductor substrate.

Abstract: Disclosed are an ion implantation apparatus and a method for implanting ions by using the same. The ion implanter for implanting ions into a wafer, includes: a first quadrupole magnet assembly for focusing an ion beam transmitted from an ion beam source; a scanner for deflecting the transmitted ion beam in the directions of an X-axis and an Y-axis; a second quadrupole magnet assembly for converging and diverging the ion beam passing through the scanner in the directions of the X- and Y-axes; and a beam parallelizer for rotating the ion beam in synchronization with the second quadrupole magnet assembly, thereby implanting the ion beam into the wafer.

Abstract: The present invention relates to a method for fabricating a semiconductor device with a landing plug contact structure. The method includes the steps of: forming a plurality of gate structures on a substrate; sequentially forming a first spacer and a second spacer on sidewalls of each gate structure; forming a plurality of landing plug contacts in a predetermined regions created between the gate structures; and forming a passivation layer on a resulting substrate structure including the first and the second spacers, the landing plug contacts and the gate structures. Particularly, the passivation layer which serves to prevent hydrogen ions from diffusing into a channel region is obtained by doping an N-type dopant capable of capturing hydrogen ions. The passivation layer is also obtained by forming a nitride layer capable of preventing the diffusion of hydrogen ions.

Abstract: In a silicon substrate having a contact hole in a device region, the contact resistance between the contact plug and the silicon substrate is reduced by preventing formation of an undesirable layer therebetween by treating the exposed surface of the substrate before forming the contact plug. Further, a two-layered contact plug consisting of a first contact plug layer having high impurity concentration and a second contact plug layer having low impurity concentration, on the interlayer insulating film including the exposed surface of the substrate. The interface between the silicon substrate and the contact plug is thermally treated at low temperature, and the first contact plug layer having high impurity concentration and the second contact plug layer having low impurity concentration, are formed, so that the resistance between the silicon substrate and the contact plug can be reduced, thereby increasing the operation speed of the device. thereby increasing the operation speed of the device.

Abstract: The present invention provides a method for implanting ions in a semiconductor device capable of compensating for a difference in threshold voltages between a central portion and edge portions of a substrate generated while performing uniform ion implantation to entire surfaces of a substrate and another method for fabricating a semiconductor device capable of improving distribution of transistor parameters inside a substrate by forming a nonuniform channel doping layer or by forming a nonuniform junction profile.

Abstract: The present invention relates to a method for fabricating a semiconductor device. The method comprises the steps of: 1. A method for fabricating a semiconductor device, which comprises the steps of: forming a gate line on a semiconductor substrate; forming junction regions in the semiconductor substrate at both sides of the gate line; forming and selectively removing an interlayer insulating film on the substrate to form contact holes exposing the junction regions; forming plugs in the contact holes; and implanting impurity ions into the plugs; and annealing the junction regions.

Abstract: Disclosed is an ion implantation method capable of preventing a channeling phenomenon caused by a lattice structure of a semiconductor substrate. The ion implantation method includes the steps of forming a predetermined mask pattern on the semiconductor substrate, performing an ion implantation process with respect to the semiconductor substrate exposed by the predetermined mask without forming a tilt angle, thereby forming an impurity area in the semiconductor substrate, and applying vibration to a lattice structure of the semiconductor substrate when the ion implantation process is carried out with respect to the semiconductor substrate.

Abstract: The present invention relates to a method for fabricating a semiconductor device. The method comprises the steps of: 1. A method for fabricating a semiconductor device, which comprises the steps of: forming a gate line on a semiconductor substrate; forming junction regions in the semiconductor substrate at both sides of the gate line; forming and selectively removing an interlayer insulating film on the substrate to form contact holes exposing the junction regions; forming plugs in the contact holes; and implanting impurity ions into the plugs; and annealing the junction regions.

Abstract: The present invention relates to a method for fabricating a semiconductor device. The method comprises the steps of: forming a gate line on a semiconductor substrate; forming a buffer layer and a spacer nitride film on the entire surface of the substrate including the gate line; selectively etching the buffer layer and the spacer nitride film in such a manner that they remain on both sides of the gate line; performing an ion implantation process using the remaining buffer layer and spacer nitride film as a barrier film to form junction regions in the semiconductor substrate at both sides of the gate line; forming an interlayer insulating film on the entire upper portion of the resulting substrate; selectively removing the interlayer insulating film to form contact holes exposing the upper surface of the junction regions; and forming contact plugs in the contact holes.

Abstract: A method for forming capacitor of semiconductor device wherein a stacked structure of Al-rich HfO2—Al2O3 film and Hf-rich HfO2—Al2O3 film or a stacked structure of Al2O3 film and Hf-rich HfO2—Al2O3 film is used as a dielectric film is disclosed. The method comprises (a) forming an oxide film on an interlayer insulating film having a storage electrode contact plug; (b) selectively etching the oxide film to form an opening exposing the top surface of the storage electrode contact plug; (c) forming a conductive layer on the bottom and the inner walls of the opening; (d) removing the oxide film to form a storage electrode; (e) forming a dielectric film having a stacked structure of Al-rich HfO2—Al2O3 film and Hf-rich HfO2—Al2O3 film on the surface of the storage electrode; (f) annealing the dielectric film; and (g) forming a plate electrode on the dielectric film.

Abstract: A method for forming a transistor of a semiconductor device wherein a deposition of a buffering oxide film prior to deposition of a nitride film for a gate spacer is performed at a low temperature to prevent out-diffusion of impurities implanted in a source/drain region, thereby providing a semiconductor device with low contact resistance for a bitline and a storage electrode is disclosed. The method for forming a transistor of a semiconductor device comprises the steps of: forming a gate electrode on a semiconductor substrate; ion-implanting impurities into the semiconductor substrate using the gate electrode as a mask to form a source/drain junction region; forming an oxide film on the resulting structure at a temperature below 700° C.; and forming a nitride film spacer on a sidewall of the gate electrode.

Abstract: The present invention relates to a method for fabricating a semiconductor device, which comprises the steps of: forming a device isolation film defining a device region in a silicon substrate; depositing a conductive layer on the substrate and patterning the deposited conductive layer so as to form a gate electrode on the substrate; implanting impurity ions into the substrate so as to form junction regions in the substrate; forming an interlayer insulating film on the substrate and selectively patterning the interlayer insulating film so as to partially expose the surface of the substrate; treating the exposed surface of the substrate; and forming a two-layered contact plug consisting of a first contact plug layer having high impurity concentration and a second contact plug layer having low impurity concentration, on the interlayer insulating film including the exposed surface of the substrate.

Abstract: A method for forming a capacitor by stacking impurity-doped polysilicon layers having different concentrations to form a bottom electrode, treating surfaces of the bottom electrode to prevent a low dielectric constant material from being generated on the surface of the bottom electrode, and forming a dielectric layer and a top electrode on the bottom electrode.

Abstract: A method for forming a capacitor by stacking impurity-doped polysilicon layers having different concentrations to form a bottom electrode, treating surfaces of the bottom electrode to prevent a low dielectric constant material from being generated on the surface of the bottom electrode, and forming a dielectric layer and a top electrode on the bottom electrode.

Abstract: The president invention discloses a method of manufacturing a semiconductor device, comprising the steps of: defining a cell region for an NMOS element and a peripheral circuit region for NMOS and PMOS elements on a semiconductor substrate; forming a sacrifice oxide film and an ion barrier oxide film on the entire structure after the defining process; performing ion injection process on the cell region and the peripheral circuit region, so that a low concentration impurity injection region therein is formed; removing the ion barrier oxide film formed on the cell region and the peripheral circuit region; performing ion injection process on selected regions of the cell region and the peripheral circuit region; injecting ions for adjusting a threshold voltage into selected regions of the cell region and the peripheral circuit region; performing ion injection process on the low concentration impurity regions of the cell region and the peripheral circuit region, so that R-well region and a P-well region are formed