Patents by Inventor Shailesh Kumar

Shailesh Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240147572
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a user equipment (UE) or component thereof. The apparatus may be configured to transmit to a base station a first request to transmit data in a buffer. The apparatus may be further configured to transmit to the base station a second request to transmit the data in the buffer in absence of a grant in response to the first transmit request. The apparatus may be further configured to remain awake for at least a portion of a scheduled discontinuous reception (DRX) sleep state following the transmission of the second request.
    Type: Application
    Filed: March 10, 2021
    Publication date: May 2, 2024
    Inventors: Shweta Jaikrishna DASS, Krishna Chaitanya BELLAM, Shailesh MAHESHWARI, Vishal DALMIYA, Gang Andy XIAO, Vaishakh RAO, Sathish Kumar NALLAMANTI, Leena ZACHARIAS, Touseef KHAN, Sridhar RAMANUJAM, Nan ZHANG, Xiaojian LONG, Ajeet KUMAR
  • Patent number: 11956122
    Abstract: Certain aspects of the present disclosure are generally directed to techniques for selecting a configuration for communication using vehicle to everything (V2X) type communication protocol. Certain aspects provide a method for wireless communication by a user-equipment (UE). The method generally includes determining one or more parameters corresponding to quality of service (QoS) information for communication of data using a V2X communication protocol, reporting the one or more parameters by transmitting a first message, receiving a second message indicating configuration information corresponding to the communication of the data using the V2X communication protocol, and communication the data based on the configuration information.
    Type: Grant
    Filed: May 10, 2022
    Date of Patent: April 9, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Hong Cheng, Michaela Vanderveen, Junyi Li, Shailesh Patil, Sudhir Kumar Baghel, Zhibin Wu
  • Patent number: 11956757
    Abstract: A user equipment (UE) may communicate with one or more other UEs using multiple transmissions in a device-to-device (D2D) communications deployment. A number of UEs may be configured with D2D resources, and a transmitting UE may identify available D2D resources from the configured resources. The transmitting UE may identify a resource for a first transmission of a D2D transmission from the available D2D resources, and may identify a second resource for a second transmission of the D2D transmission. The second transmission may be a blind HARQ transmission that may be transmitted to enhance the likelihood that one or more receiving UEs successfully receive the transmission. In some examples, the second resource may be identified based on other available resources within an predetermined time window around the first transmission.
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: April 9, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Kapil Gulati, Sudhir Kumar Baghel, Shailesh Patil, Tien Viet Nguyen, Zhibin Wu
  • Patent number: 11956808
    Abstract: This disclosure provides systems, methods, and apparatus, including computer programs encoded on computer-readable media, for managing scheduling requests (SRs) in a user equipment (UE) that supports a split data radio bearer (DRB). In some aspects, the UE may trigger a first SR for a first communication link and a second SR for a second communication link in response to determining that a first amount of data in the UE data buffer is greater than a first threshold. The UE may transmit the first SR to a first base station (BS) via the first communication link. Prior to transmission of the second SR, the UE may determine whether a second amount of data in the UE data buffer is less than a second threshold. The UE may cancel the second SR in response to the second amount of data in the UE data buffer being less than the second threshold.
    Type: Grant
    Filed: September 23, 2021
    Date of Patent: April 9, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Akshay Kumar, Arnaud Meylan, Leena Zacharias, Michel Chauvin, Vishal Dalmiya, Ambarish Tripathi, Shailesh Maheshwari, Sathyanarayanan Raghunathan, Baojun Lu
  • Patent number: 11950196
    Abstract: Aspects of the present disclosure provide synchronization techniques for user equipment (UEs) that may be otherwise unable to support sidelink communication a synchronized UE and may have also lost global navigation satellite system (GNSS) and/or Evolved Node Base Stations (eNBs) as a synchronization source. In such instance, the unsynchronized UE may utilize reference signals (RS) from the data packets received from other UEs to track the timing and perform autonomous timing adjustments based thereon for synchronized packet transmission or reception.
    Type: Grant
    Filed: December 6, 2021
    Date of Patent: April 2, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Kapil Gulati, Shailesh Patil, Sudhir Kumar Baghel, Naga Bhushan, Tien Viet Nguyen, Arjun Bharadwaj
  • Patent number: 11950126
    Abstract: Aspects described herein relate to receiving, over a sub-channel of multiple sub-channels, ultra-reliable quality-of-service (QoS) traffic from one or more UEs over a time duration wherein other sub-channels of the multiple sub-channels are used for initial ultra-reliable QoS transmissions from one or more other transmitting UEs over the time duration, and relaying, along with one or more other relaying UEs, the ultra-reliable QoS traffic over a subsequent time duration.
    Type: Grant
    Filed: November 16, 2022
    Date of Patent: April 2, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Tien Viet Nguyen, Shailesh Patil, Sudhir Kumar Baghel, Junyi Li, Kapil Gulati
  • Publication number: 20240094358
    Abstract: The present disclosure relates to devices, light detection and ranging (lidar) systems, and vehicles involving solid-state, single photon detectors. An example device includes a substrate defining a primary plane and a plurality of photodetector cells disposed along the primary plane. The plurality of photodetector cells includes at least one large-area cell and at least one small-area cell. The large-area cell has a first area and the small-area cell has a second area and the first area is greater than the second area. The device also includes read out circuitry coupled to the plurality of photodetector cells. The read out circuitry is configured to provide an output signal based on incident light detected by the plurality of photodetector cells.
    Type: Application
    Filed: November 29, 2023
    Publication date: March 21, 2024
    Inventors: Caner Onal, Nirav Shailesh kumar Dharia
  • Patent number: 11936483
    Abstract: In an aspect of the disclosure, a method, a computer-readable medium, and an apparatus are provided. The apparatus may be a UE. The apparatus may receive from a second device a first data packet in one or more receiving slots of a time division duplex frame that includes a plurality of slots. The apparatus may determine whether the first data packet is received incorrectly. The apparatus may wait until the end of the one or more receiving slots and may transmit to the second device a first NACK in a NACK feedback symbol in a configured slot after the end of the one or more receiving slots in response to determining that the first data packet was not received correctly.
    Type: Grant
    Filed: December 8, 2022
    Date of Patent: March 19, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Arjun Bharadwaj, Kapil Gulati, Sudhir Kumar Baghel, Shailesh Patil, Naga Bhushan
  • Publication number: 20240089751
    Abstract: The present invention provides a method and system for predicting tropospheric interference using a digital twin model for detecting tropospheric interference and suggesting actions for mitigating the effects of the tropospheric interference. The system (110) may include a machine learning engine (216) having a digital twin model to predict/score the likelihood of cell pairs having the tropospheric interference at a given point of time using cell configuration data, weather data, Hepburn data at that point of time by identifying cell pairs whose likelihood of interference is high. The system (110) is further configured to explore the effect of changing cell configuration parameters like remote electrical tilt and identify actions that can mitigate tropospheric interference with minimal impact on coverage.
    Type: Application
    Filed: July 28, 2022
    Publication date: March 14, 2024
    Inventors: Shailesh KUMAR, Krusheel MUNNANGI, Meghna PUSALA, Vinit LUDHANI
  • Patent number: 11917458
    Abstract: The disclosure relates in some aspects to sharing wireless communication resources. For example, a first type of device allocated to use a first resource pool may dynamically use a second resource pool allocated for a second type of device. The first type of device may use an entry criteria to determine whether to use the second resource pool. In some aspects, the entry criteria may specify that resource sharing is permitted if a ratio of resources used by devices of the second type (relative to the total resources in the second resource pool) is less than a threshold. In addition, the first type of device may use an exit criteria to determine whether to stop using the second resource pool. In some aspects, the exit criteria may specify that resource sharing should stop if a ratio of resources used by devices of the second type is greater than a threshold.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: February 27, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Sudhir Kumar Baghel, Zhibin Wu, Shailesh Patil, Junyi Li, Georgios Tsirtsis
  • Patent number: 11916675
    Abstract: Methods, systems, and devices for wireless communication are described. One method for wireless communication at a first device includes receiving a multicast packet from a second device, decoding control header information in the received multicast packet, determining that a decoding procedure associated with a payload of the received multicast packet is unsuccessful and transmitting a negative acknowledgement (NACK) based at least in part on the determining. The method also includes retrieving a list of transmitter identifiers. In some cases, transmitting the NACK is based at least in part on the list of transmitter identifiers. The method further includes determining a transmitter identifier associated with the multicast packet and determining that the transmitter identifier is present in the list of transmitter identifiers.
    Type: Grant
    Filed: August 18, 2022
    Date of Patent: February 27, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Sudhir Kumar Baghel, Shailesh Patil, Zhibin Wu, Kapil Gulati, Hong Cheng
  • Publication number: 20230394512
    Abstract: The present disclosure generally relates to profit optimization, and more particularly to methods and systems for profit optimization for an online/offline retail/wholesale category. Profit optimization includes demand forecasting, inventory planning, assortment planning, discount recommendation, price optimization, revenue optimization, and profit optimization in the online/offline retail/wholesale category. The method of profit optimization includes a hierarchical demand forecasting of products by using a stacked Long- and Short-Term Memory (LSTM) neural network architecture. Further, the method includes a quantification of price-demand causal effects and inter-product cross-causal effects using an eXtreme Gradient Boosting (XGBoost) technique. The method further includes a simulation of an effect of discount on a demand of products, and recommendation of an optimal discount using a non-linear optimization technique.
    Type: Application
    Filed: June 25, 2022
    Publication date: December 7, 2023
    Inventors: Akansha KUMAR, Shailesh KUMAR, Akhil PATEL PATLOLLA, Bangari Sai SWARAJ, Athira SURENDRAN
  • Publication number: 20230377199
    Abstract: A system and method for extracting a full range hyperspectral data from one or more RGB images. The method encompasses pre-processing, the one or more RGB images. Further the method encompasses estimating, an illumination component associated with each pre-processed RGB image. The method thereafter comprises removing, the illumination component from the each pre-processed RGB image. Further the method encompasses tracking, a trajectory of pixel(s) over frame(s) associated with the each pre-processed RGB image. The method then leads to identifying, a position of the pixel(s) in one or more adjacent frames of the frame(s) based on a patch defined around said one or more pixels. Thereafter the method encompasses extracting, the full range hyperspectral data from the each pre-processed RGB image based on at least one of the removal of the illumination component, the trajectory of the pixel(s) and the position of the pixel(s).
    Type: Application
    Filed: May 28, 2021
    Publication date: November 23, 2023
    Inventors: Raghuram LANKA, P. BALAKRISHNA REDDY, Arun BANERJEE, Pradip GUPTA, Shubham BHARDWAJ, Shailesh KUMAR, Santanu DASGUPTA, Rahul BADHWAR, Kenny PAUL
  • Publication number: 20230371233
    Abstract: Techniques are provided herein for forming multi-tier memory structures with graded characteristics across different tiers. A given memory structure includes memory cells, with a given memory cell having an access device and a storage device. The access device may include, for example, a thin film transistor (TFT) structure, and the storage device may include a capacitor. Certain geometric or material parameters of the memory structures can be altered in a graded fashion across any number of tiers to compensate for process effects that occur when fabricating a given tier, which also affect any lower tiers. This may be done to more closely match the performance of the memory arrays across each of the tiers.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Applicant: Intel Corporation
    Inventors: Abhishek Anil Sharma, Travis W. Lajoie, Forough Mahmoudabadi, Shailesh Kumar Madisetti, Van H. Le, Timothy Jen, Cheng Tan, Jisoo Kim, Miriam R. Reshotko, Vishak Venkatraman, Eva Vo, Yue Zhong, Yu-Che Chiu, Moshe Dolejsi, Lorenzo Ferrari, Akash Kannegulla, Deepyanti Taneja, Mark Armstrong, Kamal H. Baloch, Afrin Sultana, Albert B. Chen, Vamsi Evani, Yang Yang, Juan G. Alzate-Vinasco, Fatih Hamzaoglu
  • Publication number: 20230370867
    Abstract: Present disclosure generally relates to data analytics in wireless networks, more particularly relates to systems and methods for optimizing supply demand in telecommunication network. System may prepare data for optimization using raw telecom data. Further, the system may build quadratic optimization objective function by reading index table (cell—grid information). System may build quadratic program inequality constraints, and prepare right hand side of constraints for all mentioned constraints maintaining the index. Thereafter, the system may execute optimizer and find the optimal solution ensuring hyper-parameter tuning, and calculate focal point of each cell using cell-grid allocation vector. The system may read the optimal solution from optimization process, and estimate electronic tilt values (i.e., Remote Electrical Tilt (RET)) ensuring the business guidelines. Thereafter, the system may use line of sight method to get inclination value (optimal tilt value) of cell from the focal point on the ground.
    Type: Application
    Filed: August 1, 2022
    Publication date: November 16, 2023
    Inventors: Shailesh KUMAR, Anil MITTAL, Prateek Kumar JAIN, Avnish KUMAR
  • Publication number: 20230369426
    Abstract: Techniques for forming thin film transistors (TFTs) having multilayer contact structures. An example integrated circuit includes a gate electrode, a gate dielectric on the gate electrode, a semiconductor region on the gate dielectric, and a conductive contact that contacts at least a portion of the semiconductor region. In some other cases, the conductive contact comprises a multilayer structure having at least a first material layer on the at least a portion of the semiconductor region, at least a second material layer on the first material layer, and a conductive fill material over the first and second material layers. In some other cases, the conductive contact comprises a multilayer structure having (1) a graded material layer on the at least a portion of the semiconductor region and (2) a conductive fill material over the graded material layer, wherein the graded material layer comprises a concentration gradient of a given element.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Applicant: Intel Corporation
    Inventors: Abhishek Anil Sharma, Travis W. Lajoie, Van H. Le, Timothy Jen, Kamal H. Baloch, Mark Armstrong, Albert B. Chen, Moshe Dolejsi, Shailesh Kumar Madisetti, Afrin Sultana, Deepyanti Taneja, Vishak Venkatraman
  • Publication number: 20230369509
    Abstract: Techniques are provided herein for forming thin film transistor (TFT) structures having one or more doped contact regions. The addition of certain dopants can be used to increase conductivity and provide higher thermal stability in the contact regions of the TFT. Memory structures having TFT structures are arranged in a two-dimensional array within one or more interconnect layers and stacked in a vertical direction such that multiple tiers of memory structure arrays are formed within the interconnect region. Any of the TFT structures within the memory structures may include one or more contacts that are doped with additional elements. The doping profile of the contacts can be tuned to optimize performance, stability, and reliability of the TFT structure. Furthermore, additional doping may be performed within the area beneath the contacts and extending into the semiconductor region.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Applicant: Intel Corporation
    Inventors: Jisoo Kim, Xiaoye Qin, Timothy Jen, Harish Ganapathy, Van H. Le, Huiying Liu, Prem Chanani, Cheng Tan, Shailesh Kumar Madisetti, Abhishek Anil Sharma, Brian Wadsworth, Vishak Venkatraman, Andre Baran
  • Publication number: 20230369340
    Abstract: Techniques are provided herein for forming thin film transistor structures having co-doped semiconductor regions. The addition of insulating dopants can be used to improve the performance, stability, and reliability of the TFT. A given TFT structure within an array of similar TFT structures formed in an interconnect region may include a semiconductor region that is co-doped with one or more additional elements. The doping profile can be tuned to optimize performance, stability, and reliability of the TFT structure. In some embodiments, the doping profile causes an overall reduction in the conductivity of the semiconductor region, leading to a higher threshold voltage. Designing access devices (in, for example, a DRAM architecture) with higher threshold voltages can be beneficial for improving reliability of the memory cell.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Applicant: Intel Corporation
    Inventors: Van H. Le, Timothy Jen, Vishak Venkatraman, Shailesh Kumar Madisetti, Cheng Tan, Harish Ganapathy, James Pellegren, Kamal H. Baloch, Abhishek Anil Sharma
  • Publication number: 20230369444
    Abstract: Techniques are provided herein for forming thin film transistor structures having a multilayer and/or concentration gradient gate dielectric. Such a gate dielectric can be used, to tune the performance and/or reliability of the transistor. According to some such embodiments, memory structures having thin film transistor (TFT) structures are arranged in a two-dimensional array within one or more interconnect layers and stacked in a vertical direction such that multiple tiers of memory structure arrays are formed within the interconnect region. Any of the given TFT structures may include a multilayer and/or graded gate dielectric that includes at least two or more different dielectric layers and/or a material concentration gradient through a thickness of the gate dielectric.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Applicant: Intel Corporation
    Inventors: Abhishek Anil Sharma, Albert B. Chen, Mark Armstrong, Afrin Sultana, Van H. Le, Travis W. Lajoie, Shailesh Kumar Madisetti, Timothy Jen, Cheng Tan, Moshe Dolejsi, Vishak Venkatraman, Christopher Ryder, Deepyanti Taneja
  • Publication number: 20230369508
    Abstract: Techniques for forming thin film transistors (TFTs) having multilayer and/or concentration gradient semiconductor regions. An example integrated circuit includes a gate electrode, a gate dielectric on the gate electrode, and a semiconductor region on the gate dielectric. In some cases, the semiconductor region includes a plurality of compositionally different material layers, at least two layers of the different material layers each being a semiconductor layer. In some other cases, the semiconductor region includes a single layer having a material concentration gradient extending from a bottom surface of the single layer (adjacent to the gate dielectric) to a top surface of the single layer. The integrated circuit further includes first and second conductive contacts that each contact a respective portion of the semiconductor region.
    Type: Application
    Filed: May 12, 2022
    Publication date: November 16, 2023
    Applicant: Intel Corporation
    Inventors: Timothy Jen, Prem Chanani, Cheng Tan, Brian Wadsworth, Andre Baran, James Pellegren, Christopher J. Wiegand, Van H. Le, Abhishek Anil Sharma, Shailesh Kumar Madisetti, Xiaojun Weng