Patents by Inventor Shang-Fu Yeh

Shang-Fu Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11921947
    Abstract: A touch function setting method is provided. The method comprising: receiving a sequence parameter which includes multiple clicks, each of the clicks is corresponding to one of areas of a touch panel or screen; receiving a function parameter corresponding to the sequence parameter, the function parameter is corresponding to activate a function; and storing a group of touch function parameters, which includes the sequence parameter and the function parameter.
    Type: Grant
    Filed: February 18, 2022
    Date of Patent: March 5, 2024
    Assignee: EGALAX_EMPIA TECHNOLOGY INC.
    Inventors: Chin-Fu Chang, Shang-Tai Yeh, Chia-Ling Sun, Jia-Ming Chen
  • Publication number: 20240014245
    Abstract: Various embodiments of the present disclosure are directed towards an image sensor. The image sensor includes a first chip bonded to a second chip. The first chip includes a semiconductor substrate. The first chip includes a first transistor cell and a second transistor cell. The second transistor cell is laterally spaced from the first transistor cell. A first through-substrate via (TSV) extends vertically through the semiconductor substrate. The first transistor cell is electrically coupled to the first TSV. A second TSV extends vertically through the first semiconductor substrate. The second transistor cell is electrically coupled to the second TSV. The second chip comprises a first readout circuit that is electrically coupled to the first TSV and the second TSV. The first readout circuit is disposed laterally between the first TSV and the second TSV. The first readout circuit is configured to receive a first signal from the first transistor cell.
    Type: Application
    Filed: January 4, 2023
    Publication date: January 11, 2024
    Inventors: Chi-Hsien Chung, Tzu-Jui Wang, Shang-Fu Yeh, Tzu-Hsuan Hsu, Chen-Jong Wang, Dun-Nian Yaung
  • Publication number: 20230417908
    Abstract: A system and a method for time-of-flight (ToF) sensing are provided. The system comprises a sensing module array comprising a plurality of sensing modules. Each of the sensing modules comprises: a plurality of single-photon avalanche diode (SPAD) cells, a periodical correlation detection (PCD) circuit and a time-to-digital converter (TDC). The plurality of SPAD cells is for receiving reflected light pulses. Each of the SPAD cells outputs a pixel event signal with logical high if the SPAD cell receives a reflected light pulse. One of the SPAD cells is a selected SPAD cell. The PCD circuit is configured to count the pixel event signals with logical high for each detection period. The TDC is valid if a count of the pixel event signals with logical high in one detection period reaches a predetermined threshold and if the selected SPAD cell receives a reflected light pulse in the detection period.
    Type: Application
    Filed: June 23, 2022
    Publication date: December 28, 2023
    Inventors: SHANG-FU YEH, CHIN YIN
  • Publication number: 20230358864
    Abstract: An apparatus, a processing circuitry and a method for measuring a distance to an object are provided. The apparatus comprising a light source, a direct time of flight (DTOF) sensor array configured to receive a reflected signal from the object, a processing circuitry coupled to the DTOF sensor array and comprising a first time to digital converter (TDC) and a second TDC, respectively disposed on opposite sides of the DTOF sensor array, the processing circuitry configured to receive, by the first TDC, a first photon detection signal transmitted by a first pixel, receive, by the second TDC, a second photon detection signal transmitted by the first pixel, and calculate a first distance from the first pixel to the object according to a first arrival time of the first photon detection signal detected by the first TDC and a second arrival time of the second signal detected by the second TDC.
    Type: Application
    Filed: May 5, 2022
    Publication date: November 9, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin Yin, Shang-Fu Yeh, Chiao-Yi Huang, Chih-Lin Lee
  • Publication number: 20230352499
    Abstract: An integrated circuit includes a ramp signal generator circuit, a comparator, a counter and a control circuit. The ramp signal generator circuit is configured to generate a ramp reference signal. The comparator configured to compare a pixel output signal and the ramp reference signal thereby generating a comparator output signal. The counter is coupled to the comparator, and configured to be enabled or disabled in response to the comparator output signal. The control circuit coupled to the comparator, and configured to enable or disable the comparator by a first enable signal, the first enable signal generated in response to at least the comparator output signal.
    Type: Application
    Filed: July 11, 2023
    Publication date: November 2, 2023
    Inventors: Kuo-Yu CHOU, Shang-Fu YEH
  • Patent number: 11726187
    Abstract: An apparatus and method for providing a filtering false photon count events for each pixel in a DTOF sensor array are disclosed herein. In some embodiments, the apparatus includes: a light source configured to emit a modulated signal towards the object; a direct time of flight (DTOF) sensor array configured to receive a reflected signal from the object, wherein the DTOF sensor array comprises a plurality of single-photon avalanche diodes (SPADs); and processing circuitry configured to receive photon event detection signals from a center pixel and a plurality of pixels orthogonally and diagonally adjacent to the center pixel and output a valid photon detection signal, in response to determining whether a sum of the received photon event detection signals is greater than a predetermined threshold.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: August 15, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin Yin, Meng-Hsiu Wu, Chih-Lin Lee, Calvin Yi-Ping Chao, Shang-Fu Yeh
  • Publication number: 20230243939
    Abstract: A method of a sensing device, comprising steps of emitting, by a light source of the sensing device, a light pulse in each of n cycles; measuring, by a single photon avalanche diodes array of the sensing device, a time-of-flight value with a resolution of m in each of the n cycles to generate n raw data frames based on a reflected light of the light pulse; performing, by a pre-processing circuit of the sensing device, a pre-processing operation to n raw data frames to generate k pre-processed data frames, wherein m, n and k are natural numbers, and k is smaller than n; and generating, by post-processor of the sensing device, a histogram according to the k pre-processed data frames and analyzing the histogram to output a depth result.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 3, 2023
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin Yin, Shang-Fu Yeh, Calvin Yi-Ping Chao, Chih-Lin Lee, Meng-Hsiu Wu
  • Patent number: 11705466
    Abstract: An integrated circuit includes a comparator, a counter and a control circuit. The comparator is configured to generate a comparator output signal in response to a pixel output signal and a reference signal. The counter is coupled to the comparator, and configured to be enabled or disabled in response to the comparator output signal. The control circuit is coupled to the comparator, and configured to enable or disable the comparator by a first enable signal. The first enable signal is generated in response to at least the comparator output signal.
    Type: Grant
    Filed: November 16, 2020
    Date of Patent: July 18, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Kuo-Yu Chou, Shang-Fu Yeh
  • Patent number: 11644547
    Abstract: A sensing device that is configured to determine a depth result based on time-of-flight value is introduced. The sensing device includes a delay locked loop circuit, a plurality of time-to-digital converters, a multiplexer and a digital integrator. The delay locked loop circuit is configured to output a plurality of delay clock signals through output terminals of the delay locked loop circuit. The plurality of time-to-digital converters include a plurality of latches. The multiplexer is configured to select a sub-group of m latches among the latches of the plurality of time-to-digital converters to be connected to the output terminals of the delay locked loop circuit according to a control signal.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: May 9, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chin Yin, Shang-Fu Yeh, Calvin Yi-Ping Chao, Chih-Lin Lee, Meng-Hsiu Wu
  • Patent number: 11605627
    Abstract: Circuits and methods for protecting a device are provided. A first device to be protected includes a gate dielectric of a first thickness. A second device includes a gate dielectric of a second thickness that is less than the first thickness. A gate is shared by the first device and the second device.
    Type: Grant
    Filed: June 3, 2021
    Date of Patent: March 14, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Kuo-Yu Chou, Shang-Fu Yeh, Yi-Ping Chao, Chih-Lin Lee
  • Patent number: 11579263
    Abstract: Disclosed is a time-of-flight sensing apparatus and method.
    Type: Grant
    Filed: October 17, 2019
    Date of Patent: February 14, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chin Yin, Meng-Hsiu Wu, Chih-Lin Lee, Calvin Yi-Ping Chao, Shang-Fu Yeh
  • Patent number: 11569346
    Abstract: A semiconductor device includes a source/drain diffusion area, a first doped region and a gate. The source/drain diffusion area, defined between a first isolation structure and a second isolation structure, includes a source region, a drain region and a device channel. The first doped region, disposed along a first junction between the device channel and the first isolation structure, is separated from at least one of the source region and the drain region. The first doped region has a dopant concentration higher than that of the device channel. The gate is disposed over the source/drain diffusion area. The first doped region is located within a projected area of the gate onto the source/drain diffusion area, the first isolation structure and the second isolation structure. A length of the first doped region is shorter than a length of the gate in a direction from the source region to the drain region.
    Type: Grant
    Filed: July 16, 2021
    Date of Patent: January 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Kuo-Yu Chou, Seiji Takahashi, Shang-Fu Yeh, Chih-Lin Lee, Chin Yin, Calvin Yi-Ping Chao
  • Publication number: 20220137192
    Abstract: An apparatus and method for providing a filtering false photon count events for each pixel in a DTOF sensor array are disclosed herein. In some embodiments, the apparatus includes: a light source configured to emit a modulated signal towards the object; a direct time of flight (DTOF) sensor array configured to receive a reflected signal from the object, wherein the DTOF sensor array comprises a plurality of single-photon avalanche diodes (SPADs); and processing circuitry configured to receive photon event detection signals from a center pixel and a plurality of pixels orthogonally and diagonally adjacent to the center pixel and output a valid photon detection signal, in response to determining whether a sum of the received photon event detection signals is greater than a predetermined threshold.
    Type: Application
    Filed: October 30, 2020
    Publication date: May 5, 2022
    Inventors: Chin YIN, Meng-Hsiu WU, Chih-Lin LEE, Calvin Yi-Ping CHAO, Shang-Fu YEH
  • Patent number: 11289529
    Abstract: A pixel circuit includes: a photodiode capable of generating electrical current according to an incoming light signal; a control circuit coupled to the photodiode for selectively coupling a cathode of the photodiode to a first reference voltage to generate the electrical current according to a first control signal; and an output circuit coupled to the control circuit for selectively coupling a second reference voltage to a connecting terminal between the control circuit and the output circuit and to generate an output signal according to a reset signal and a select signal.
    Type: Grant
    Filed: April 1, 2020
    Date of Patent: March 29, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Chin Yin, Chih-Lin Lee, Shang-Fu Yeh, Meng-Hsiu Wu
  • Patent number: 11199444
    Abstract: A self-calibration time-to-digital converter (TDC) integrated circuit for single-photon avalanche diode (SPAD) based depth sensing is disclosed. The circuit includes a SPAD matrix with a plurality of SPAD pixels arranged in m rows and n columns, the SPAD pixels in each column of SPAD pixels are connected by a column bus; a global DLL unit with n buffers and n clock signals; and an image signal processing unit for receiving image signals from the column TDC array. The circuit can also include a row control unit configured to enable one SPAD pixel in each row for a transmitting signal; a circular n-way multiplexer for circularly multiplexing n clock signals in the global DLL unit; a column TDC array with n TDCs, each TDC further comprises a counter and a latch, the latch of each TDC is connected to the circular n-way multiplexer for circular multiplexing.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: December 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chin Yin, Chih-Lin Lee, Shang-Fu Yeh, Kuo-Yu Chou, Calvin Yi-Ping Chao
  • Publication number: 20210343838
    Abstract: A semiconductor device includes a source/drain diffusion area, a first doped region and a gate. The source/drain diffusion area, defined between a first isolation structure and a second isolation structure, includes a source region, a drain region and a device channel. The first doped region, disposed along a first junction between the device channel and the first isolation structure, is separated from at least one of the source region and the drain region. The first doped region has a dopant concentration higher than that of the device channel. The gate is disposed over the source/drain diffusion area. The first doped region is located within a projected area of the gate onto the source/drain diffusion area, the first isolation structure and the second isolation structure. A length of the first doped region is shorter than a length of the gate in a direction from the source region to the drain region.
    Type: Application
    Filed: July 16, 2021
    Publication date: November 4, 2021
    Inventors: KUO-YU CHOU, SEIJI TAKAHASHI, SHANG-FU YEH, CHIH-LIN LEE, CHIN YIN, CALVIN YI-PING CHAO
  • Publication number: 20210313379
    Abstract: A pixel circuit includes: a photodiode capable of generating electrical current according to an incoming light signal; a control circuit coupled to the photodiode for selectively coupling a cathode of the photodiode to a first reference voltage to generate the electrical current according to a first control signal; and an output circuit coupled to the control circuit for selectively coupling a second reference voltage to a connecting terminal between the control circuit and the output circuit and to generate an output signal according to a reset signal and a select signal.
    Type: Application
    Filed: April 1, 2020
    Publication date: October 7, 2021
    Inventors: CHIN YIN, CHIH-LIN LEE, SHANG-FU YEH, MENG-HSIU WU
  • Publication number: 20210288045
    Abstract: Circuits and methods for protecting a device are provided. A first device to be protected includes a gate dielectric of a first thickness. A second device includes a gate dielectric of a second thickness that is less than the first thickness. A gate is shared by the first device and the second device.
    Type: Application
    Filed: June 3, 2021
    Publication date: September 16, 2021
    Inventors: Kuo-Yu Chou, Shang-Fu Yeh, Yi-Ping Chao, Chih-Lin Lee
  • Patent number: 11075267
    Abstract: A semiconductor device comprises a source/drain diffusion area, and a first doped region. The source/drain diffusion area is defined between a first isolation structure and a second isolation structure. The source/drain diffusion area includes a source region, a drain region, and a device channel. The device channel is between the source region and the drain region. The first doped region is disposed along a first junction between the device channel and the first isolation structure in a direction from the source region to the drain region. The first doped region is separated from at least one of the source region and the drain region, and has a dopant concentration higher than that of the device channel. The semiconductor device of the present disclosure has low random telegraph signal noise and fewer defects.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: July 27, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Kuo-Yu Chou, Seiji Takahashi, Shang-Fu Yeh, Chih-Lin Lee, Chin Yin, Calvin Yi-Ping Chao
  • Patent number: 11037922
    Abstract: Circuits and methods for protecting a device are provided. A first device to be protected includes a gate dielectric of a first thickness. A second device includes a gate dielectric of a second thickness that is less than the first thickness. A gate is shared by the first device and the second device.
    Type: Grant
    Filed: April 15, 2020
    Date of Patent: June 15, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Kuo-Yu Chou, Shang-Fu Yeh, Yi-Ping Chao, Chih-Lin Lee