Abstract: A system and method of routing multiple pixels from a single column in a CMOS (complementary metal-oxide semiconductor) image sensors (CIS) to a plurality of column analog-to-digital converters (ADCs) is disclosed. The CIS includes an array of pixel elements having a plurality of rows and a plurality of columns. A plurality of column-out signal paths is coupled to each of the plurality of columns of the array of pixel elements. A column routing matrix is coupled to each plurality of column-out signal paths for each of the plurality of columns. A plurality of analog-to-digital converters (ADCs) are coupled to the column routing matrix. The column routing matrix is configured to route at least one column-out signal path to each of the plurality of ADCs during a down-sampling read operation.

Abstract: A conditional correlated multiple sampling (CCMS) single slope (SS) analog-to-digital converter (ADC) is provided. The CCMS SS ADC includes a comparator, arranged to compare an analog signal with a ramp signal and generate a comparison result; and a CCMS control circuit, arranged to determine a swing of the ramp signal according to a magnitude of the analog signal. An image sensor system using the CCMS SS ADC and a method of CCMS SS analog-to-digital conversion are also disclosed.

Abstract: A device includes a current source and sampling units. Each of the sampling units includes a transistor and a capacitor electrically coupled to a gate of the transistor. The sampling units are sequentially activated such that the capacitor samples a voltage of a column line of a pixel array and are activated together such that the transistor is turned on according to the sampled voltage of the capacitor, to drain a current from the current source through an output node to generate an output voltage thereat.

Abstract: Circuits and methods for protecting a device are provided. A first device to be protected includes a gate dielectric of a first thickness. A second device includes a gate dielectric of a second thickness that is less than the first thickness. A gate is shared by the first device and the second device.

Abstract: Circuits and methods for protecting a device are provided. A first device to be protected includes a gate dielectric of a first thickness. A second device includes a gate dielectric of a second thickness that is less than the first thickness. A gate is shared by the first device and the second device.

Abstract: A conditional correlated multiple sampling (CCMS) single slope (SS) analog-to-digital converter (ADC) is provided. The CCMS SS ADC includes a comparator, arranged to compare an analog signal with a ramp signal and generate a comparison result; and a CCMS control circuit, arranged to determine a swing of the ramp signal according to a magnitude of the analog signal. An image sensor system using the CCMS SS ADC and a method of CCMS SS analog-to-digital conversion are also disclosed.

Abstract: A conditional correlated multiple sampling (CCMS) single slope (SS) analog-to-digital converter (ADC) is provided. The CCMS SS ADC includes a comparator, arranged to compare an analog signal with a ramp signal and generate a comparison result; and a CCMS control circuit, arranged to determine a swing of the ramp signal according to a magnitude of the analog signal. An image sensor system using the CCMS SS ADC and a method of CCMS SS analog-to-digital conversion are also disclosed.

Abstract: A system and method of routing multiple pixels from a single column in a CMOS (complementary metal-oxide semiconductor) image sensors (CIS) to a plurality of column analog-to-digital converters (ADCs) is disclosed. The CIS includes an array of pixel elements having a plurality of rows and a plurality of columns. A plurality of column-out signal paths is coupled to each of the plurality of columns of the array of pixel elements. A column routing matrix is coupled to each plurality of column-out signal paths for each of the plurality of columns. A plurality of analog-to-digital converters (ADCs) are coupled to the column routing matrix. The column routing matrix is configured to route at least one column-out signal path to each of the plurality of ADCs during a down-sampling read operation.

Abstract: A conditional correlated multiple sampling (CCMS) single slope (SS) analog-to-digital converter (ADC) is provided. The CCMS SS ADC includes a comparator, arranged to compare an analog signal with a ramp signal and generate a comparison result; and a CCMS control circuit, arranged to determine a swing of the ramp signal according to a magnitude of the analog signal. An image sensor system using the CCMS SS ADC and a method of CCMS SS analog-to-digital conversion are also disclosed.

Abstract: A system and method of routing multiple pixels from a single column in a CMOS (complementary metal-oxide semiconductor) image sensors (CIS) to a plurality of column analog-to-digital converters (ADCs) is disclosed. The CIS includes an array of pixel elements having a plurality of rows and a plurality of columns. A plurality of column-out signal paths is coupled to each of the plurality of columns of the array of pixel elements. A column routing matrix is coupled to each plurality of column-out signal paths for each of the plurality of columns. A plurality of analog-to-digital converters (ADCs) are coupled to the column routing matrix. The column routing matrix is configured to route at least one column-out signal path to each of the plurality of ADCs during a down-sampling read operation.

Abstract: Circuits and methods for protecting a device are provided. A first device to be protected includes a gate dielectric of a first thickness. A second device includes a gate dielectric of a second thickness that is less than the first thickness. A gate is shared by the first device and the second device.

Abstract: A system and method of routing multiple pixels from a single column in a CMOS (complementary metal-oxide semiconductor) image sensors (CIS) to a plurality of column analog-to-digital converters (ADCs) is disclosed. The CIS includes an array of pixel elements having a plurality of rows and a plurality of columns. A plurality of column-out signal paths is coupled to each of the plurality of columns of the array of pixel elements. A column routing matrix is coupled to each plurality of column-out signal paths for each of the plurality of columns. A plurality of analog-to-digital converters (ADCs) are coupled to the column routing matrix. The column routing matrix is configured to route at least one column-out signal path to each of the plurality of ADCs during a down-sampling read operation.

Abstract: A device that includes an analog-to-digital converter circuit and a control circuit is disclosed. The analog-to-digital converter circuit converts at least one of analog pixel output signals from a pixel array, to at least one of digital signals. The analog-to-digital converter circuit includes a comparator which generates a comparator output signal for operatively enabling and disabling, in accordance with a reference signal and an analog pixel output signal from the pixel array, a counter generating a digital signal. The control circuit disables, in accordance with the comparator output signal, the comparator.

Abstract: A conditional correlated multiple sampling (CCMS) single slope (SS) analog-to-digital converter (ADC) is provided. The CCMS SS ADC includes a comparator, arranged to compare an analog signal with a ramp signal and generate a comparison result; and a CCMS control circuit, arranged to determine a swing of the ramp signal according to a magnitude of the analog signal. An image sensor system using the CCMS SS ADC and a method of CCMS SS analog-to-digital conversion are also disclosed.

Abstract: A method for noise simulation of a CMOS image sensor comprises performing a frequency domain noise simulation for a readout circuit of the CMOS image sensor using a computer, wherein the readout circuit includes a correlated double sampling (CDS) circuit, wherein the frequency domain noise simulation includes a CDS transfer function to refer a noise introduced by the CDS circuit back to an input node of the readout circuit. The method further comprises calculating noise at the input node of the readout circuit based on the referred back noises caused by one or more components in the readout circuit and estimating noise of the CMOS imaging sensor by comparing the calculated noise at the input node of the readout circuit to an original input signal to the readout circuit of the CMOS imaging sensor.

Abstract: One or more analog-to-digital converters and methods for analog-to-digital conversion are provided. The analog-to-digital converter comprises a ramp generator and a direct current (DC) generator respectively configured to apply a ramp voltage waveform and a DC voltage waveform to a comparator. During a pixel signal level conversion, a first portion of the ramp voltage waveform is applied to the comparator. A control circuit then makes a determination regarding an output of the comparator. If the output corresponds to a first output, or first logic state, the ramp voltage generator applies a second portion of the ramp voltage waveform to the comparator. If the output corresponds to a second output, or second logic state, the DC generator adjusts the DC voltage waveform applied to the comparator.

Abstract: A sensor system includes a pixel array, column units and a compensation circuit. The pixel array is configured to provide pixel column data. The column units are configured to generate an offset data out signal from the pixel column data. The offset data out signal includes digital offsets. The compensation circuit is configured to remove the digital offsets from the offset data out signal. The compensation circuit is also configured to generate a data out signal.

Abstract: One or more analog-to-digital converters and methods for analog-to-digital conversion are provided. The analog-to-digital converter comprises a ramp generator and a direct current (DC) generator respectively configured to apply a ramp voltage waveform and a DC voltage waveform to a comparator. During a pixel signal level conversion, a first portion of the ramp voltage waveform is applied to the comparator. A control circuit then makes a determination regarding an output of the comparator. If the output corresponds to a first output, or first logic state, the ramp voltage generator applies a second portion of the ramp voltage waveform to the comparator. If the output corresponds to a second output, or second logic state, the DC generator adjusts the DC voltage waveform applied to the comparator.

Abstract: The present invention is related to an optical recognition system and a method thereof, and more particularly to an optical recognition system and a method that adopts a single-slope analog-to-digital converter to proceed a single-slope analog-to-digital conversion in order to have an image with a wide dynamic range.

Abstract: A method for noise simulation of a CMOS image sensor comprises performing a frequency domain noise simulation for a readout circuit of the CMOS image sensor using a computer, wherein the readout circuit includes a correlated double sampling (CDS) circuit, wherein the frequency domain noise simulation includes a CDS transfer function to refer a noise introduced by the CDS circuit back to an input node of the readout circuit. The method further comprises calculating noise at the input node of the readout circuit based on the referred back noises caused by one or more components in the readout circuit and estimating noise of the CMOS imaging sensor by comparing the calculated noise at the input node of the readout circuit to an original input signal to the readout circuit of the CMOS imaging sensor.