Abstract: A mechanism for building decentralized computer applications that execute on a distributed computing system. The present technology works within a web browser, client application, or other software and provides access to decentralized computer applications through the browser. The present technology is non-custodial, wherein a public-private key pair, which represents user identity, is created on a client machine and then directly encrypted by a third-party platform without relying on one centralized computing system.

Abstract: A method includes placing a polisher head on platen, the polisher head including a set of first magnets, and controlling a set of second magnets to rotate the polisher head on the platen, wherein controlling the set of second magnets includes reversing the polarity of at least one second magnet of the set of second magnets to produce a magnetic force on at least one first magnet of the set of first magnets, wherein the set of second magnets are external to the polisher head.

Abstract: The present application discloses a semiconductor structure. The semiconductor structure a top die and a bottom die, and the maximum die size is constrained to reticle dimension. Each die includes (1) core: computation circuits, (2) phy: analog circuit connecting to memory, (3) I/O: analog circuit connecting output elements, (4) SERDES: serial high speed analog circuit, (5) intra-stack connection circuit, and (6) cache memory. This semiconductor structure can be chapleted design for high wafer yield with least tape out masks for cost saving. The intra-stack connection circuit connects the top die and the bottom die in the shortest distance (about tens of micrometers), so as to provide high signal quality and power efficiency.

Abstract: The present disclosure provides an electronic wearable device. The electronic wearable device includes a first module having a first contact and a second module having a second contact. The first contact is configured to keep electrical connection with the second contact in moving with respect to each other during a wearing period.

Abstract: The present application discloses a semiconductor structure and methods for manufacturing semiconductor structures. The semiconductor structure includes a plurality of bottom dies and a top die stacked on the bottom dies. The bottom dies receive power supplies through tiny through silicon vias (TSVs) formed in backside substrates of the bottom dies, while the top die receives power supplies through dielectric vias (TDVs) formed in a dielectric layer that covers the bottom dies. By enabling backside power delivery to the bottom die, more space can be provided for trace routing between stacked dies. Therefore, greater computation capability can be achieved within a smaller chip area with less power loss.

Abstract: A light source assembly includes a first annular reflector, a second annular reflector and a plurality of first light source modules. The first annular reflector has a first reflective surface. The second annular reflector is coaxial with the first annular reflector. A radius of the first annular reflector is greater than that of the second annular reflector. The second annular reflector has a second reflective surface facing the first reflective surface. The first light source modules take a central axis of the first annular reflector as a center and annularly arranged around the center. The first light source modules provide first beams to the first reflective surface, which reflects the first beams to the second reflective surface. The second reflective surface reflects the first beams and makes the first beams emit along a direction parallel to a central axis of the second annular reflector. A projection device is also provided.

Abstract: A method of making a semiconductor device includes manufacturing a first transistor over a first side of a substrate. The method further includes depositing a spacer material against a sidewall of the first transistor. The method further includes recessing the spacer material to expose a first portion of the sidewall of the first transistor. The method further includes manufacturing a first electrical connection to the transistor, a first portion of the electrical connection contacts a surface of the first transistor farthest from the substrate, and a second portion of the electrical connect contacts the first portion of the sidewall of the first transistor. The method further includes manufacturing a self-aligned interconnect structure (SIS) extending along the spacer material, wherein the spacer material separates a portion of the SIS from the first transistor, and the first electrical connection directly contacts the SIS.

Abstract: A device includes: a stack of semiconductor nanostructures; a gate structure wrapping around the semiconductor nanostructures, the gate structure extending in a first direction; a source/drain region abutting the gate structure and the stack in a second direction transverse the first direction; a contact structure on the source/drain region; a backside conductive trace under the stack, the backside conductive trace extending in the second direction; a first through via that extends vertically from the contact structure to a top surface of the backside dielectric layer; and a gate isolation structure that abuts the first through via in the second direction.

Abstract: An illumination system, including a first light source for providing a first beam; a second light source for providing a second beam; a wavelength conversion element having a reflection region and a conversion region, wherein the reflection region is for reflecting the first beam and the conversion region is for converting the first beam into a third beam; a first light splitting element for allowing the second beam to pass; a second light splitting element for reflecting the first beam penetrated by the first light splitting element and allowing the second beam to pass, wherein the first light splitting element is disposed between the wavelength conversion element and the second light splitting element; and a light homogenizing element for receiving the first beam, the second beam, and the third beam, and generating an illumination beam, is provided. A projection apparatus including the illumination system is also provided.

Abstract: An illumination system, including a first light source for providing a first beam; a second light source for providing a second beam; a wavelength conversion element having a reflection region and a conversion region, wherein the reflection region is for reflecting the first beam and the conversion region is for converting the first beam into a third beam; a first light splitting element for allowing the second beam to pass; a second light splitting element for reflecting the first beam penetrated by the first light splitting element and allowing the second beam to pass, wherein the first light splitting element is disposed between the wavelength conversion element and the second light splitting element; and a light homogenizing element for receiving the first beam, the second beam, and the third beam, and generating an illumination beam, is provided. A projection apparatus including the illumination system is also provided.

Abstract: A printed circuit board (PCB) stack structure and method of forming the same are provided. The printed circuit board stack structure includes a first PCB, a second PCB and a connector. The first PCB includes a first pad. The second PCB includes a second pad. The connector has an annular structure, located between the first PCB and the second PCB and electrically connecting the first PCB to the second PCB. The connector includes a substrate, a first conductive elastic piece and a second conductive elastic piece. The substrate has a first surface and a second surface opposite to each other. The first conductive elastic piece is located on the first surface and in electrical contact with the first pad. The second conductive elastic piece is located on the second surface and in electrical contact with the second pad.

Abstract: A printed circuit board (PCB) stack structure and method of forming the same are provided. The printed circuit board stack structure includes a first PCB, a second PCB and a connector. The first PCB includes a first pad. The second PCB includes a second pad. The connector has an annular structure, located between the first PCB and the second PCB and electrically connecting the first PCB to the second PCB. The connector includes a substrate, a first conductive elastic piece and a second conductive elastic piece. The substrate has a first surface and a second surface opposite to each other. The first conductive elastic piece is located on the first surface and in electrical contact with the first pad. The second conductive elastic piece is located on the second surface and in electrical contact with the second pad.

Abstract: A transfer printing apparatus includes a mold, a stamper, a pressing roller and a curing unit. The mold has a first surface with first and second concavities, the second concavity has first and second planes, the first plane is perpendicular to the first surface, and the second plane is inclined to the first surface. The stamper having a second surface is disposed in the first concavity. The first and second surfaces are coplanar, and the second surface has transfer printing microstructures. The first and second surfaces are suitable for coated an adhesive layer. The pressing roller presses a base film onto the adhesive layer, such that the adhesive layer is integrated with the base film. The curing unit cures the adhesive layer on the base film, such that a taper corresponding to the second concavity and optical microstructures corresponding to the transfer printing microstructures are formed on the adhesive layer.

Abstract: A backlight module includes a light guide plate (LGP), a light source, and at least one prism sheet. The LGP includes a light emitting surface, a bottom surface, a light incident surface, and a plurality of first microstructures on the bottom surface. Each of the first microstructure is a recessed structure and includes a first surface and a second surface. An included angle between the first surface and the bottom surface ranges from 15 degrees to 27 degrees. An included angle between the second surface and the bottom surface ranges from 50 degrees to 90 degrees. The light source provides a light beam, and an included angle between a light emitting direction of the light beam emitted from the light emitting surface of the LGP and a normal direction of the light emitting surface is greater than 30 degrees. The prism sheet is disposed above the light emitting surface.

Abstract: A transfer printing apparatus includes a mold, a stamper, a pressing roller and a curing unit. The mold has a first surface with first and second concavities, the second concavity has first and second planes, the first plane is perpendicular to the first surface, and the second plane is inclined to the first surface. The stamper having a second surface is disposed in the first concavity. The first and second surfaces are coplanar, and the second surface has transfer printing microstructures. The first and second surfaces are suitable for coated an adhesive layer. The pressing roller presses a base film onto the adhesive layer, such that the adhesive layer is integrated with the base film. The curing unit cures the adhesive layer on the base film, such that a taper corresponding to the second concavity and optical microstructures corresponding to the transfer printing microstructures are formed on the adhesive layer.

Abstract: A backlight module includes a light guide plate (LGP), a light source, and at least one prism sheet. The LGP includes a light emitting surface, a bottom surface, a light incident surface, and a plurality of first microstructures on the bottom surface. Each of the first microstructure is a recessed structure and includes a first surface and a second surface. An included angle between the first surface and the bottom surface ranges from 15 degrees to 27 degrees. An included angle between the second surface and the bottom surface ranges from 50 degrees to 90 degrees. The light source provides a light beam, and an included angle between a light emitting direction of the light beam emitted from the light emitting surface of the LGP and a normal direction of the light emitting surface is greater than 30 degrees. The prism sheet is disposed above the light emitting surface.

Abstract: A circuit board structure with an embedded semiconductor chip and a fabrication method thereof are provided, including the steps of providing a semiconductor wafer having an active surface with a plurality of electrode pads, a connection metal layer formed on the electrode pads: forming a protective layer on the connection metal layer and the semiconductor wafer, performing a cutting process to form a plurality of semiconductor dies, providing a carrier board having at least one cavity for receiving the semiconductor chip; and forming sequentially on the protective layer covering the semiconductor chip and the carrier board a dielectric layer and a circuit layer electrically connected to the connection metal layer of the semiconductor chip. The present invention is a simple, in process and low in process cost, due to the connection metal layer covered by the protective layer formed on the semiconductor chip protected from oxidation and contamination.

Abstract: A circuit board with identifiable information and a method for fabricating the same are proposed. At least one insulating layer within the circuit board has a non-circuit area free of a circuit layout. A plurality of openings are formed in the non-circuit area of the insulating layer. A patterned circuit layer is formed on the insulating layer. Metal identifiable information is disposed in the openings of the non-circuit area. By this arrangement, a product status of the circuit board can be traced and identified via the metal patterned information.

Abstract: A packaging substrate structure with a semiconductor chip embedded therein is disclosed, including a carrier board having a first and an opposed second surfaces and disposed with at least a through cavity; a semiconductor chip received in the through cavity, the chip having an active surface and an inactive surface opposite to one another, wherein the active surface has a plurality of electrode pads, a passivation layer is disposed on the active surface with the electrode pads exposed from the passivation layer, and metal pads are disposed on surfaces of the electrode pads; a buffer layer disposed on the first surface of the carrier board and on surfaces of the passivation layer and the metal pads; a first dielectric layer disposed on the buffer layer; and a first circuit layer disposed on the first dielectric layer and electrically connected with the metal pads of the chip via first conductive structures disposed in the buffer layer and the first dielectric layer, wherein the CTE (Coefficient of Thermal Expa