Abstract: Apparatuses relating generally to a microelectronic package having protection from electromagnetic interference are disclosed. In an apparatus thereof, a platform has an upper surface and a lower surface opposite the upper surface and has a ground plane. A microelectronic device is coupled to the upper surface of the platform. Wire bond wires are coupled to the ground plane with a pitch. The wire bond wires extend away from the upper surface of the platform with upper ends of the wire bond wires extending above an upper surface of the microelectronic device. The wire bond wires are spaced apart from one another to provide a fence-like perimeter to provide an interference shielding cage. A conductive layer is coupled to at least a subset of the upper ends of the wire bond wires for electrical conductivity to provide a conductive shielding layer to cover the interference shielding cage.

Abstract: Dielets on flexible and stretchable packaging for microelectronics are provided. Configurations of flexible, stretchable, and twistable microelectronic packages are achieved by rendering chip layouts, including processors and memories, in distributed collections of dielets implemented on flexible and/or stretchable media. High-density communication between the dielets is achieved with various direct-bonding or hybrid bonding techniques that achieve high conductor count and very fine pitch on flexible substrates. An example process uses high-density interconnects direct-bonded or hybrid bonded between standard interfaces of dielets to create a flexible microelectronics package. In another example, a process uses high-density interconnections direct-bonded between native interconnects of the dielets to create the flexible microelectronics packages, without the standard interfaces.

Abstract: Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques.

Abstract: Structures and techniques provide bond enhancement in microelectronics by trapping contaminants and byproducts during bonding processes, and arresting cracks. Example bonding surfaces are provided with recesses, sinks, traps, or cavities to capture small particles and gaseous byproducts of bonding that would otherwise create detrimental voids between microscale surfaces being joined, and to arrest cracks. Such random voids would compromise bond integrity and electrical conductivity of interconnects being bonded. In example systems, a predesigned recess space or predesigned pattern of recesses placed in the bonding interface captures particles and gases, reducing the formation of random voids, thereby improving and protecting the bond as it forms. The recess space or pattern of recesses may be placed where particles collect on the bonding surface, through example methods of determining where mobilized particles move during bond wave propagation.

Abstract: Direct-bonded native interconnects and active base dies are provided. In a microelectronic architecture, active dies or chiplets connect to an active base die via their core-level conductors. These native interconnects provide short data paths, which forgo the overhead of standard interfaces. The system saves redistribution routing as the native interconnects couple in place. The base die may contain custom logic, allowing the attached dies to provide stock functions. The architecture can connect diverse interconnect types and chiplets from various process nodes, operating at different voltages. The base die may have state elements for drive. Functional blocks aboard the base die receive native signals from diverse chiplets, and communicate with all attached chiplets. The chiplets may share processing and memory resources of the base die. Routing blockages are minimal, improving signal quality and timing. The system can operate at dual or quad data rates.

Abstract: A printed circuit board configured to be coupled to an automotive Ethernet connection includes a signal line layer on which a signal path is disposed, a ground layer disposed above the signal line layer, the ground layer including a digital ground and a chassis ground electrically insulated from the digital ground, a first capacitor and a second capacitor. The first capacitor and the second capacitor each couple the digital ground and the chassis ground. The first capacitor is positioned at a first distance from the signal path, and the second capacitor is symmetrically positioned, relative to the first capacitor, at a second distance from the signal path, where the second distance is substantially equal to the first distance.

Abstract: A stacked, multi-layer transmission line is provided. The stacked transmission line includes at least a pair of conductive traces, each conductive trace having a plurality of conductive stubs electrically coupled thereto. The stubs are disposed in one or more separate spatial layers from the conductive traces.

Abstract: Dielets on flexible and stretchable packaging for microelectronics are provided. Configurations of flexible, stretchable, and twistable microelectronic packages are achieved by rendering chip layouts, including processors and memories, in distributed collections of dielets implemented on flexible and/or stretchable media. High-density communication between the dielets is achieved with various direct-bonding or hybrid bonding techniques that achieve high conductor count and very fine pitch on flexible substrates. An example process uses high-density interconnects direct-bonded or hybrid bonded between standard interfaces of dielets to create a flexible microelectronics package. In another example, a process uses high-density interconnections direct-bonded between native interconnects of the dielets to create the flexible microelectronics packages, without the standard interfaces.

Abstract: Apparatuses relating generally to a microelectronic package having protection from electromagnetic interference are disclosed. In an apparatus thereof, a platform has an upper surface and a lower surface opposite the upper surface and has a ground plane. A microelectronic device is coupled to the upper surface of the platform. Wire bond wires are coupled to the ground plane with a pitch. The wire bond wires extend away from the upper surface of the platform with upper ends of the wire bond wires extending above an upper surface of the microelectronic device. The wire bond wires are spaced apart from one another to provide a fence-like perimeter to provide an interference shielding cage. A conductive layer is coupled to at least a subset of the upper ends of the wire bond wires for electrical conductivity to provide a conductive shielding layer to cover the interference shielding cage.

Abstract: An apparatus for filtering an electrical power signal in an Ethernet communication system includes a link interface, a power interface, and a filter connected between the link interface and the power interface. The link interface is configured to connect to an Ethernet link. The power interface is configured to connect to one or both of (i) a power-supply that supplies the electrical power signal for transfer over the Ethernet link, and (ii) a circuit that consumes the electrical power signal transferred over the Ethernet link. The filter includes at least (i) a primary inductor configured to filter the electrical power signal transferred to or from the Ethernet link, and (ii) one or more complementary inductors connected in series with the primary inductor, the one or more complementary inductors configured to reduce a parasitic capacitance of the filter.

Abstract: Structures and techniques provide bond enhancement in microelectronics by trapping contaminants and byproducts during bonding processes, and arresting cracks. Example bonding surfaces are provided with recesses, sinks, traps, or cavities to capture small particles and gaseous byproducts of bonding that would otherwise create detrimental voids between microscale surfaces being joined, and to arrest cracks. Such random voids would compromise bond integrity and electrical conductivity of interconnects being bonded. In example systems, a predesigned recess space or predesigned pattern of recesses placed in the bonding interface captures particles and gases, reducing the formation of random voids, thereby improving and protecting the bond as it forms. The recess space or pattern of recesses may be placed where particles collect on the bonding surface, through example methods of determining where mobilized particles move during bond wave propagation.

Abstract: Direct-bonded native interconnects and active base dies are provided. In a microelectronic architecture, active dies or chiplets connect to an active base die via their core-level conductors. These native interconnects provide short data paths, which forgo the overhead of standard interfaces. The system saves redistribution routing as the native interconnects couple in place. The base die may contain custom logic, allowing the attached dies to provide stock functions. The architecture can connect diverse interconnect types and chiplets from various process nodes, operating at different voltages. The base die may have state elements for drive. Functional blocks aboard the base die receive native signals from diverse chiplets, and communicate with all attached chiplets. The chiplets may share processing and memory resources of the base die. Routing blockages are minimal, improving signal quality and timing. The system can operate at dual or quad data rates.

Abstract: Representative implementations of techniques and devices provide seals for sealing the joints of bonded microelectronic devices as well as bonded and sealed microelectronic assemblies. Seals are disposed at joined surfaces of stacked dies and wafers to seal the joined surfaces. The seals may be disposed at an exterior periphery of the bonded microelectronic devices or disposed within the periphery using the various techniques.

Abstract: Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects are provided. An example optical interconnect joins first and second optical conduits. A first direct oxide bond at room temperature joins outer claddings of the two optical conduits and a second direct bond joins the inner light-transmitting cores of the two conduits at an annealing temperature. The two low-temperature bonds allow photonics to coexist in an integrated circuit or microelectronics package without conventional high-temperatures detrimental to microelectronics. Direct-bonded square, rectangular, polygonal, and noncircular optical interfaces provide better matching with rectangular waveguides and better performance. Direct oxide-bonding processes can be applied to create running waveguides, photonic wires, and optical routing in an integrated circuit package or in chip-to-chip optical communications without need for conventional optical couplers.

Abstract: A radiofrequency (RF) wireline communications system includes an interference filter for filtering interference noise at a cable interface that couples a cable of the system to functional circuitry. The interference filter includes a first termination resistance element coupled between a first cable conductor and a system ground, and a first termination reactance element coupled to the first termination resistance element.

Abstract: Integrated optical waveguides, direct-bonded waveguide interface joints, optical routing and interconnects are provided. An example optical interconnect joins first and second optical conduits. A first direct oxide bond at room temperature joins outer claddings of the two optical conduits and a second direct bond joins the inner light-transmitting cores of the two conduits at an annealing temperature. The two low-temperature bonds allow photonics to coexist in an integrated circuit or microelectronics package without conventional high-temperatures detrimental to microelectronics. Direct-bonded square, rectangular, polygonal, and noncircular optical interfaces provide better matching with rectangular waveguides and better performance. Direct oxide-bonding processes can be applied to create running waveguides, photonic wires, and optical routing in an integrated circuit package or in chip-to-chip optical communications without need for conventional optical couplers.

Abstract: A printed circuit board (PCB) and a method of manufacturing the same is described. The PCB includes a substrate defining a major plane and an integrated electromagnetic interference and compatibility (EMC/EMI) shielding enclosure configured to enclose the substrate. The shielding enclosure includes a metallic top layer deposited on top of the major plane of the substrate so as to envelope an uppermost layer of the substrate, a metallic bottom layer deposited on bottom of the major plane of the substrate so as to envelope a bottommost layer of the substrate, and a metallic side layer formed along a length of one or more edges of the substrate to electrically connect the metallic top layer and the metallic bottom layer.

Abstract: A printed circuit board (PCB) for coupling to an automotive Ethernet connection includes first and second board conduction traces, a first off-board conductor coupled to the first trace at a first contact point spaced from an edge of the PCB, and extending over the PCB from the first contact point to the edge for connection a first off-board conduction path, a second off-board conductor coupled, adjacent to the first off-board conduction path, to the second trace at a second contact point spaced from the edge of the PCB, and extending over the PCB from the second contact point to the edge for connection the second off-board conduction path. The off-board paths are a power path and a signal path. A loop in one of board conduction traces inductively couples that one the board conduction traces to a respective one of off-board conduction paths.

Abstract: A printed circuit board (PCB) includes a substrate defining a major plane. A first side of the major plane is configured for mounting of functional circuit elements. A cable connector is mounted on a second side of the major plane of the substrate, opposite the first side, for coupling to a shielded radiofrequency (RF) communications cable. At least one component grounding layer is parallel to the major plane and configured for coupling to the functional elements. At least one cable grounding layer is parallel to the major plane and is separated from the at least one component grounding layer. Each cable grounding layer in the at least one cable grounding layer is coextensive with the substrate and is configured for coupling, through the connector, to shielding of the shielded RF communications cable, without coupling to any other component. Nodes of an RF communications system may be mounted on such PCBs.

Abstract: A network communication device includes communication circuitry configured to communicate signals over a network cable, and a connector configured to connect to the network cable. The connector includes one or more signal terminals, an inner shield connection and an outer shield connection. The one or more signal terminals are configured to connect to one or more signal conductors of the network cable for communicating the signals. The inner shield connection surrounds the one or more signal terminals and is connected to a circuit ground of the communication circuitry. The outer shield connection surrounds the inner shield connection and is connected to an additional ground of the network communication device, the additional ground being different from the circuit ground.