Abstract: A first bitline driver includes a multiplexer for outputting data and write mask signals in functional mode, and test vector signal in test mode; a latch to latch the data signal in functional mode and the test vector signal in test mode; a latch to latch the write mask signal in functional mode and the test vector signal in test mode; a latch to latch the test vector signal and provide it to a scan output; and a write circuit for writing data to a memory cell based on the data signal. A second bitline driver includes a latch to latch a data signal in functional mode if a write mask signal is deasserted and to latch a test vector signal in test mode; a latch to latch the test vector signal and provide it to a scan output; and a write circuit for writing data to a memory cell.

Abstract: A memory and a method for operating a memory are provided. The memory includes a memory cell having a transistor and a wordline driver outputting a wordline coupled to the memory cell. The wordline driver adjusts a voltage level of the wordline to compensate for a parameter of the transistor. The method includes asserting a wordline voltage to access a memory cell having a transistor and adjusting the wordline voltage to compensate for a parameter of the transistor. Another memory is provided. The memory includes a memory cell and a wordline driver outputting a wordline coupled to the memory cell. The wordline driver adjusts a voltage level of the wordline based on a feedback of the wordline.

Abstract: A write precharge period for a pseudo-dual-port memory is initiated by an edge (rising or falling) of a read precharge signal. The same edge type (rising or falling) of a write precharge signal signals the end of the write precharge period.

Abstract: A negative bit line boost circuit for a memory is configured to control a write multiplexer and a write assist transistor so that charge from a boost capacitor positively charges a bit line following a write assist period.

Abstract: Maskable level shifter circuits and memories are provided. Memories may include a plurality of memory cells and a bitline coupled to the plurality of memory cells. The memories includes a maskable level shifter configured to receive write data and a mask signal. A maskable level shifter includes a level shifter configured to level shift the write data and output the level shifted write data to the bitline when the mask signal is inactive and a masking circuit configured to remove power from the level shifter when the mask signal is active. Another maskable level shifter includes a level shifter configured to level shift the write data and output the level shifted write data to the bitline when the mask signal is inactive and a masking circuit configured to output a predetermined state to the bitline when the mask signal is active.

Abstract: A memory is provided in which the word line assertion during a write operation is delayed until the discharge of a dummy bit line is detected.

Abstract: A memory circuit includes a set of subarrays of memory cells and a set of write assist circuits for generating negative voltages on bitlines pertaining to the set of subarrays, respectively. A set of distinct signals initiate the write assist circuits in generating the negative voltages for subarrays, respectively. The distinct signals may have particular state to cause a subset of the write assist circuits to generate the negative voltages if the corresponding subarrays are target of a writing operation, and another state to cause another subset of the write assist circuits to not generate the negative voltages if the corresponding subarrays are not target of the writing operation. This avoids the unnecessary generation of negative voltages for subarrays that are not the target of a writing operation so as to reduce power consumption. The generation of the distinct signals may be based on a set of write mask signals.

Abstract: A memory and a method for operating a memory are provided. The memory includes a memory cell having a transistor and a wordline driver outputting a wordline coupled to the memory cell. The wordline driver adjusts a voltage level of the wordline to compensate for a parameter of the transistor. The method includes asserting a wordline voltage to access a memory cell having a transistor and adjusting the wordline voltage to compensate for a parameter of the transistor. Another memory is provided. The memory includes a memory cell and a wordline driver outputting a wordline coupled to the memory cell. The wordline driver adjusts a voltage level of the wordline based on a feedback of the wordline.

Abstract: A memory and apparatus are disclosed. The memory includes a memory core having a plurality of memory cells. The memory also includes a first write assist circuit configured to assist writing to a first group of the plurality of memory cells of the memory core. Additionally, the memory includes a second write assist circuit configured to assist writing to a second group of the plurality of memory cells of the memory core. The apparatus includes at least one processor. The apparatus also includes a memory array. The memory array includes a memory core having a plurality of memory cells. The memory also includes a first write assist circuit configured to assist writing to a first group of the plurality of memory cells of the memory core and a second write assist circuit configured to assist writing to a second group of the plurality of memory cells of the memory core.

Abstract: A memory is provided in which the word line assertion during a write operation is delayed until the discharge of a dummy bit line is detected.

Abstract: Herein are disclosed indoles of formula (I) where the various groups are defined herein, and which are useful for treating cancer.

Abstract: Methods and a system are described for generating a waveform for transmitting data over a channel divided into a plurality of adjacent frequency subcarriers. One method includes receiving a plurality of data bits, each destined for a different receiver of a plurality of receivers. For each received data bit, the method further includes coding the data bit using a unique spreading code of a first set of spreading codes to generate a corresponding group of multiple copies of a data symbol. Additionally, the groups of data symbols, corresponding to the plurality of data bits, are interleaved to generate a sequence of interleaved data symbols, and the sequence of interleaved data symbols is mapped to the plurality of adjacent frequency subcarriers to generate a waveform symbol.

Abstract: A method and an apparatus for generating an internal memory clock are provided. The apparatus includes a pulse generator configured to receive a first clock signal in a first power domain and initiate a second clock signal in a second power domain in response to the first clock signal. The first power domain provides a first voltage for logic operations and the second power domain provides a second voltage for memory operations. The apparatus includes a tracking circuit configured to generate a reset signal based on a voltage level of the first power domain. The reset signal may be configured to reset the pulse generator in the first power domain. The apparatus may further include a latch configured to receive the second clock signal in the second power domain.

Abstract: This invention relates to novel compounds according to Formula (I) which are inhibitors of Enhancer of Zeste Homolog 2 (EZH2), to pharmaceutical compositions containing them, to processes for their preparation, and to their use in therapy for the treatment of cancers.

Abstract: A computer-implemented system and method for producing and distributing at least one product from at least one plant to at least one customer where discretized plant production data, filtered customer sourcing data, forecasted customer demand data, and forecasted plant electricity pricing data are input into a modified genetic algorithm and an electronic processor solves the modified genetic algorithm and outputs the solution to an interface. The system and method is flexible and can incorporate data as it becomes available to yield intermediate solutions for quick decision making.

Abstract: A method including receiving a request to connect to a single sign-on site, a non-single sign-on site, a system, a mainframe, or to use a mainframe or user device application; determining, by a toolbar of a user device, whether a user is authorized to connect to, initiate, or use the single sign-on site, the non-single sign-on site, the system, the mainframe, the mainframe or user device application; selecting, by the toolbar, one or more user credentials to allow the user to connect to, initiate, or use the single sign-on site, the non-single sign-on site, the system, the mainframe, the mainframe or the user device application when it is determined that the user is authorized; and signing-on, by the toolbar, to the single sign-on site, the non-single sign-on site, the system, the mainframe, the mainframe or user device application based on the one or more user credentials.

Abstract: A presentation state is received from the presenting application. The presentation state may represent a current state of the local presentation. A request for the presentation state is received from the viewing application. In response to receiving the request for the presentation state, the presentation state is provided to the viewing application. A request for presentation data synchronized to the presentation state is received from the viewing application. In response to receiving the request for presentation data synchronized to the presentation state, the presentation file is transformed into the presentation data synchronized to the presentation state. The presentation data synchronized to the presentation state is provided to the viewing application. The viewing application may be operative to read the presentation data and to display a remote presentation in response to reading the presentation data.

Abstract: Herein are disclosed indoles of formula (I) where the various groups are defined herein, and which are useful for treating cancer.

Abstract: In one embodiment, a method includes, by a computing device, receiving identifiers of one or more sessions, users, or groups selected to have access to a particular redirected device. The computing device stores the identifiers in a database, receives a request associated with a session, user, or group to access the particular redirected device, and determines whether an identifier for the session, user, or group associated with the request is stored in the database. If the identifier is stored in the database, then the computing device grants access to the redirected device, or if the identifier is not stored in the database, then the computing device blocks the session, user, or group from accessing the redirected device.

Abstract: A presentation state is received from the presenting application. The presentation state may represent a current state of the local presentation. A request for the presentation state is received from the viewing application. In response to receiving the request for the presentation state, the presentation state is provided to the viewing application. A request for presentation data synchronized to the presentation state is received from the viewing application. In response to receiving the request for presentation data synchronized to the presentation state, the presentation file is transformed into the presentation data synchronized to the presentation state. The presentation data synchronized to the presentation state is provided to the viewing application. The viewing application may be operative to read the presentation data and to display a remote presentation in response to reading the presentation data.