Patents by Inventor Shashank Sharma

Shashank Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20130288469
    Abstract: Methods and apparatus for implanting a dopant material are provided herein. In some embodiments, a method of processing a substrate disposed within a process chamber may include (a) implanting a dopant material into a surface of the substrate to form a doped layer in the substrate and an elemental dopant layer atop the doped layer; (b) removing at least some of the elemental dopant layer from atop the surface of the substrate; and (c) implanting the dopant material into the doped layer of the substrate; wherein (a)-(c) are performed without removing the substrate from the process chamber; and wherein (a)-(c) are repeated until at least one of a desired dopant implantation depth or a desired dopant implantation density is achieved.
    Type: Application
    Filed: April 12, 2013
    Publication date: October 31, 2013
    Applicant: APPLIED MATERIALS, INC.
    Inventors: SHASHANK SHARMA, MARTIN A. HILKENE, MATTHEW SCOTNEY-CASTLE, JOHN BOLAND
  • Publication number: 20120192789
    Abstract: This disclosure enables gas recovery and utilization for use in deposition systems and processes. The system includes a thin-film semiconductor layer deposition system comprising a deposition reactor, precursor gas feeds, and a gas recovery system.
    Type: Application
    Filed: December 31, 2011
    Publication date: August 2, 2012
    Applicant: SOLEXEL, INC.
    Inventors: Karl-Josef Kramer, Mehrdad M. Moslehi, Seiichi Yokoi, George D. Kamian, Shashank Sharma, Jay Ashjaee
  • Patent number: 8154127
    Abstract: An optical device includes a first electrode of a first conductivity type, and a second electrode of a second conductivity type. A nanowire is positioned between the first and second electrodes. The nanowire has at least two segments and a junction region formed between the at least two segments. One of the segments is the first conductivity type and the other of the segments is the second conductivity type. At least one of the at least two segments has a predetermined characteristic that affects optical behavior of the junction region.
    Type: Grant
    Filed: July 30, 2007
    Date of Patent: April 10, 2012
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, Alexandre M. Bratkovski, Shashank Sharma
  • Patent number: 7928568
    Abstract: A nanowire-based device includes the pair of isolated electrodes and a nanowire bridging between respective surfaces of the isolated electrodes of the pair. Specifically, the nanowire-based device having isolated electrodes comprises: a substrate electrode having a crystal orientation; a ledge electrode that is an epitaxial semiconductor having the crystal orientation of the substrate electrode; and a nanowire bridging between respective surfaces of the substrate electrode and the ledge electrode.
    Type: Grant
    Filed: June 2, 2009
    Date of Patent: April 19, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shashank Sharma, Theodore I Kamins
  • Patent number: 7906778
    Abstract: Methods of making nanometer-scale semiconductor structures with controlled size are disclosed. Semiconductor structures that include one or more nanowires are also disclosed. The nanowires can include a passivation layer or have a hollow tube structure.
    Type: Grant
    Filed: April 2, 2007
    Date of Patent: March 15, 2011
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Nobuhiko Kobayashi, Wei Wu, Duncan R Stewart, Shashank Sharma, Shih-Yuan Wang, R Stanley Williams
  • Patent number: 7804157
    Abstract: A device configured to have a nanowire formed laterally between two electrodes includes a substrate and an insulator layer established on at least a portion of the substrate. An electrode of a first conductivity type and an electrode of a second conductivity type different than the first conductivity type are established at least on the insulator layer. The electrodes are electrically isolated from each other. The electrode of the first conductivity type has a vertical sidewall that faces a vertical sidewall of the electrode of the second conductivity type, whereby a gap is located between the two vertical sidewalls. Methods are also disclosed for forming the device.
    Type: Grant
    Filed: June 16, 2006
    Date of Patent: September 28, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shashank Sharma, Theodore I. Kamins
  • Patent number: 7713352
    Abstract: A process is provided to produce bulk quantities of nanowires in a variety of semiconductor materials. Thin films and droplets of low-melting metals such as gallium, indium, bismuth, and aluminum are used to dissolve and to produce nanowires. The dissolution of solutes can be achieved by using a solid source of solute and low-melting metal, or using a vapor phase source of solute and low-melting metal. The resulting nanowires range in size from 1 nanometer up to 1 micron in diameter and lengths ranging from 1 nanometer to several hundred nanometers or microns. This process does not require the use of metals such as gold and iron in the form of clusters whose size determines the resulting nanowire size. In addition, the process allows for a lower growth temperature, better control over size and size distribution, and better control over the composition and purity of the nanowire produced therefrom.
    Type: Grant
    Filed: September 14, 2006
    Date of Patent: May 11, 2010
    Assignee: University of Louisville Research Foundation, Inc.
    Inventors: Mahendra Kumar Sunkara, Shashank Sharma, Hari Chandrasekaran, Hongwei Li, Sreeram Vaddiraju
  • Patent number: 7659631
    Abstract: A hybrid-scale electronic circuit, an internal electrical connection and a method of electrically interconnecting employ an interconnect having a tapered shape to electrically connect between different-scale circuits. The interconnect has a first end with an end dimension that is larger than an end dimension of an opposite, second end of the interconnect. The larger first end of the interconnect connects to an electrical contact of a micro-scale circuit and the second end of the interconnect connects to an electrical contact of a nano-scale circuit.
    Type: Grant
    Filed: October 12, 2006
    Date of Patent: February 9, 2010
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, Shashank Sharma
  • Patent number: 7638431
    Abstract: A metal is deposited onto a surface electrochemically using a deposition solution including a metal salt. In making a composite nanostructure, the solution further includes an enhancer that promotes electrochemical deposition of the metal on the nanostructure. In a method of forming catalyzing nanoparticles, the metal preferentially deposits on a selected location of a surface that is exposed through a mask layer instead of on unexposed surfaces. A composite nanostructure apparatus includes an array of nanowires and the metal deposited on at least some nanowire surfaces. Some of the nanowires are heterogeneous, branched and include different adjacent axial segments with controlled axial lengths. In some deposition solutions, the enhancer one or both of controls oxide formation on the surface and causes metal nanocrystal formation. The deposition solution further includes a solvent that carries the metal salt and the enhancer.
    Type: Grant
    Filed: September 29, 2006
    Date of Patent: December 29, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Amir A. Yasseri, Theodore I. Kamins, Shashank Sharma
  • Patent number: 7609432
    Abstract: A nanoelectromechanical (NEM) device and a method of making same employ a laterally extending nanowire. The nanowire is grown in place from a vertical side of a vertically extending support block that is provided on a horizontal surface of a substrate. The nanowire is spaced from the horizontal surface. The NEM device includes a component that is provided to influence the nanowire.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: October 27, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, Wei Wu, Shih-Yuan Wang, Shashank Sharma
  • Publication number: 20090236588
    Abstract: A nanowire-based device includes the pair of isolated electrodes and a nanowire bridging between respective surfaces of the isolated electrodes of the pair. Specifically, the nanowire-based device having isolated electrodes comprises: a substrate electrode having a crystal orientation; a ledge electrode that is an epitaxial semiconductor having the crystal orientation of the substrate electrode; and a nanowire bridging between respective surfaces of the substrate electrode and the ledge electrode.
    Type: Application
    Filed: June 2, 2009
    Publication date: September 24, 2009
    Inventors: Shashank Sharma, Theodore I Kamins
  • Patent number: 7570355
    Abstract: A NERS-active structure is disclosed that includes at least one heterostructure nanowire. The at least one heterostructure nanowire may include alternating segments of an NERS-inactive material and a NERS-active material in an axial direction. Alternatively, the alternating segments may be of an NERS-inactive material and a material capable of attracting nanoparticles of a NERS-active material. In yet another alternative, the heterostructure nanowire may include a core with alternating coatings of an NERS-inactive material and a NERS-active material in a radial direction. A NERS system is also disclosed that includes a NERS-active structure. Also disclosed are methods for forming a NERS-active structure and methods for performing NERS with NERS-active structures.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: August 4, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, Alexandre M. Bratkovski, Shashank Sharma
  • Patent number: 7544591
    Abstract: Methods of creating isolated electrodes and integrating a nanowire therebetween each employ lateral epitaxial overgrowth of a semiconductor material on a semiconductor layer to form isolated electrodes having the same crystal orientation. The methods include selective epitaxial growth of a semiconductor feature through a window in an insulating film on the semiconductor layer. A vertical stem is in contact with the semiconductor layer through the window and a ledge is a lateral epitaxial overgrowth of the vertical stem on the insulating film. The methods further include creating a pair of isolated electrodes from the semiconductor feature and the semiconductor layer. A nanowire-based device includes the pair of isolated electrodes and a nanowire bridging between respective surfaces of the isolated electrodes of the pair.
    Type: Grant
    Filed: January 18, 2007
    Date of Patent: June 9, 2009
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Shashank Sharma, Theodore I Kamins
  • Patent number: 7445671
    Abstract: A method of producing networks of low melting metal oxides such as crystalline gallium oxide comprised of one-dimensional nanostructures. Because of the unique arrangement of wires, these crystalline networks defined as “nanowebs”, “nanowire networks”, and/or “two-dimensional nanowires”. Nanowebs contain wire densities on the order of 109/cm2. A possible mechanism for the fast self-assembly of crystalline metal oxide nanowires involves multiple nucleation and coalescence via oxidation-reduction reactions at the molecular level. The preferential growth of nanowires parallel to the substrate enables them to coalesce into regular polygonal networks. The individual segments of the polygonal network consist of both nanowires and nanotubules of ?-gallium oxide. The synthesis of highly crystalline noncatalytic low melting metals such as ?-gallium oxide tubes, nanowires, and nanopaintbrushes is accomplished using molten gallium and microwave plasma containing a mixture of monoatomic oxygen and hydrogen.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: November 4, 2008
    Assignees: University of Louisville, University of Kentucky
    Inventors: Mahendra Kumar Sunkara, Shashank Sharma, Burtron H. Davis, Uschi M. Graham
  • Publication number: 20080237568
    Abstract: Methods of making nanometer-scale semiconductor structures with controlled size are disclosed. Semiconductor structures that include one or more nanowires are also disclosed. The nanowires can include a passivation layer or have a hollow tube structure.
    Type: Application
    Filed: April 2, 2007
    Publication date: October 2, 2008
    Inventors: Nobuhiko Kobayashi, Wei Wu, Duncan R. Stewart, Shashank Sharma, Shih-Yuan Wang, R. Stanley Williams
  • Publication number: 20080173971
    Abstract: Methods of creating isolated electrodes and integrating a nanowire therebetween each employ lateral epitaxial overgrowth of a semiconductor material on a semiconductor layer to form isolated electrodes having the same crystal orientation. The methods include selective epitaxial growth of a semiconductor feature through a window in an insulating film on the semiconductor layer. A vertical stem is in contact with the semiconductor layer through the window and a ledge is a lateral epitaxial overgrowth of the vertical stem on the insulating film. The methods further include creating a pair of isolated electrodes from the semiconductor feature and the semiconductor layer. A nanowire-based device includes the pair of isolated electrodes and a nanowire bridging between respective surfaces of the isolated electrodes of the pair.
    Type: Application
    Filed: January 18, 2007
    Publication date: July 24, 2008
    Inventors: Shashank Sharma, Theodore I. Kamins
  • Patent number: 7397558
    Abstract: Methods of forming NERS-active structures are disclosed that include ordered arrays of nanoparticles. Nanoparticles covered with an outer shell may be arranged in an ordered array on a substrate using Langmuir-Blodgett techniques. A portion of the outer shell may be removed, and the exposed nanoparticles may be used in a system to perform nanoenhanced Raman spectroscopy. An ordered array of nanoparticles may be used as a mask for forming islands of NERS-active material on a substrate. NERS-active structures and an NERS system that includes an NERS-active structure are also disclosed. Also disclosed are methods for performing NERS with NERS-active structures.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: July 8, 2008
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Theodore I. Kamins, Alexandre M. Bratkovski, Shashank Sharma
  • Publication number: 20080093693
    Abstract: A nanowire sensor is operable to detect one or more species. The nanowire sensor includes a nanowire having a plurality of variant selectively interactive segments. Each of the variant selectively interactive segments are configured to simultaneously interact with the species to modulate the conductance of the nanowire for detecting the species.
    Type: Application
    Filed: October 20, 2006
    Publication date: April 24, 2008
    Inventors: Theodore I. Kamins, Shashank Sharma, Philip J. Kuekes
  • Publication number: 20080087998
    Abstract: A hybrid-scale electronic circuit, an internal electrical connection and a method of electrically interconnecting employ an interconnect having a tapered shape to electrically connect between different-scale circuits. The interconnect has a first end with an end dimension that is larger than an end dimension of an opposite, second end of the interconnect. The larger first end of the interconnect connects to an electrical contact of a micro-scale circuit and the second end of the interconnect connects to an electrical contact of a nano-scale circuit.
    Type: Application
    Filed: October 12, 2006
    Publication date: April 17, 2008
    Inventors: Theodore I. Kamins, Shashank Sharma
  • Publication number: 20080088899
    Abstract: A nanoelectromechanical (NEM) device and a method of making same employ a laterally extending nanowire. The nanowire is grown in place from a vertical side of a vertically extending support block that is provided on a horizontal surface of a substrate. The nanowire is spaced from the horizontal surface. The NEM device includes a component that is provided to influence the nanowire.
    Type: Application
    Filed: October 13, 2006
    Publication date: April 17, 2008
    Inventors: Theodore I. Kamins, Wei Wu, Shih-Yuan Wang, Shashank Sharma