Patents by Inventor Shashank Sharma

Shashank Sharma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080081388
    Abstract: A metal is deposited onto a surface electrochemically using a deposition solution including a metal salt. In making a composite nanostructure, the solution further includes an enhancer that promotes electrochemical deposition of the metal on the nanostructure. In a method of forming catalyzing nanoparticles, the metal preferentially deposits on a selected location of a surface that is exposed through a mask layer instead of on unexposed surfaces. A composite nanostructure apparatus includes an array of nanowires and the metal deposited on at least some nanowire surfaces. Some of the nanowires are heterogeneous, branched and include different adjacent axial segments with controlled axial lengths. In some deposition solutions, the enhancer one or both of controls oxide formation on the surface and causes metal nanocrystal formation. The deposition solution further includes a solvent that carries the metal salt and the enhancer.
    Type: Application
    Filed: September 29, 2006
    Publication date: April 3, 2008
    Inventors: Amir A. Yasseri, Theodore I. Kamins, Shashank Sharma
  • Publication number: 20070290370
    Abstract: A device configured to have a nanowire formed laterally between two electrodes includes a substrate and an insulator layer established on at least a portion of the substrate. An electrode of a first conductivity type and an electrode of a second conductivity type different than the first conductivity type are established at least on the insulator layer. The electrodes are electrically isolated from each other. The electrode of the first conductivity type has a vertical sidewall that faces a vertical sidewall of the electrode of the second conductivity type, whereby a gap is located between the two vertical sidewalls. Methods are also disclosed for forming the device.
    Type: Application
    Filed: June 16, 2006
    Publication date: December 20, 2007
    Inventors: Shashank Sharma, Theodore I. Kamins
  • Patent number: 7307271
    Abstract: A nano-colonnade structure-and methods of fabrication and interconnection thereof utilize a nanowire column grown nearly vertically from a (111) horizontal surface of a semiconductor layer to another horizontal surface of another layer to connect the layers. The nano-colonnade structure includes a first layer having the (111) horizontal surface; a second layer having the other horizontal surface; an insulator support between the first layer and the second layer that separates the first layer from the second layer. A portion of the second layer overhangs the insulator support, such that the horizontal surface of the overhanging portion is spaced from and faces the (111) horizontal surface of the first layer. The structure further includes a nanowire column extending nearly vertically from the (111) horizontal surface to the facing horizontal surface, such that the nanowire column connects the first layer to the second layer.
    Type: Grant
    Filed: November 5, 2004
    Date of Patent: December 11, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: M. Saif Islam, Philip J. Kuekes, Shih-Yuan Wang, Duncan R. Stewart, Shashank Sharma
  • Publication number: 20070228523
    Abstract: Nano-scale devices and methods provide reduced feature dimensions of features on the devices. A surface of a device substrate having a pattern of spaced apart first nanowires is consumed, such that a dimension of the first nanowires is reduced. A second nanowire is formed in a trench or gap between adjacent ones of the first nanowires, such that the nano-scale device includes a set of features that includes the first nanowires with the reduced dimension and the second nanowire spaced from the adjacent first nanowires by sub-trenches.
    Type: Application
    Filed: February 23, 2007
    Publication date: October 4, 2007
    Inventor: Shashank Sharma
  • Publication number: 20070228583
    Abstract: A semiconductor nanowire is grown laterally. A method of growing the nanowire forms a vertical surface on a substrate, and activates the vertical surface with a nanoparticle catalyst. A method of laterally bridging the nanowire grows the nanowire from the activated vertical surface to connect to an opposite vertical surface on the substrate. A method of connecting electrodes of a semiconductor device grows the nanowire from an activated device electrode to an opposing device electrode. A method of bridging semiconductor nanowires grows nanowires between an electrode pair in opposing lateral directions. A method of self-assembling the nanowire bridges the nanowire between an activated electrode pair. A method of controlling nanowire growth forms a surface irregularity in the vertical surface. An electronic device includes a laterally grown nano-scale interconnection.
    Type: Application
    Filed: February 23, 2007
    Publication date: October 4, 2007
    Inventors: M. Islam, Theodore Kamins, Shashank Sharma
  • Publication number: 20070209576
    Abstract: A method of producing networks of low melting metal oxides such as crystalline gallium oxide comprised of one-dimensional nanostructures. Because of the unique arrangement of wires, these crystalline networks defined as “nanowebs”, “nanowire networks”, and/or “two-dimensional nanowires”. Nanowebs contain wire densities on the order of 109/cm2. A possible mechanism for the fast self-assembly of crystalline metal oxide nanowires involves multiple nucleation and coalescence via oxidation-reduction reactions at the molecular level. The preferential growth of nanowires parallel to the substrate enables them to coalesce into regular polygonal networks. The individual segments of the polygonal network consist of both nanowires and nanotubules of ?-gallium oxide. The synthesis of highly crystalline noncatalytic low melting metals such as ?-gallium oxide tubes, nanowires, and nanopaintbrushes is accomplished using molten gallium and microwave plasma containing a mixture of monoatomic oxygen and hydrogen.
    Type: Application
    Filed: June 16, 2004
    Publication date: September 13, 2007
    Inventors: Mahendra Sunkara, Shashank Sharma, Burtron Davis, Uschi Graham
  • Patent number: 7252811
    Abstract: This invention presents a process to produce bulk quantities of nanowires of a variety of semiconductor materials. Large liquid gallium drops are used as sinks for the gas phase solute, generated in-situ facilitated by microwave plasma. To grow silicon nanowires for example, a silicon substrate covered with gallium droplets is exposed to a microwave plasma containing atomic hydrogen. A range of process parameters such as microwave power, pressure, inlet gas phase composition, were used to synthesize silicon nanowires as small as 4 nm (nanometers) in diameter and several micrometers long. As opposed to the present technology, the instant technique does not require creation of quantum sized liquid metal droplets to synthesize nanowires. In addition, it offers advantages such as lower growth temperature, better control over size and size distribution, better control over the composition and purity of the nanowires.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: August 7, 2007
    Assignee: University of Louisville
    Inventors: Mahendra Kunmar Sunkara, Shashank Sharma
  • Publication number: 20070177139
    Abstract: A NERS-active structure is disclosed that includes at least one heterostructure nanowire. The at least one heterostructure nanowire may include alternating segments of an NERS-inactive material and a NERS-active material in an axial direction. Alternatively, the alternating segments may be of an NERS-inactive material and a material capable of attracting nanoparticles of a NERS-active material. In yet another alternative, the heterostructure nanowire may include a core with alternating coatings of an NERS-inactive material and a NERS-active material in a radial direction. A NERS system is also disclosed that includes a NERS-active structure. Also disclosed are methods for forming a NERS-active structure and methods for performing NERS with NERS-active structures.
    Type: Application
    Filed: January 27, 2006
    Publication date: August 2, 2007
    Inventors: Theodore Kamins, Alexandre Bratkovski, Shashank Sharma
  • Patent number: 7241432
    Abstract: This invention presents a process to produce bulk quantities of nanowires of a variety of semiconductor materials. Large liquid gallium drops are used as sinks for the gas phase solute, generated in-situ facilitated by microwave plasma. To grow silicon nanowires for example, a silicon substrate covered with gallium droplets is exposed to a microwave plasma containing atomic hydrogen. A range of process parameters such as microwave power, pressure, inlet gas phase composition, were used to synthesize silicon nanowires as small as 4 nm (nanometers) in diameter and several micrometers long. As opposed to the present technology, the instant technique does not require creation of quantum sized liquid metal droplets to synthesize nanowires. In addition, it offers advantages such as lower growth temperature, better control over size and size distribution, better control over the composition and purity of the nanowires.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: July 10, 2007
    Assignee: University of Louisville
    Inventors: Shashank Sharma, Mahendra Kumar Sunkara
  • Publication number: 20070105356
    Abstract: Nanowire growth in situ on a planar surface, which is one of a crystalline surface having any crystal orientation, a polycrystalline surface and a non-crystalline surface, is controlled by guiding catalyzed growth of the nanowire from the planar surface in a nano-throughhole of a patterned layer formed on the planar surface, such that the nanowire grows in situ perpendicular to the planar surface. An electronic device includes first and second regions of electronic circuitry vertically spaced by the patterned layer. The nano-throughhole of the patterned layer extends perpendicularly between the regions. The first region has the planar surface. The device further includes a nanowire extending perpendicular from a catalyst location on the planar surface of the first region in the nano-throughhole. The nanowire forms a component of a nano-scale circuit that connects the regions.
    Type: Application
    Filed: November 10, 2005
    Publication date: May 10, 2007
    Inventors: Wei Wu, Theodore Kamins, Shashank Sharma, R. Williams
  • Publication number: 20070095276
    Abstract: A process is provided to produce bulk quantities of nanowires in a variety of semiconductor materials. Thin films and droplets of low-melting metals such as gallium, indium, bismuth, and aluminum are used to dissolve and to produce nanowires. The dissolution of solutes can be achieved by using a solid source of solute and low-melting metal, or using a vapor phase source of solute and low-melting metal. The resulting nanowires range in size from 1 nanometer up to 1 micron in diameter and lengths ranging from 1 nanometer to several hundred nanometers or microns. This process does not require the use of metals such as gold and iron in the form of clusters whose size determines the resulting nanowire size. In addition, the process allows for a lower growth temperature, better control over size and size distribution, and better control over the composition and purity of the nanowire produced therefrom.
    Type: Application
    Filed: September 14, 2006
    Publication date: May 3, 2007
    Inventors: Mahendra Sunkara, Shashank Sharma, Hari Chandrasekaran, Hongwei Li, Sreeram Vaddiraju
  • Patent number: 7208094
    Abstract: A semiconductor nanowire is grown laterally. A method of growing the nanowire forms a vertical surface on a substrate, and activates the vertical surface with a nanoparticle catalyst. A method of laterally bridging the nanowire grows the nanowire from the activated vertical surface to connect to an opposite vertical surface on the substrate. A method of connecting electrodes of a semiconductor device grows the nanowire from an activated device electrode to an opposing device electrode. A method of bridging semiconductor nanowires grows nanowires between an electrode pair in opposing lateral directions. A method of self-assembling the nanowire bridges the nanowire between an activated electrode pair. A method of controlling nanowire growth forms a surface irregularity in the vertical surface. An electronic device includes a laterally grown nano-scale interconnection.
    Type: Grant
    Filed: December 17, 2003
    Date of Patent: April 24, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: M. Saif Islam, Theodore I. Kamins, Shashank Sharma
  • Patent number: 7189635
    Abstract: Nano-scale devices and methods provide reduced feature dimensions of features on the devices. A surface of a device substrate having a pattern of spaced apart first nanowires is consumed, such that a dimension of the first nanowires is reduced. A second nanowire is formed in a trench or gap between adjacent ones of the first nanowires, such that the nano-scale device includes a set of features that includes the first nanowires with the reduced dimension and the second nanowire spaced from the adjacent first nanowires by sub-trenches.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: March 13, 2007
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Shashank Sharma
  • Patent number: 7182812
    Abstract: The bulk synthesis of highly crystalline noncatalytic low melting metals such as ?-gallium oxide tubes, nanowires, and nanopaintbrushes is accomplished using molten gallium and microwave plasma containing a mixture of monoatomic oxygen and hydrogen. Gallium oxide nanowires were 20–100 nm thick and tens to hundreds of microns long. Transmission electron microscopy (TEM) revealed the nanowires to be highly crystalline and devoid of any structural defects. Results showed that multiple nucleation and growth of gallium oxide nanostructures can occur directly out of molten gallium exposed to appropriate composition of hydrogen and oxygen in the gas phase. These gallium oxide nanostructures are of particular interest for opto-electronic devices and catalytic applications.
    Type: Grant
    Filed: September 16, 2003
    Date of Patent: February 27, 2007
    Assignee: University of Louisville
    Inventors: Mahendra Kumar Sunkara, Shashank Sharma
  • Publication number: 20070003467
    Abstract: This invention presents a process to produce bulk quantities of nanowires of a variety of semiconductor materials. Large liquid gallium drops are used as sinks for the gas phase solute, generated in-situ facilitated by microwave plasma. To grow silicon nanowires for example, a silicon substrate covered with gallium droplets is exposed to a microwave plasma containing atomic hydrogen. A range of process parameters such as microwave power, pressure, inlet gas phase composition, were used to synthesize silicon nanowires as small as 4 nm (nanometers) in diameter and several micrometers long. As opposed to the present technology, the instant technique does not require creation of quantum sized liquid metal droplets to synthesize nanowires. In addition, it offers advantages such as lower growth temperature, better control over size and size distribution, better control over the composition and purity of the nanowires.
    Type: Application
    Filed: September 1, 2006
    Publication date: January 4, 2007
    Inventors: Mahendra Sunkara, Shashank Sharma
  • Publication number: 20060209300
    Abstract: Methods of forming NERS-active structures are disclosed that include ordered arrays of nanoparticles. Nanoparticles covered with an outer shell may be arranged in an ordered array on a substrate using Langmuir-Blodgett techniques. A portion of the outer shell may be removed, and the exposed nanoparticles may be used in a system to perform nanoenhanced Raman spectroscopy. An ordered array of nanoparticles may be used as a mask for forming islands of NERS-active material on a substrate. NERS-active structures and an NERS system that includes an NERS-active structure are also disclosed. Also disclosed are methods for performing NERS with NERS-active structures.
    Type: Application
    Filed: March 17, 2005
    Publication date: September 21, 2006
    Inventors: Theodore Kamins, Alexandre Bratkovski, Shashank Sharma
  • Publication number: 20060097389
    Abstract: A nano-colonnade structure-and methods of fabrication and interconnection thereof utilize a nanowire column grown nearly vertically from a (111) horizontal surface of a semiconductor layer to another horizontal surface of another layer to connect the layers. The nano-colonnade structure includes a first layer having the (111) horizontal surface; a second layer having the other horizontal surface; an insulator support between the first layer and the second layer that separates the first layer from the second layer. A portion of the second layer overhangs the insulator support, such that the horizontal surface of the overhanging portion is spaced from and faces the (111) horizontal surface of the first layer. The structure further includes a nanowire column extending nearly vertically from the (111) horizontal surface to the facing horizontal surface, such that the nanowire column connects the first layer to the second layer.
    Type: Application
    Filed: November 5, 2004
    Publication date: May 11, 2006
    Inventors: M. Islam, Philip Kuekes, Shih-Yuan Wang, Duncan Stewart, Shashank Sharma
  • Publication number: 20060063368
    Abstract: Nano-scale devices and methods provide reduced feature dimensions of features on the devices. A surface of a device substrate having a pattern of spaced apart first nanowires is consumed, such that a dimension of the first nanowires is reduced. A second nanowire is formed in a trench or gap between adjacent ones of the first nanowires, such that the nano-scale device includes a set of features that includes the first nanowires with the reduced dimension and the second nanowire spaced from the adjacent first nanowires by sub-trenches.
    Type: Application
    Filed: September 17, 2004
    Publication date: March 23, 2006
    Inventor: Shashank Sharma
  • Publication number: 20050133476
    Abstract: A semiconductor nanowire is grown laterally. A method of growing the nanowire forms a vertical surface on a substrate, and activates the vertical surface with a nanoparticle catalyst. A method of laterally bridging the nanowire grows the nanowire from the activated vertical surface to connect to an opposite vertical surface on the substrate. A method of connecting electrodes of a semiconductor device grows the nanowire from an activated device electrode to an opposing device electrode. A method of bridging semiconductor nanowires grows nanowires between an electrode pair in opposing lateral directions. A method of self-assembling the nanowire bridges the nanowire between an activated electrode pair. A method of controlling nanowire growth forms a surface irregularity in the vertical surface. An electronic device includes a laterally grown nano-scale interconnection.
    Type: Application
    Filed: December 17, 2003
    Publication date: June 23, 2005
    Inventors: M. Islam, Theodore Kamins, Shashank Sharma
  • Publication number: 20050072351
    Abstract: The bulk synthesis of highly crystalline noncatalytic low melting metals such as ?-gallium oxide tubes, nanowires, and nanopaintbrushes is accomplished using molten gallium and microwave plasma containing a mixture of monoatomic oxygen and hydrogen. Gallium oxide nanowires were 20-100 nm thick and tens to hundreds of microns long. Transmission electron microscopy (TEM) revealed the nanowires to be highly crystalline and devoid of any structural defects. Results showed that multiple nucleation and growth of gallium oxide nanostructures can occur directly out of molten gallium exposed to appropriate composition of hydrogen and oxygen in the gas phase. These gallium oxide nanostructures are of particular interest for opto-electronic devices and catalytic applications.
    Type: Application
    Filed: September 16, 2003
    Publication date: April 7, 2005
    Inventors: Mahendra Sunkara, Shashank Sharma