Abstract: A liquid crystal display (LCD) device integrating driving circuit on an active-matrix substrate. A common electrode disposed on a counter substrate has an opening slit corresponding to a clock line disposed on the matrix substrate, thereby eliminating parasitic capacitance between the clock line and the common electrode.

Abstract: A clock signal amplifying method and driving stage for LCD driving circuit is provided. The driving stage includes a clock input, a level shifter, and an output buffer. Firstly, the clock input receives a cock signal oscillating between a high original level and a low original level. Thereafter, a level shifter is biased at a high target level and a low target level, and amplifies the clock signal to a relay signal, which oscillates between a high relay level and a low relay level. Lastly, the output buffer is biased at the high relay level and the low relay level for amplifying the relay signal to a target signal, which oscillates between the high target level and the low target level.

Abstract: A shift-register circuit. The PMOS transistor includes a first gate coupled to an inverse output signal output from a previous-stage shift-register unit, a first drain, and a first source coupled to an output signal output from the previous-stage shift-register unit. The first NMOS transistor includes a second gate coupled to the first drain, a second drain coupled to the clock signal, and a second source. The capacitor is coupled between the second gate and the second source. The second NMOS transistor includes a third gate coupled to the first drain, a third drain coupled to the inverse clock signal, and a third source. The third NMOS transistor includes a fourth gate coupled to the first gate, a fourth drain coupled to the second gate, and a fourth source. The fourth NMOS transistor includes a fifth gate coupled to the first source, a fifth drain coupled to the second source, and a fifth source coupled to the ground voltage level.

Abstract: A bi-directional shift register circuit comprising, a plurality of shift register stages, each having an input and an output terminal, and a bi-directional shift controller circuit associated with each of said shift register stages is disclosed. The bi-directional shift controller circuit comprises a first input connected to a output terminal of a first shift register stage and a second input connected to a output terminal of a second shift register stage. Means to apply a first and a second control voltage, wherein said first and second control voltage are different, and a combinatorial circuit responsive to said first and second control voltages to apply an indication of an input received from either said first shift register or said second shift register to said corresponding shift register input terminal. The combinatorial circuit configuration is that of a NOR gate or a NAND gate.

Abstract: A driving method of liquid crystal display. Voltage levels of pre-charging signals applied to storage electrodes vary before scan signals are applied to scan lines. Partial response voltage of the variations in voltage levels of pre-charging signals are respectively coupled to storage capacitors within pixels by capacitors. When the scan signals are applied to the scan lines, voltage swings of the pixel capacitors charged by image data on data lines decrease, rapidly charging the pixels.

Abstract: A repairing structure of an integrated driving circuit for flat panel displays is disclosed. The repairing structure of the integrated driving circuit includes at least one driving circuit, a multiplexer unit and a display area. The multiplexer unit is connected to the at least one driving circuit through a plurality of video signal lines, and also, is connected to the display area through a plurality of data lines. The multiplexer unit further includes a dummy portion having a plurality of input-leads and a plurality of output-leads for repairing the connection between the multiplexer unit and the driving circuit or the display area.

Abstract: A shift-register circuit comprises an inverter and first to fourth transistors. The first transistor includes a gate coupled to an inverse clock signal, and a first source/drain coupled to a signal output from a previous-stage shift-register unit. The inverter includes a first input terminal coupled to the first source/drain of the first transistor. The second transistor includes a gate coupled to a second source/drain of the first transistor, a first source/drain coupled to a clock signal, and a second source/drain coupled to an output terminal. The third transistor includes a gate coupled to a first output terminal of the inverter, a first source/drain coupled to the output terminal, and a second source/drain coupled to a first voltage. The fourth transistor includes a gate coupled to a signal output from a next-stage shift-register unit, a first source/drain coupled to the output terminal, and a second source/drain coupled to the first voltage.

Abstract: A video sampling circuit of a liquid crystal display with a merit of feed-through voltage reduction was disclosed. The sampling circuit comprises a first thin film transistor (TFT) and a counteracting device. The first TFT has a first electrode to receive the analog signal, a control electrode to receive the clock signal, and a second electrode, and samples the analog signal when the clock signal is at a first logic level. The counteracting device is coupled to the second electrode. When the clock signal is changed from the first logic level to a second logic level, a feed-through voltage drop caused by a parasitic capacitor between the second electrode and the control electrode of the first TFT is reduced.

Abstract: Display panel with the integrated driver circuit, the display panel comprises an isolating array substrate and further comprises a plurality of peripheral areas, a liquid crystal injection hole, display area, gate driver circuit and data driver circuit. This invention disposes the data driver circuit on the adjacent edge of the peripheral area, and disposes the liquid crystal injection hole on one peripheral area which is opposite to one of the adjacent edges. This invention makes it convenient to design the display panel.

Abstract: An advertisement light box is disclosed. The light box comprises a main frame, a panel, a light guiding structure, a light guiding source positioning device. The inner side of the panel is provided with a locking hole and the four sides of the panel can be lifted or the entire panel can be lifted by means of the fastening of connection plate, and the light box is provided with a clip for easy mounting of an advertisement material, and the four lateral sides of the light guiding structure are provided with a light guiding source fastener which is an inverted U-shaped board directly mounted to the edge of the light guiding structure so as to prevent the light guiding board to deform or to prevent the light to leak, the interior of the inverted U-shaped board is provided with light tubes, and the inner wall of the U-shaped board is coated with a silver or the like material to provide good reflection of light.

Abstract: A shaft-type locking cylinder and dedicated key comprises a locking cylinder base, a main mount, a key, a plurality of tumbler pins, a plurality of springs, and a plurality of steel balls. The plurality of tumbler pins, springs and steel balls situated in the locking cylinder base are placed into a bore in the main mount, thereby enabling the fitting of an annular shoulder at the front end of the locking cylinder base into a first stepped rim in the main mount, the seating of a retaining ring in a second stepped rim to secure the locking cylinder base in the main mount and, furthermore, the concealment of the tumbler pins installed within the locking cylinder base. The said key further comprises a toggling barrel member having a plurality of differing-depth arcuate notches, a vertical slot in the toggling barrel member and a horizontal slot formed at one side of the vertical slot.

Abstract: A shift-register circuit comprises an inverter and first to fourth transistors. The first transistor includes a gate coupled to an inverse clock signal, and a first source/drain coupled to a signal output from a previous-stage shift-register unit. The inverter includes a first input terminal coupled to the first source/drain of the first transistor. The second transistor includes a gate coupled to a second source/drain of the first transistor, a first source/drain coupled to a clock signal, and a second source/drain coupled to an output terminal. The third transistor includes a gate coupled to a first output terminal of the inverter, a first source/drain coupled to the output terminal, and a second source/drain coupled to a first voltage. The fourth transistor includes a gate coupled to a signal output from a next-stage shift-register unit, a first source/drain coupled to the output terminal, and a second source/drain coupled to the first voltage.

Abstract: A bi-directional shift-register circuit for outputting data in different turns and reducing the power loss according to a low-voltage clock signal, a first directional signal, and a second directional signal.

Abstract: A display driving circuit having a plurality of driving stages and driving lines is provided. The driving stages are electrically coupled in serial, and each of the driving stages comprises a conducting path for transmitting an electric signal from the previous driving stage to the next driving stage via the current driving stage. Each of the driving lines respectively corresponds to a driving stage and electrically connects to an output terminal of the corresponding driving stage. The display driving circuit is characterized in that a redundant device is only installed in one part of the driving stages. The redundant device is capable of supplying an extra conducting path to transmit an electric signal from the previous driving stage to the next driving stage via the current driving stage while the original conducting path in the corresponding driving stage is broken.

Abstract: A bi-directional shift-register circuit for outputting data in different sequence. A first shift-register unit includes a first-stage control terminal and a first-stage output terminal outputs a first output signal. A second shift-register unit includes a second-stage input terminal coupled to the first-stage output terminal and a third-stage output terminal, a second-stage control terminal and a second-stage output terminal outputs a second output signal. The second-stage control terminal is selectively coupled to the first-stage output terminal and the third-stage output terminal and disables the second shift-register unit according to the first output signal or a third output signal. A third shift-register unit includes a third-stage control terminal and the third-stage output terminal outputs the third output signal.

Abstract: A dual gate layout of a thin film transistor of liquid crystal display to alleviate dark current leakage is disclosed. The layout comprises (1) a polysilicon on a substrate having a L-shaped or a snake shaped from top-view, which has a heavily doped source region, a first lightly doped region, a first gate channel, a second lightly doped region, a second gate channel, a third lightly doped region and a heavily doped drain region formed in order therein; (2) a gate oxide layer formed on the polysilicon layer and the substrate, (3) a gate metal layer then formed on the gate oxide layer having a scanning line and an extension portion with a L-shaped or an I-shaped. The gate metal intersects with the polysilicon layer thereto define the forgoing gate channels. Among of gate channels, at least one is along the signal line, which is connected to the source region through a source contact.

Abstract: An integrated driver device frame of a liquid crystal display panel is provided. The integrated driver device frame comprises a plurality of driver units, a plurality of driver lines and a plurality of output terminals. Each output terminal is coupled to a corresponding pixel element respectively. In the integrated driver device frame of the invention, the plurality of driver units is arranged with two staggered rows, in order that the driver unit width is larger than the interval of every neighboring two output terminals and is less than two times of the interval. Accordingly, the interval of two neighboring output terminals can be equal to the pixel pitch and the dot-per-inch resolution of the LCD panel can be enhanced.

Abstract: A level-shifting circuit comprising an enable circuit is disclosed. The level modulating circuit includes an input terminal and an inverse input terminal for respectively receiving a complementary pair of small signals, and a first output terminal for outputting a voltage level in response to the complementary pair of small signals. The enable circuit is coupled to the first output terminal and makes the first output terminal output a predetermined voltage level signal when receiving a disable signal.

Abstract: This invention relates to a driving circuit for flat panel displays wherein the driving circuit is disposed on a flat panel display panel. The circuit has a plurality of signal lines, at least one buffer unit for inverting a scanning signal, a plurality of switch units and an active area (display area). The plurality of signal lines supplies a plurality of analogous video signals to the plurality of switch units. The unit for inverting a scanning signal generates at least a scanning signal which is then outputted to the plurality of switch units. The analogous video signal so received is transformed into the active-matrix display area by controlling the operation of the plurality of switch units.

Abstract: A bi-directional shift-register circuit for outputting data in different sequence. A first shift-register unit includes a first-stage control terminal and a first-stage output terminal outputs a first output signal. A second shift-register unit includes a second-stage input terminal coupled to the first-stage output terminal and a third-stage output terminal, a second-stage control terminal and a second-stage output terminal outputs a second output signal. The second-stage control terminal is selectively coupled to the first-stage output terminal and the third-stage output terminal and disables the second shift-register unit according to the first output signal or a third output signal. A third shift-register unit includes a third-stage control terminal and the third-stage output terminal outputs the third output signal.