Abstract: A lighting strip has a printed circuit board with one or more perforated lines at which the printed circuit board length may be adjusted by breaking off an end portion of the printed circuit board. A first layer has a first set of conductive tracks and a second layer has a second set of conductive tracks corresponding to the first set of conductive tracks. Each conductive track of the second set is vertically aligned and positioned over the corresponding conductive track of the first set. An array of contact terminals is provided on a third layer. A plurality of lighting elements is disposed along the lighting strip, each electrically connected to a respective pair of the contact terminals. The lighting strip further comprises a set of vias connecting each conductive track of the first set to the corresponding conductive track of the second set.

Abstract: Fingerprint encryption method and device, fingerprint decryption method and device, storage medium and terminal are provided. The fingerprint encryption method includes: acquiring a fingerprint image; dividing the fingerprint image into a plurality of block images according to a preset window, wherein a size of the block image is the same with a size of the preset window; determining identifiers of the plurality of block images, wherein the identifiers of the plurality of block images have a first preset order; and determining, according to the identifiers of the plurality of block images and a received encryption order, a plurality of encrypted block images to obtain an encrypted fingerprint image. Security of fingerprint storage or fingerprint transmission is enhanced.

Abstract: An online continual learning method and system are provided. The online continual learning method includes: receiving a plurality of training data of a class under recognition; applying a discrete and deterministic augmentation operation on the plurality of training data of the class under recognition to generate a plurality of intermediate classes; generating a plurality of view data from the intermediate classes; extracting a plurality of characteristic vectors from the view data; and training a model based on the feature vectors.

Abstract: An electromigration (EM) sign-off methodology that analyzes an integrated circuit design layout to identify heat sensitive structures, self-heating effects, heat generating structures, and heat dissipating structures. The EM sign-off methodology includes adjustments of an evaluation temperature for a heat sensitive structure by calculating the effects of self-heating within the temperature sensitive structure as well as additional heating and/or cooling as a function of thermal coupling to surrounding heat generating structures and/or heat sink elements located within a defined thermal coupling volume or range.

Abstract: A method for manufacturing an electromagnetic shielding film of reduced thickness and a simplified manufacturing process includes forming a conductive ink layer by inkjet printing, on a component to be shielded, forming an insulative ink layer on the conductive ink layer by inkjet printing, and sintering the conductive ink layer and the insulative ink layer to form an electromagnetic shielding layer and an insulative layer, thereby obtaining the electromagnetic shielding film.

Abstract: A stretchable electroconductive material includes 100 parts by weight of PEDOT-PSS, 200 parts to 1000 parts by weight of a repair linking agent, 15 parts to 300 parts by weight of an ionic liquid plasticizer, and 15 parts to 200 parts by weight of carbon material particles. The repair linking agent is selected from a group consisting of polyethylene glycol and polyethylene oxide, and any combination thereof. The repair linking agent, the ionic liquid plasticizer, and the carbon material particles are doped in the PEDOT-PSS. A method for manufacturing the stretchable electroconductive material and a device using the stretchable electroconductive material are also provided.

Abstract: A method for evaluating a heat sensitive structure involving identifying a heat sensitive structure in an integrated circuit design layout, the heat sensitive structure characterized by a nominal temperature, identifying a heat generating structure within a thermal coupling range of the heat sensitive structure, calculating an operating temperature of the first heat generating structure; calculating a temperature increase or the heat sensitive structure induced by thermal coupling to the heat generating structure at the operating temperature; and performing an electromigration (EM) analysis of the heat sensitive structure at an evaluation temperature obtained by adjusting the nominal temperature by the temperature increase induced by the heat generating structure.

Abstract: The present disclosure provides a fingerprint identification method and apparatus, a storage medium, and a terminal. The fingerprint identification method includes: collecting a to-be-identified fingerprint image of a to-be-identified fingerprint; identifying whether the to-be-identified fingerprint belongs to a first type of fingerprint; calculating an image correlation between the to-be-identified fingerprint image and a standard fingerprint image, when it's determined that the to-be-identified fingerprint belongs to the first type of fingerprint; calculating a feature point matching result between the to-be-identified fingerprint image and the standard fingerprint image when it's determined that the to-be-identified fingerprint does not belong to the first type of fingerprint; and determining whether the to-be-identified fingerprint is consistent with the standard fingerprint; wherein the standard fingerprint image is a fingerprint image collected from a standard fingerprint.

Abstract: A semiconductor device is provided, which includes an epitaxial structure, an electrode pad, and a contact region. The epitaxial structure includes a geometric center, a first surface and a second surface opposite to the first surface. The electrode pad is on the first surface. The contact region is on the second surface and includes a first group and a second group. The first group includes a plurality of first contact portions separated from each other and is arranged in a first ring shape. The second group includes a plurality of second contact portions separated from each other and is arranged in a second ring shape. A second distance between each of the plurality of second contact portions and the geometric center is greater than a first distance between each of the plurality of first contact portions and the geometric center.

Abstract: The present invention provides a multi-die package including main die, a memory die, a first set of pins and a second set of pins. The main die includes a memory controller, a first set of pads, a second set of pads and a third set of pads. The memory die is coupled to the first set of pads and the second set of pads of the main die. The first set of pins is coupled to the third set of pads of the main die. The second set of pins is coupled to the second set of pads of the main die. The memory controller accesses the memory die through the first set of pads and the second set of pads, and the memory controller accesses a memory chip external to the multi-die package through the second set of pads and the third set of pads.

Abstract: A method of making a semiconductor device includes defining a first fin structure over a major surface of a substrate, wherein the first fin includes a first material. The method includes defining a second fin structure over the major surface of the substrate. Defining the second fin structure includes forming a lower portion of the second fin structure, closest to the substrate, having the first material, and forming an upper portion of the second fin structure, farthest from the substrate, having a second material different from the first material. The method includes forming a dielectric material over the substrate and between the first and second fin structures. The method includes removing the upper portion of the second fin structure, wherein removing the upper portion of the second fin structure includes reducing a height of the second fin structure to be less than a height of the first fin structure.

Abstract: A composite fabric which is elastic and conductive and thus able to detect a user's limb and body movements includes a fabric layer and an elastic conductive layer of elastomer and conductive filler formed on the fabric layer. A resistance value and a strain increments of the fabric satisfy a relationship of RT=R+n? or RT=R+m en?, wherein ? denotes the strain increment, R denotes the resistance value when the strain increment is 0, and RT denotes the resistance value when deformed through the increments. The m and n are coefficients, being a whole number or a fraction. A user can immediately detect and know the movements of his limbs according to the resistance value of the elastic conductive composite fabric.

Abstract: A package structure including a substrate, a first semiconductor element disposed on and electrically connected with the substrate, a second semiconductor element disposed on and electrically connected with the substrate and a molding layer disposed over the substrate and covering at least a top surface of the substrate. The second semiconductor element and the first semiconductor element perform different functions. The molding layer encapsulates the second semiconductor element and wraps around sidewalls of the first semiconductor element. A top surface of the molding layer is higher than a top surface of the first semiconductor element. The molding layer has an opening extending from the top surface of the molding layer to the top surface of the first semiconductor element, so that the top surface of the first semiconductor element is exposed.

Abstract: A probe card and a probe module thereof are provided. The probe card includes a first strengthening board, a fixed frame, a probe module, and a slidable frame. The first strengthening board includes a top surface, a bottom surface, and a mounting hole. An inner wall of the mounting hole is formed with an inner flange. The fixed frame is disposed on the top surface of the first strengthening board and surrounds the mounting hole. The probe module is disposed in the mounting hole and includes an outer flange including a physical region and multiple gap regions. The physical region abuts against the inner flange of the first strengthening board. The slidable frame is disposed on an inner wall of the fixed frame and is slidable between a released position and a fixed position. Multiple pressing portions are disposed on an inner wall of the slidable frame.

Abstract: A method for fabricating semiconductor device includes the steps of forming an inter-metal dielectric (IMD) layer on a substrate, forming a trench in the IMD layer, forming a synthetic antiferromagnetic (SAF) layer in the trench, forming a metal layer on the SAF layer, planarizing the metal layer and the SAF layer to form a metal interconnection, and forming a magnetic tunneling junction (MTJ) on the metal interconnection.

Abstract: A memory device including a base semiconductor die, conductive terminals, memory dies, an insulating encapsulation and a buffer cap is provided. The conductive terminals are disposed on a first surface of the base semiconductor die. The memory dies are stacked over a second surface of the base semiconductor die, and the second surface of the base semiconductor die is opposite to the first surface of the base semiconductor die. The insulating encapsulation is disposed on the second surface of the base semiconductor die and laterally encapsulates the memory dies. The buffer cap covers the first surface of the base semiconductor die, sidewalls of the base semiconductor die and sidewalls of the insulating encapsulation. A package structure including the above-mentioned memory device is also provided.

Abstract: A semiconductor device is provided, which includes a substrate, a first semiconductor structure, a plurality of first holes, a first dielectric structure and a second semiconductor structure. The first semiconductor structure is located on the substrate. The first holes are periodically arranged in the first semiconductor structure. The first dielectric structure is filled in one or more of the first holes. The second semiconductor structure is located on the first semiconductor structure.

Abstract: The present disclosure provides a light detection apparatus and application thereof. The apparatus includes: a nonopaque cover plate, a display, and a photosensor, and further including a processor configured to transmit a display driving signal to the display when the apparatus detects a touch signal on the apparatus; wherein the display includes a plurality of display pixels configured to emit an optical signal when receiving the display driving signal transmitted by the processor, and the optical signal is reflected on an upper surface of the nonopaque cover plate to form a reflected optical signal; and wherein the reflected optical signal is received by the photosensor. By some embodiments of the present disclosure, obtained physiological feature information can be more accurate and identification precision can be effectively improved.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the first IMD layer; forming a bottom electrode layer and a pinned layer on the first IMD layer; forming a sacrificial layer on the pinned layer; patterning the sacrificial layer, the pinned layer, and the bottom electrode layer to form a first magnetic tunneling junction (MTJ); forming a second IMD layer around the first MTJ; removing the sacrificial layer to form a recess; forming a barrier layer and a free layer in the recess; forming a top electrode layer on the free layer; and patterning the top electrode layer and the free layer to form a second MTJ.

Abstract: A method for fabricating semiconductor device includes the steps of: forming a first inter-metal dielectric (IMD) layer on a substrate; forming a metal interconnection in the first IMD layer; forming a bottom electrode layer and a pinned layer on the first IMD layer; forming a sacrificial layer on the pinned layer; patterning the sacrificial layer, the pinned layer, and the bottom electrode layer to form a first magnetic tunneling junction (MTJ); forming a second IMD layer around the first MTJ; and removing the sacrificial layer.