Patents by Inventor Sheng Wang
Sheng Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250118655Abstract: A semiconductor structure according to the present disclosure includes a substrate; a through substrate via (TSV) cell over the substrate; and a TSV extending through the TSV cell and the substrate. The TSV cell includes a guard ring structure extending around a perimeter of the TSV cell, and a buffer zone surrounded by the guard ring. The buffer zone includes first dummy transistors, and second dummy transistors. Each of the first dummy transistors includes two first type epitaxial features, a first plurality of nanostructures extending between the two first type epitaxial features, and a first isolation gate structure wrapping over the first plurality of nanostructures. Each of the second dummy transistors includes two second type epitaxial feature, a second plurality of nanostructures extending between the two first type epitaxial features, and a second isolation gate structure wrapping over the second plurality of nanostructures.Type: ApplicationFiled: January 19, 2024Publication date: April 10, 2025Inventors: Yun-Sheng Li, Chih Hsin Yang, Chih-Chieh Chang, Mao-Nan Wang, Kuan-Hsun Wang, Yang-Hsin Shih
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Patent number: 12273110Abstract: Disclosed in the present invention are a low-temperature coefficient ring oscillator, a chip, and a communication terminal. The low-temperature coefficient ring oscillator comprises a temperature tracking compensation circuit, an inverter oscillation circuit, and a buffer shaping circuit. The temperature characteristics of the impedance of a PMOS tube and an NMOS tube in an inverter in the inverter oscillation circuit are tracked and compensated for by means of the impedance, along with temperature change, of a PMOS tube and a NMOS tube connected by a diode.Type: GrantFiled: May 16, 2023Date of Patent: April 8, 2025Assignee: SHANGHAI VANCHIP TECHNOLOGIES CO., LTD.Inventors: Chenyang Gao, Yongshou Wang, Sheng Lin
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Patent number: 12272616Abstract: Packaged semiconductor devices including heat-dissipating structures and methods of forming the same are disclosed. In an embodiment, a semiconductor package includes a semiconductor die including a substrate, a front-side interconnect structure on a front-side of the substrate, and a backside interconnect structure on a backside of the substrate opposite the front-side interconnect structure; a support die disposed on the front-side interconnect structure; a heat-dissipating structure on the support die, the heat-dissipating structure being thermally coupled to the semiconductor die and the support die; a redistribution structure on the backside interconnect structure opposite the substrate, the redistribution structure being electrically coupled to the semiconductor die; and an encapsulant on the redistribution structure and adjacent to side surfaces of the semiconductor die, the support die, and the heat-dissipating structure.Type: GrantFiled: March 22, 2022Date of Patent: April 8, 2025Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Chen-Hua Yu, Tung-Liang Shao, Yu-Sheng Huang, Shih-Chang Ku, Chuei-Tang Wang
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Patent number: 12272022Abstract: The quality of a frame sequence is enhanced by a booster engine collaborating with a first stage circuit. The first stage circuit adjusts the quality degradation of the frame sequence when a condition in constrained resources is detected. The quality degradation includes at least one of uneven resolution and uneven frame per second (FPS). The booster engine receives the frame sequence from the first stage circuit, and generates an enhanced frame sequence based on the frame sequence for transmission to a second stage circuit.Type: GrantFiled: August 24, 2022Date of Patent: April 8, 2025Assignee: MediaTek Inc.Inventors: Yao-Sheng Wang, Pei-Kuei Tsung, Chiung-Fu Chen, Wai Mun Wong, Chao-Min Chang, Yu-Sheng Lin, Chiani Lu, Chih-Cheng Chen
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Patent number: 12271610Abstract: Techniques for data storage involve selecting a target Redundant Array of Independent Disks (RAID) from a plurality of RAIDs in a storage resource pool. Such techniques further involve determining a local neighbor matrix of the target RAID based on the target RAID, wherein the local neighbor matrix indicates distribution of a plurality of storage extents of a plurality of RAID extents of the target RAID on the storage resource pool. Such techniques further involve performing a resource reallocating operation on the storage resource pool based on the local neighbor matrix. Accordingly, a local neighbor matrix can be calculated at the granularity of an individual RAID, and the local neighbor matrix can be applied to balance a local neighboring relationship, so as to ensure overall balance of the neighbor matrix of the entire storage resource pool and improve IO performance.Type: GrantFiled: July 27, 2023Date of Patent: April 8, 2025Assignee: Dell Products L.P.Inventors: Sheng Wang, Dapeng Chi, Huan Chen, Chen Gong
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Publication number: 20250112217Abstract: Provided are a package structure and a method of forming the same. The package structure includes a first tier, a second tier, and a third tier. The first tier includes an interposer. The second tier is disposed on the first tier and includes a bottom die. The third tier is disposed on the second tier and includes a plurality of first dies and at least one second die. The at least one second die is disposed between the plurality of first dies. The plurality of first dies are electrically connected to the bottom die by a plurality of first connectors to form a signal path, the plurality of first dies are electrically connected to the interposer by a plurality of second connectors to form a power path, and the plurality of first connectors are closer to the at least one second die than the plurality of second connectors.Type: ApplicationFiled: December 13, 2024Publication date: April 3, 2025Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Po-Yao Lin, Shu-Shen Yeh, Chin-Hua Wang, Yu-Sheng Lin, Shin-Puu Jeng
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Publication number: 20250109139Abstract: Disclosed are a tricyclic compound, and a preparation method therefor and the use thereof. The tricyclic compound has a structure as shown in formula I, and can be used for treating various mental diseases and neurodegenerative diseases such as schizophrenia, depression and Parkinson's disease.Type: ApplicationFiled: January 19, 2023Publication date: April 3, 2025Inventors: Jianjun CHENG, Sheng WANG, Ruiquan LIU, Jianzhong QI, Luyu FAN, Jing YU
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Patent number: 12265067Abstract: The disclosure describes embodiments of an apparatus including a first gas chromatograph including a fluid inlet, a fluid outlet, and a first temperature control. A controller is coupled to the first temperature control and includes logic to apply a first temperature profile to the first temperature control to heat, cool, or both heat and cool the first gas chromatograph. Other embodiments are disclosed and claimed.Type: GrantFiled: October 16, 2023Date of Patent: April 1, 2025Assignee: Tricorntech CorporationInventors: Tsung-Kuan A. Chou, Shih-Chi Chu, Chia-Sheng Cheng, Li-Peng Wang, Chien-Lin Huang
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Patent number: 12264582Abstract: An in-situ stress measurement device for ultra-deep non-vertical drilling adopts a technical route of single channel and bidirectional rolling of in-hole equipment, and its related functions are mainly realized by a bidirectional rolling device and a split-type axial-force-free circuit switching valve. The bidirectional rolling device can drive the in-hole equipment to move freely in a circumferential direction and back and forth, which changes sliding friction between the in-hole equipment and a hole wall into rolling friction during an in-situ stress measurement of non-vertical drilling. The split-type axial-force-free circuit switching valve provides a technical solution for a single-pipe test in the non-vertical drilling.Type: GrantFiled: June 5, 2024Date of Patent: April 1, 2025Assignee: Changjing River Scientific Research InstituteInventors: Xiaoyu Han, Zhihong Dong, Xiuli Ding, Ping Fu, Liming Zhou, Xinhui Zhang, Bin Wang, Yuankun Liu, Sheng Luo, Chunhua Zhou, Kai Ai, Heng Zhang
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Patent number: 12265759Abstract: An image construction method and system for a heating area is provided. The method includes: obtaining an initial image according to a heating structure diagram and a building structure diagram of the heating area; segmenting the initial image according to heating attribute of the heating area to obtain a plurality of segmentation sub-graphs; performing first collection on a surface temperature of a heating pipeline according to pre-deployed surface devices corresponding to the segmentation sub-graphs, and setting first heating labels corresponding to the segmentation sub-graphs, and meanwhile, performing second collection on a regional temperature of a sub-area of the heating pipeline being located according to a pre-deployed monitoring device corresponding to the segmentation sub-graphs, and setting second heating labels; performing position and temperature analysis on a label setting result of each of the segmentation sub-graphs to obtain a heating image of the heating area.Type: GrantFiled: June 27, 2024Date of Patent: April 1, 2025Assignee: HUANENG (TIANJIN) ENERGY SALES CO., LTD.Inventors: Xuliang Li, Zexuan Yu, Xueqiang Han, Guojun Wang, Di Wu, Shunyong Shi, Zhenxing Yuan, Hongjian Zuo, Liangge Yu, Sheng Ding, Yi Zheng, Ziyu Gong, Rui Wang, Weizheng Yang
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Publication number: 20250100228Abstract: Methods and systems for processing a graphic for light-cured printing, an electronic apparatus, and/or a storage medium are disclosed. In some embodiments, the method includes following steps: obtaining 3D model data of an object to be printed; slicing the 3D model data to obtain sliced data; converting the sliced data to a projected picture; and chunking the projected picture to obtain a plurality of exposed pictures. The plurality of exposed pictures are superimposed and intersected to have an exposed result of the projected picture. In other embodiments, the method includes following steps: placing a photosensitive resin in a material tray, placing a molding platform in the material tray, and placing a molding end surface of the molding platform in contact with the photosensitive resin; sending the plurality of exposed pictures to a bottom surface of the material tray; and curing a corresponding layer of photosensitive resin.Type: ApplicationFiled: September 11, 2024Publication date: March 27, 2025Applicant: Shanghai Fusion Tech Co., Ltd.Inventors: Wei Mai, Sheng Zhu, Chong Wang, Jingjing Qian, Hua Feng, Jianzhe Li, Jinjing Zhang
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Publication number: 20250105401Abstract: A method for manufacturing an enclosure includes designing a two dimensional (2D) blank corresponding to a three dimensional (3D) enclosure body; laying out N of the 2D blanks on a metal sheet, where N is an integer greater than one; separating the N 2D blanks from the metal sheet; at least one of bending, folding and/or flanging the N 2D blanks into the 3D enclosure body; and joining a plurality of sides of the 3D enclosure body.Type: ApplicationFiled: September 22, 2023Publication date: March 27, 2025Inventors: Lu HUANG, Ziqiang Sheng, Wei Wu, Hui-ping Wang, Liang Xi, Wai Ping Gloria Tam
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Publication number: 20250102894Abstract: An illumination system includes a first light source, a second light source, a light combining module, and a wavelength conversion element. The first light source is configured to provide a first beam. The second light source is configured to provide a second beam. The light combining module is disposed on a transmission path of the first beam from the first light source and the second beam from the second light source. The wavelength conversion element includes a rotary disk, a wavelength conversion material layer, and a light splitting layer. The light splitting layer is disposed on the rotary disk. The wavelength conversion material layer is disposed between the rotary disk and the light splitting layer, and is configured to convert the first beam into an excited beam. The light splitting layer is configured to reflect the second beam and allow the first beam and the excited beam to pass through.Type: ApplicationFiled: September 25, 2024Publication date: March 27, 2025Applicant: Coretronic CorporationInventors: Chang-Hsuan Chen, Hou-Sheng Wang, Shao-Hui Liu
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Publication number: 20250106743Abstract: An out-of-service recovery search method includes establishing a frequency list including at least one searchable frequency, searching a suitable cell of a network according to the frequency list when the user terminal is in an out-of-service state, determining at least one first skip condition of the user terminal, performing a full-band power scan mechanism for scanning received signal strength indication (RSSIs) of user terminal supported frequency bands when the at least one first skip condition of the user terminal is absent and no suitable cell of the network is searched within the searchable frequency of the frequency list, skipping the full-band power scan mechanism when the at least one first skip condition of the user terminal is present and no suitable cell of the network is searched within the searchable frequency, and performing an RSSI sniffer for scanning a signal power of each frequency of the searchable frequency.Type: ApplicationFiled: September 24, 2024Publication date: March 27, 2025Applicant: MEDIATEK INC.Inventors: Jia-Hao Wu, Tzyuan Shiu, Da-Wei Wang, Lu-Chi Lin, Mu-Chi Fang, Wen-Yang Chou, Tsung-Sheng Tang, Chung-Pi Lee
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Patent number: 12261196Abstract: In some embodiments, the present application provides an integrated chip (IC). The IC includes a metal-insulator-metal (MIM) device disposed over a substrate. The MIM device includes a plurality of conductive plates that are spaced from one another. The MIM device further includes a first conductive plug structure that is electrically coupled to a first conductive plate and to a third conductive plate of the plurality of conductive plates. A first plurality of insulative segments electrically isolate a second conductive plate and a fourth conductive plate from the first conductive plug structure. The MIM device further includes a second conductive plug structure that is electrically coupled to the second conductive plate and to the fourth conductive plate of the plurality of conductive plates. A second plurality of insulative segments electrically isolate the first conductive plate and the third conductive plate from the second conductive plug structure.Type: GrantFiled: March 24, 2022Date of Patent: March 25, 2025Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Lu-Sheng Chou, Hsuan-Han Tseng, Chun-Yuan Chen, Hsiao-Hui Tseng, Ching-Chun Wang
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Patent number: 12261012Abstract: Disclosed is a plasma treatment apparatus, a lower electrode assembly and a forming method thereof, wherein the lower electrode assembly includes: a base for carrying a substrate to be treated; a focus ring encircling a periphery of the base; a coupling loop disposed below the focus ring; a conductive layer disposed in the coupling loop; and a wire for electrically connecting the conductive layer and the base so that the base and the conducting layer are equipotential. The lower electrode assembly is less prone to cause arc discharge.Type: GrantFiled: February 24, 2022Date of Patent: March 25, 2025Assignee: ADVANCED MICRO-FABRICATION EQUIPMENT INC.Inventors: Tuqiang Ni, Sheng Guo, Xiang Sun, Guangwei Fan, Kuan Yang, Hongqing Wang, Xingjian Chen, Ruoxin Du
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Publication number: 20250094887Abstract: The present disclosure provides a method for optimizing parameters of a ladder-type carbon trading mechanism based on an improved particle swarm optimization (IPSO) algorithm. The method first obtains information and operating data of a park-level integrated energy system, establishes equipment models and constraints of the park-level integrated energy system, and establishes a ladder-type carbon trading model; then encapsulates a process of optimized low-carbon dispatching of the park-level integrated energy system as a fitness function whose input is parameters of a carbon trading mechanism and output is a carbon emission of the system; and finally, introduces an IPSO algorithm to optimize the fitness function, and outputs optimization result information of the algorithm. The present disclosure verifies effectiveness and rationality of the model and the method that give full play to a role of the ladder-type carbon trading mechanism in the park-level integrated energy system through example analysis.Type: ApplicationFiled: October 20, 2022Publication date: March 20, 2025Inventors: Quan Chen, Xuanjun Zong, Sheng Zou, Hongwei Zhou, Tao Peng, Weiliang Wang, Wenjia Zhang, Chen Wu, Qun Zhang, Yuan Shen, Wei Feng, Gaofeng Shen, Min Zhang, Kai Yang, Xinyue Kong
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Publication number: 20250098270Abstract: A method includes forming a semiconductor fin over a substrate; forming a gate structure over the semiconductor fin, the gate structure comprising: a first metallic layer; a second metallic layer over the first metallic layer, wherein the first metallic layer is a metal compound of a first element and a second element and the second metallic layer is a single-element metal of the second element; and an oxide layer between the first metallic layer and the second metallic layer.Type: ApplicationFiled: December 4, 2024Publication date: March 20, 2025Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Hsin-Che CHIANG, Ju-Yuan TZENG, Chun-Sheng LIANG, Chih-Yang YEH, Shu-Hui WANG, Jeng-Ya David YEH
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Publication number: 20250096145Abstract: An electronic packaging structure including a first circuit structure and a second circuit structure is provided. An electronic component is disposed between the first circuit structure and the second circuit structure. At least one of the first circuit structure and the second circuit structure (for example, the second circuit structure) has a cavity. The electronic component is embedded in the cavity, and may be encapsulated between the first circuit structure and the second circuit structure.Type: ApplicationFiled: December 2, 2024Publication date: March 20, 2025Applicant: Unimicron Technology Corp.Inventors: Chin-Sheng Wang, Ra-Min Tain, Chih-Kai Chan, Chun-Hsien Chien
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Publication number: 20250093515Abstract: A three-dimensional point cloud generation method for generating a three-dimensional point cloud including one or more three-dimensional points includes: obtaining (i) a two-dimensional image obtained by imaging a three-dimensional object using a camera and (ii) a first three-dimensional point cloud obtained by sensing the three-dimensional object using a distance sensor; detecting, from the two-dimensional image, one or more attribute values of the two-dimensional image that are associated with a position in the two-dimensional image; and generating a second three-dimensional point cloud including one or more second three-dimensional points each having an attribute value, by performing, for each of the one or more attribute values detected, (i) identifying, from a plurality of three-dimensional points forming the first three-dimensional point cloud, one or more first three-dimensional points to which the position of the attribute value corresponds, and (ii) appending the attribute value to the one or more fiType: ApplicationFiled: December 5, 2024Publication date: March 20, 2025Inventors: Pongsak LASANG, Chi WANG, Zheng WU, Sheng Mei SHEN, Toshiyasu SUGIO, Tatsuya KOYAMA