Patents by Inventor Sherif A. Goma
Sherif A. Goma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7880305Abstract: The invention is the technology of providing a packaging intermediate product that can serve as an interface substrate that is to be positioned between different circuitry types where the dimensions are approaching the sub 100 micrometer range. The invention involves a dielectric wafer structure where the first and second area surfaces of the wafer are separated by a distance that is of the order of the electrical via design length, and an array of spaced vias through the wafer arranged with each via filled with metal surrounded by a chemical metal deposition promoting layer with each via terminating flush with a wafer surface.Type: GrantFiled: November 7, 2002Date of Patent: February 1, 2011Assignee: International Business Machines CorporationInventors: Yu-Ting Cheng, Sherif A. Goma, John Harold Magerlein, Sampath Purushothaman, Carlos Juan Sambucetti, George Frederick Walker
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Patent number: 7823278Abstract: An interposer having one or more hollow electrical contact buttons disposed in a carrier. The interposer is formed by disposing sacrificial posts in vias of the carrier. The electrical contact buttons are formed on the sacrificial posts by a metallizing process in desired pattern using a mask. The sacrificial posts are made of a material that thermally decomposes upon application of heat without altering the carrier or the electrical contact buttons.Type: GrantFiled: September 6, 2005Date of Patent: November 2, 2010Assignee: International Business Machines CorporationInventors: Gareth G Hougham, Keith E Fogel, Joanna Rosner, Paul A Lauro, Sherif Goma, Joseph Zinter, Jr.
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Patent number: 7771208Abstract: Techniques for forming enhanced electrical connections are provided. In one aspect, an electrical connecting device comprises an electrically insulating carrier having one or more contact structures traversing a plane thereof. Each contact structure comprises an elastomeric material having an electrically conductive layer running along at least one surface thereof continuously through the plane of the carrier.Type: GrantFiled: May 27, 2008Date of Patent: August 10, 2010Assignee: International Business Machines CorporationInventors: Gareth Geoffrey Hougham, Ali Afzali, Steven Allen Cordes, Paul W. Coteus, Matthew J. Farinelli, Sherif A. Goma, Alphonso P. Lanzetta, Daniel Peter Morris, Joanna Rosner, Nisha Yohannan
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Patent number: 7688095Abstract: Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described. Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 ?m.Type: GrantFiled: April 27, 2007Date of Patent: March 30, 2010Assignee: International Business Machines CorporationInventors: Steven A. Cordes, Matthew J. Farinelli, Sherif A. Goma
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Publication number: 20100038126Abstract: Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described. Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 ?m.Type: ApplicationFiled: August 18, 2009Publication date: February 18, 2010Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Steven A. Cordes, Matthew J. Farinelli, Sherif A. Goma
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Patent number: 7648369Abstract: An interposer having one or more hollow electrical contact buttons disposed in a carrier. The interposer is formed by disposing sacrificial posts in vias of the carrier. The electrical contact buttons are formed on the sacrificial posts by a metallizing process in desired pattern using a mask. The sacrificial posts are made of a material that thermally decomposes upon application of heat without altering the carrier or the electrical contact buttons.Type: GrantFiled: November 17, 2006Date of Patent: January 19, 2010Assignee: International Business Machines CorporationInventors: Gareth G. Hougham, Keith E. Fogel, Joanna Rosner, Paul A. Lauro, Sherif Goma, Joseph Zinter, Jr.
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Publication number: 20090302454Abstract: The invention is the technology of providing a packaging intermediate product that can serve as an interface substrate that is to be positioned between different circuitry types where the dimensions are approaching the sub 100 micrometer range. The invention involves a dielectric wafer structure where the first and second area surfaces of the wafer are separated by a distance that is of the order of the electrical via design length, and an array of spaced vias through the wafer arranged with each via filled with metal surrounded by a chemical metal deposition promoting layer with each via terminating flush with a wafer surface.Type: ApplicationFiled: August 11, 2009Publication date: December 10, 2009Inventors: Yu- Ting Cheng, Sherif A. Goma, John Harold Magerlein, Sampath Purushothaman, Carlos Juan Sambucetti, George Frederick Walker
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Publication number: 20090300914Abstract: Techniques for forming enhanced electrical connections are provided. In one aspect, a method of forming an electrical connecting device includes the steps of: depositing an elastomeric material on an electrically insulating carrier; and metallizing the elastomeric material so as to form an electrically conductive layer running continuously through a plane of the carrier and along a surface of the elastomeric material.Type: ApplicationFiled: July 31, 2009Publication date: December 10, 2009Applicant: International Business Machines CorporationInventors: Gareth Geoffrey Hougham, Ali Afzali, Steven Allen Cordes, Paul W. Coteus, Matthew J. Farinelli, Sherif A. Goma, Alphonso P. Lanzetta, Daniel Peter Morris, Joanna Rosner, Nisha Yohannan
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Publication number: 20090298292Abstract: A process for overcoming extreme topographies by first planarizing a cavity in a semiconductor substrate in order to create a planar surface for subsequent lithography processing. As a result of the planarizing process for extreme topographies, subsequent lithography processing is enabled including the deposition of features in close proximity to extreme topographic surfaces (e.g., deep cavities or channels) and, including the deposition of features within a cavity. In a first embodiment, the process for planarizing a cavity in a semiconductor substrate includes the application of dry film resists having high chemical resistance. In a second embodiment, the process for planarizing a cavity includes the filling of cavity using materials such as polymers, spin on glasses, and metallurgy.Type: ApplicationFiled: August 10, 2009Publication date: December 3, 2009Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Guy A. Cohen, Steven A. Cordes, Sherif A. Goma, Joanna Rosner, Jeannine M. Trewhella
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Publication number: 20090053908Abstract: Techniques for forming enhanced electrical connections are provided. In one aspect, an electrical connecting device comprises an electrically insulating carrier having one or more contact structures traversing a plane thereof. Each contact structure comprises an elastomeric material having an electrically conductive layer running along at least one surface thereof continuously through the plane of the carrier.Type: ApplicationFiled: May 27, 2008Publication date: February 26, 2009Applicant: International Business Machines CorporationInventors: Gareth Geoffrey Hougham, Ali Afzali, Steven Allen Cordes, Paul W. Coteus, Matthew J. Farinelli, Sherif A. Goma, Alphonso P. Lanzetta, Daniel Peter Morris, Joanna Rosner, Nisha Yohannan
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Publication number: 20090044405Abstract: An interposer having one or more hollow electrical contact buttons disposed in a carrier. The interposer is formed by disposing sacrificial posts in vias of the carrier. The electrical contact buttons are formed on the sacrificial posts by a metallizing process in desired pattern using a mask. The sacrificial posts are made of a material that thermally decomposes upon application of heat without altering the carrier or the electrical contact buttons.Type: ApplicationFiled: February 15, 2008Publication date: February 19, 2009Inventors: Gareth G. Hougham, Keith E. Fogel, Joanna Rosner, Paul A. Lauro, Sherif Goma, Joseph Zinter, JR.
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Publication number: 20090032920Abstract: A laser release and glass chip removal process for a integrated circuit module avoiding carrier edge cracking is provided.Type: ApplicationFiled: July 3, 2008Publication date: February 5, 2009Applicant: International Business Machines CorporationInventors: Leena P. Buchwalter, Paul S. Andry, Matthew J. Farinelli, Sherif A. Goma, Raymond R. Horton, Edmund J. Sprogis
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Publication number: 20080315409Abstract: The present invention allows for direct chip-to-chip connections using the shortest possible signal path.Type: ApplicationFiled: June 19, 2007Publication date: December 25, 2008Inventors: Steven A. Cordes, Matthew J. Farinelli, Sherif A. Goma, Peter A. Gruber, John U. Knickerbocker, James L. Speidell
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Patent number: 7452212Abstract: Techniques for forming enhanced electrical connections are provided. In one aspect, an electrical connecting device comprises an electrically insulating carrier having one or more contact structures traversing a plane thereof. Each contact structure comprises an elastomeric material having an electrically conductive layer running along at least one surface thereof continuously through the plane of the carrier.Type: GrantFiled: September 30, 2005Date of Patent: November 18, 2008Assignee: International Business Machines CorporationInventors: Gareth Geoffrey Hougham, Ali Afzali, Steven Allen Cordes, Paul W. Coteus, Matthew J. Farinelli, Sherif A. Goma, Alphonso P. Lanzetta, Daniel Peter Morris, Joanna Rosner, Nisha Yohannan
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Publication number: 20080094085Abstract: A probe structure for an electronic device is provided. In one aspect, the probe structure includes an electrically insulating carrier having one or more contact structures traversing a plane thereof. Each contact structure includes an elastomeric material having an electrically conductive layer running along at least one surface thereof continuously through the plane of the carrier. The probe structure includes one or more other contact structures adapted for connection to a test apparatus.Type: ApplicationFiled: September 30, 2005Publication date: April 24, 2008Inventors: Gareth Hougham, Ali Afzali, Steven Cordes, Paul Coteus, Matthew Farinelli, Sherif Goma, Alphonso Lanzetta, Daniel Morris, Joanna Rosner, Nisha Yohannan
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Publication number: 20080036084Abstract: A laser release and glass chip removal process for a integrated circuit module avoiding carrier edge cracking is provided.Type: ApplicationFiled: January 30, 2006Publication date: February 14, 2008Applicant: International Business Machines CorporationInventors: Leena Buchwalter, Paul Andry, Matthew Farinelli, Sherif Goma, Raymond Horton, Edmund Sprogis
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Publication number: 20080030209Abstract: Flexible and rigid interposers for use in the semiconductor industry and methods for manufacturing the same are described, Auto-catalytic processes are used to minimize the costs associated with the production of flexible interposers, while increasing the yield and lifetime. Electrical contact regions are easily isolated and the risk of corrosion is reduced because all portions of the interposer are plated at once. Leads projecting from the flexible portion of the interposers accommodate a greater variety of components to be tested. Rigid interposers include a pin projecting from a probe pad affixed to a substrate. The rigidity of the pin penetrates oxides on a contact pad to be tested. Readily available semiconductor materials and processes are used to manufacture the flexible and rigid interposers according to the invention. The flexible and rigid interposers can accommodate pitches down to 25 ?m.Type: ApplicationFiled: April 27, 2007Publication date: February 7, 2008Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Steven Cordes, Matthew Farinelli, Sherif Goma
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Publication number: 20070298626Abstract: Techniques for forming enhanced electrical connections are provided. In one aspect, an electrical connecting device comprises an electrically insulating carrier having one or more contact structures traversing a plane thereof. Each contact structure comprises an elastomeric material having an electrically conductive layer running along at least one surface thereof continuously through the plane of the carrier.Type: ApplicationFiled: September 30, 2005Publication date: December 27, 2007Inventors: Gareth Hougham, Ali Afzali, Steven Cordes, Paul Coteus, Matthew Farinelli, Sherif Goma, Alphonso Lanzetta, Daniel Morris, Joanna Rosner, Nisha Yohannan
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Patent number: 7276787Abstract: A carrier structure and method for fabricating a carrier structure with through-vias each having a conductive structure with an effective coefficient of thermal expansion which is less than or closely matched to that of the substrate, and having an effective elastic modulus value which is less than or closely matches that of the substrate. The conductive structure may include concentric via fill areas having differing materials disposed concentrically therein, a core of the substrate material surrounded by an annular ring of conductive material, a core of CTE-matched non-conductive material surrounded by an annular ring of conductive material, a conductive via having an inner void with low CTE, or a full fill of a conductive composite material such as a metal-ceramic paste which has been sintered or fused.Type: GrantFiled: December 5, 2003Date of Patent: October 2, 2007Assignee: International Business Machines CorporationInventors: Daniel Charles Edelstein, Paul Stephen Andry, Leena Paivikki Buchwalter, Jon Alfred Casey, Sherif A. Goma, Raymond R. Horton, Gareth Geoffrey Hougham, Michael Wayne Lane, Xiao Hu Liu, Chirag Suryakant Patel, Edmund Juris Sprogis, Michelle Leigh Steen, Brian Richard Sundlof, Cornelia K. Tsang, George Frederick Walker
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Publication number: 20070200572Abstract: An apparatus for testing integrated circuit devices includes a probe device having a plurality of probes, a first substrate comprising a product substrate having a first surface and an array of electrical contacts disposed on the first surface thereof, and a second substrate disposed between the probes and the first substrate for electrically coupling the probes to corresponding electrical contacts disposed on the first surface of the product substrate.Type: ApplicationFiled: February 16, 2006Publication date: August 30, 2007Inventors: Ronald Breton, S. Chey, Steven Cordes, Matthew Farinelli, Michael Fregeau, Sherif Goma, Gene Patrick, Mohammed Shaikh