Patents by Inventor Shigeharu Asao

Shigeharu Asao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070290949
    Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.
    Type: Application
    Filed: August 21, 2007
    Publication date: December 20, 2007
    Applicant: HITACHI, LTD.
    Inventors: Noriaki SETOGUCHI, Shigeharu Asao, Yoshikazu Kanazawa
  • Publication number: 20070290951
    Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.
    Type: Application
    Filed: August 21, 2007
    Publication date: December 20, 2007
    Applicant: HITACHI, LTD.
    Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
  • Publication number: 20070290952
    Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.
    Type: Application
    Filed: August 21, 2007
    Publication date: December 20, 2007
    Applicant: HITACHI, LTD
    Inventors: Noriaki SETOGUCHI, Shigeharu Asao, Yoshikazu Kanazawa
  • Publication number: 20070290950
    Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.
    Type: Application
    Filed: August 21, 2007
    Publication date: December 20, 2007
    Applicant: HITACHI LTD.
    Inventors: Noriaki SETOGUCHI, Shigeharu Asao, Yoshikazu Kanazawa
  • Publication number: 20070152911
    Abstract: A method of driving a PDP apparatus to sufficiently suppress the background light emission and improve the dark room contrast, in which first electrodes and second electrodes are arranged adjacently by turns, a first display line is formed between one side of the second electrode and the first electrode adjacent thereto, a second display line is formed between the other side of the second electrode and the first electrode adjacent thereto, and the interlaced display that displays the first display line and the second display line alternately in different fields is performed, has been disclosed, wherein the reset voltage that directly relates to the intensity of the background light emission is varied according to the number of times of sustain discharges, the display conditions, and so on, in each subfield and the reset discharge is caused to occur with the minimum voltage in each subfield.
    Type: Application
    Filed: March 13, 2007
    Publication date: July 5, 2007
    Applicant: Fujitsu Hitachi Plasma Display Ltd.
    Inventors: Yoshikazu Kanazawa, Shigeharu Asao
  • Patent number: 7212177
    Abstract: A method of driving a PDP apparatus to sufficiently suppress the background light emission and improve the dark room contrast, in which first electrodes and second electrodes are arranged adjacently by turns, a first display line is formed between one side of the second electrode and the first electrode adjacent thereto, a second display line is formed between the other side of the second electrode and the first electrode adjacent thereto, and the interlaced display that displays the first display line and the second display line alternately in different fields is performed, has been disclosed, wherein the reset voltage that directly relates to the intensity of the background light emission is varied according to the number of times of sustain discharges, the display conditions, and so on, in each subfield and the reset discharge is caused to occur with the minimum voltage in each subfield.
    Type: Grant
    Filed: May 25, 2004
    Date of Patent: May 1, 2007
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Yoshikazu Kanazawa, Shigeharu Asao
  • Publication number: 20060214887
    Abstract: Conventionally, in an image display apparatus for gray-scale representation with two fields by a multiple gray-scaling scheme in which selective On-states in an odd field and an even field are made to differ, there has been a problem of deterioration in image quality due to occurrence of motion noise and flicker, for example. An image display method, in which a picture of one frame is configured by a plurality of sub-fields with different light-emitting display luminance levels, different selective On-states are capable of making to differ in accordance with display date inputted to an odd field and an even field, and a dither pattern for adding an arbitrary amount of data is capable of being inserted in accordance with the inputted display data, comprises the step of, for sorting the selective On-states in the odd and even fields and sorting the dither pattern, making at least one of a horizontal direction and a vertical direction to differ.
    Type: Application
    Filed: March 24, 2006
    Publication date: September 28, 2006
    Inventors: Katsuhiro Ishida, Takashi Shiizaki, Akira Yamamoto, Shigeharu Asao
  • Publication number: 20060113921
    Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.
    Type: Application
    Filed: January 19, 2006
    Publication date: June 1, 2006
    Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
  • Patent number: 7012370
    Abstract: A plurality of discharge electrodes having transparent electrodes connected to bus electrodes are arranged on the inner side of a front substrate. Alternatively, discharge electrodes having transparent electrodes and capable of discharging between their respective neighboring electrodes on both sides are arranged on the inner side of the front substrate. The front substrate is provided on the side of the display surface where discharge-generated light radiates out to the exterior. Shielding parts for shielding incident light from the exterior are formed on the transparent electrodes, or along the front substrate. Accordingly, the shielding parts reduce the surface reflection to improve the bright room contrast ratio. Forming the shielding parts with the same material as that of the bus electrodes prevents fabrication processes from becoming complicated. The areas of the shielding parts can be varied with the luminescent colors of cells, to change the luminescent brightness by the cell.
    Type: Grant
    Filed: June 18, 2001
    Date of Patent: March 14, 2006
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Yoshikazu Kanazawa, Shigeharu Asao
  • Patent number: 7009585
    Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.
    Type: Grant
    Filed: December 31, 2003
    Date of Patent: March 7, 2006
    Assignee: Fujitsu Limited
    Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
  • Patent number: 7006060
    Abstract: A display panel has a plurality of first electrodes, a plurality of second electrodes disposed adjacently and alternately with the first electrodes, a plurality of third electrodes formed to cross the first and second electrodes, and a control circuit for carrying out an address discharge during the second electrodes and the third electrodes. The control circuit carries out a sustain discharge to decrease the volume of wall charges, accumulated on a display cell in which a sustain discharge is not intended, to a level which cannot generate a sustain discharge.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: February 28, 2006
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Yoshikazu Kanazawa, Hitoshi Hirakawa, Shigeharu Asao, Shinsuke Tanaka
  • Publication number: 20060017661
    Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.
    Type: Application
    Filed: September 14, 2005
    Publication date: January 26, 2006
    Applicant: FUJITSU LIMITED
    Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
  • Publication number: 20040212567
    Abstract: A method of driving a PDP apparatus to sufficiently suppress the background light emission and improve the dark room contrast, in which first electrodes and second electrodes are arranged adjacently by turns, a first display line is formed between one side of the second electrode and the first electrode adjacent thereto, a second display line is formed between the other side of the second electrode and the first electrode adjacent thereto, and the interlaced display that displays the first display line and the second display line alternately in different fields is performed, has been disclosed, wherein the reset voltage that directly relates to the intensity of the background light emission is varied according to the number of times of sustain discharges, the display conditions, and so on, in each subfield and the reset discharge is caused to occur with the minimum voltage in each subfield.
    Type: Application
    Filed: May 25, 2004
    Publication date: October 28, 2004
    Applicant: Fujitsu Hitachi Plasma Display Limited
    Inventors: Yoshikazu Kanazawa, Shigeharu Asao
  • Patent number: 6809708
    Abstract: A method of driving a PDP apparatus to sufficiently suppress the background light emission and improve the dark room contrast, in which first electrodes and second electrodes are arranged adjacently by turns, a first display line is formed between one side of the second electrode and the first electrode adjacent thereto, a second display line is formed between the other side of the second electrode and the first electrode adjacent thereto, and the interlaced display that displays the first display line and the second display line alternately in different fields is performed, has been disclosed, wherein the reset voltage that directly relates to the intensity of the background light emission is varied according to the number of times of sustain discharges, the display conditions, and so on, in each subfield and the reset discharge is caused to occur with the minimum voltage in each subfield.
    Type: Grant
    Filed: February 25, 2002
    Date of Patent: October 26, 2004
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Yoshikazu Kanazawa, Shigeharu Asao
  • Publication number: 20040150354
    Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.
    Type: Application
    Filed: December 31, 2003
    Publication date: August 5, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
  • Patent number: 6707436
    Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.
    Type: Grant
    Filed: June 17, 1999
    Date of Patent: March 16, 2004
    Assignee: Fujitsu Limited
    Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
  • Patent number: 6686698
    Abstract: A PDP apparatus in which degradation in image quality such as display missing points does not occur, even if the peak luminance is increased, has been disclosed. In the PDP apparatus, the display load ratio of each subfield is detected and a sustain pulse cycle is changed according to the display load ratio of each subfield. Moreover, an adaptive sustain pulse number change means is provided, which calculates the total amount of variations in time by summing the variations in time in a display field caused by the changes in the sustain pulse cycles and increases/decreases the number of sustain pulses of each subfield according to the total amount of variations in time.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: February 3, 2004
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Masanori Takeuchi, Toshio Ueda, Shigeharu Asao
  • Patent number: 6667728
    Abstract: A plasma display panel has a plurality of first electrodes, a plurality of second electrodes adjacently disposed alternately with the first electrodes, first display lines formed between the first electrodes and the second electrodes adjacent to one side of the first electrodes, second display lines formed between the first electrodes and the second electrodes adjacent to the other side of the first electrodes, and a control circuit for alternately lighting the first and second display lines or lighting only one of the first and second display lines, and for displaying an image on the plasma display panel by dividing a frame or a field into a plurality of sub-fields for a gradation display.
    Type: Grant
    Filed: February 16, 2001
    Date of Patent: December 23, 2003
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Yoshikazu Kanazawa, Kosaku Toda, Shigeharu Asao
  • Patent number: 6636188
    Abstract: A method of driving a plasma display panel in which a normal operation is not impeded and an erroneous discharge, that may damage the panel, will never occur even when flicker is suppressed in a PDP employing an ALIS system. Some subfields that make up a display field of a frame, that is, a subfield of a first group, are represented by first display lines and the rest, that is, a subfield of a second group, are represented by second display lines; thus, a total display field is obtained and a gray scale is represented.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: October 21, 2003
    Assignee: Fujitsu Hitachi Plasma Display Limited
    Inventors: Yoshikazu Kanazawa, Tomokatsu Kishi, Shigeharu Asao
  • Publication number: 20030173903
    Abstract: A PDP apparatus in which degradation in image quality such as display missing points does not occur, even if the peak luminance is increased, has been disclosed. In the PDP apparatus, the display load ratio of each subfield is detected and a sustain pulse cycle is changed according to the display load ratio of each subfield. Moreover, an adaptive sustain pulse number change means is provided, which calculates the total amount of variations in time by summing the variations in time in a display field caused by the changes in the sustain pulse cycles and increases/decreases the number of sustain pulses of each subfield according to the total amount of variations in time.
    Type: Application
    Filed: November 12, 2002
    Publication date: September 18, 2003
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Masanori Takeuchi, Toshio Ueda, Shigeharu Asao