Patents by Inventor Shigeharu Asao

Shigeharu Asao has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6608609
    Abstract: A method for driving a plasma display panel constituted by a group of cells each having a memory function, comprising arranging first and second electrodes in parallel with one another for each display line on a first substrate, arranging third electrodes on a second substrate opposing the first substrate in such a manner as to cross the first and second electrodes, and repeating light emission display by utilizing a selective address discharge for generating wall charges in cells selected by either one of the first and second electrodes and by the third electrodes and a sustain discharge executed repeatedly for the cells in which the wall charges are generated, is disclosed in which a pulse having a higher voltage than a priming pulse for executing a priming discharge after the activation of the cells is applied between the first and second electrodes only at the time of activation of the cells.
    Type: Grant
    Filed: May 12, 1999
    Date of Patent: August 19, 2003
    Assignee: Fujitsu Limited
    Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa
  • Publication number: 20030030598
    Abstract: A method of driving a PDP apparatus to sufficiently suppress the background light emission and improve the dark room contrast, in which first electrodes and second electrodes are arranged adjacently by turns, a first display line is formed between one side of the second electrode and the first electrode adjacent thereto, a second display line is formed between the other side of the second electrode and the first electrode adjacent thereto, and the interlaced display that displays the first display line and the second display line alternately in different fields is performed, has been disclosed, wherein the reset voltage that directly relates to the intensity of the background light emission is varied according to the number of times of sustain discharges, the display conditions, and so on, in each subfield and the reset discharge is caused to occur with the minimum voltage in each subfield.
    Type: Application
    Filed: February 25, 2002
    Publication date: February 13, 2003
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Yoshikazu Kanazawa, Shigeharu Asao
  • Patent number: 6489939
    Abstract: A method for driving an interlace system plasma display panel comprising applying a pulse higher than a discharge start voltage at the end of a sustain discharge period for a period in which only a cell that has executed a sustain discharge and cells adjacent to the former cell start discharge, executing an erase discharge of the cell that has executed the sustain discharge, and at times, the cells adjacent to the former cell, and when a given field is switched over to another field, executing a similar discharge, i.e., the whole surface write operation and a self-erase discharge, of the cell that has executed display before the switch-over of the given field before the whole surface write operation and the self-erase discharge are effected in the cell that is to execute display after the switch-over of the given field. This driving method applies a pulse having an opposite polarity of the polarity of the whole surface write pulse for a period longer than the pulse width of the sustain discharge pulse.
    Type: Grant
    Filed: March 3, 1999
    Date of Patent: December 3, 2002
    Assignee: Fujitsu Limited
    Inventors: Shigeharu Asao, Noriaki Setoguchi, Yoshikazu Kanazawa
  • Publication number: 20020167466
    Abstract: Disclosed is a method for driving a plasma display panel in which a plurality of first electrodes and second electrodes are arranged parallel to each other, a plurality of third electrodes are arranged to cross the first and second electrodes, and discharge cells defined with areas in which the electrodes cross mutually are arranged in the form of a matrix. According to the driving method, a reset period is a period during which the distribution of wall charges in the plurality of discharge cells is uniformed. An addressing period is a period during which wall charges are produced in the discharge cells according to display data. A sustain discharge period is a period during which sustain discharge is induced in the discharge cells in which wall charges are produced during the addressing period.
    Type: Application
    Filed: June 17, 1999
    Publication date: November 14, 2002
    Inventors: NORIAKI SETOGUCHI, SHIGEHARU ASAO
  • Patent number: 6429834
    Abstract: A plasma display panel device according to the present invention is provided for preventing a generation of unevenness of luminance caused by lowering a discharge voltage applied to cells according to a difference between display load rates. To achieve the above-described objects, the plasma display device according to the present invention employs a phenomenon where voltage drops applied to cells become larger according to a display load rate at a sustain discharge period, as the luminance becomes lower and wall charges accumulated on the cells after the sustain discharge becomes lower as well. In other words, the present invention is characterized in that a prescribed erase pulse and sustain discharge pulse are applied to X and Y electrodes in the sustain discharge period. When the display load rate is lower, a scale of the sustain discharge at each cell is larger and the amount of wall charges at each cell is not lower.
    Type: Grant
    Filed: October 21, 1999
    Date of Patent: August 6, 2002
    Assignee: Fujitsu Limited
    Inventors: Yoshikazu Kanazawa, Shigeharu Asao
  • Publication number: 20020067321
    Abstract: A display panel has a plurality of first electrodes, a plurality of second electrodes disposed adjacently and alternately with the first electrodes, a plurality of third electrodes formed to cross the first and second electrodes, and a control circuit for carrying out an address discharge during the second electrodes and the third electrodes. The control circuit carries out a sustain discharge to decrease the volume of wall charges, accumulated on a display cell in which a sustain discharge is not intended, to a level which cannot generate a sustain discharge.
    Type: Application
    Filed: December 3, 2001
    Publication date: June 6, 2002
    Inventors: Yoshikazu Kanazawa, Hitoshi Hirakawa, Shigeharu Asao, Shinsuke Tanaka
  • Publication number: 20020008473
    Abstract: A plurality of discharge electrodes having transparent electrodes connected to bus electrodes are arranged on the inner side of a front substrate. Alternatively, discharge electrodes having transparent electrodes and capable of discharging between their respective neighboring electrodes on both sides are arranged on the inner side of the front substrate. The front substrate is provided on the side of the display surface where discharge-generated light radiates out to the exterior. Shielding parts for shielding incident light from the exterior are formed on the transparent electrodes, or along the front substrate. Accordingly, the shielding parts reduce the surface reflection to improve the bright room contrast ratio. Forming the shielding parts with the same material as that of the bus electrodes prevents fabrication processes from becoming complicated. The areas of the shielding parts can be varied with the luminescent colors of cells, to change the luminescent brightness by the cell.
    Type: Application
    Filed: June 18, 2001
    Publication date: January 24, 2002
    Applicant: FUJITSU HITACHI PLASMA DISPLAY LIMITED
    Inventors: Yoshikazu Kanazawa, Shigeharu Asao
  • Publication number: 20010054992
    Abstract: A plasma display panel has a plurality of first electrodes, a plurality of second electrodes adjacently disposed alternately with the first electrodes, first display lines formed between the first electrodes and the second electrodes adjacent to one side of the first electrodes, second display lines formed between the first electrodes and the second electrodes adjacent to the other side of the first electrodes, and a control circuit for alternately lighting the first and second display lines or lighting only one of the first and second display lines, and for displaying an image on the plasma display panel by dividing a frame or a field into a plurality of sub-fields for a gradation display.
    Type: Application
    Filed: February 16, 2001
    Publication date: December 27, 2001
    Inventors: Yoshikazu Kanazawa, Kosaku Toda, Shigeharu Asao
  • Publication number: 20010054993
    Abstract: A display panel has a plurality of first electrodes, a plurality of second electrodes adjacently disposed alternately with the first electrodes, a plurality of third electrodes formed to cross the first and second electrodes, and a control circuit for having an address discharge carried out during the second electrodes and the third electrodes. The control circuit has a sustain discharge carried out to decrease the volume of wall charges, accumulated on a display cell in which a sustain discharge is not intended, to a level which cannot generate a sustain discharge.
    Type: Application
    Filed: February 20, 2001
    Publication date: December 27, 2001
    Inventors: Yoshikazu Kanazawa, Shigeharu Asao
  • Patent number: 6288692
    Abstract: Disclosed are a plasma display capable of preventing deterioration of display contrast deriving from priming discharge, and of minimizing a power consumption, and a driving method therefor. The plasma display comprises: a plasma display panel in which first, second, and third electrodes are arranged alternately parallel to one another on a first substrate, and fourth electrodes are arranged orthogonally to the first electrodes on the first substrate or a second substrate; a first electrode selection driver for selectively driving the first electrodes; a second electrode driver for driving the second electrodes, and a third electrode driver for driving the third electrodes. First display cells are formed at intersections between the first electrodes and second electrodes and the fourth electrodes, and second display cells are formed at intersections between the first electrodes and third electrodes and the fourth electrodes.
    Type: Grant
    Filed: July 2, 1997
    Date of Patent: September 11, 2001
    Assignee: Fujitsu Limited
    Inventors: Yoshikazu Kanazawa, Haruo Koizumi, Shigeharu Asao
  • Patent number: 6160529
    Abstract: A method of driving a plasma display panel having plural, parallel sustain and scan electrodes, corresponding to respective display lines, and plural address electrodes in opposed relationship and electrically isolated with respect to the sustain and scan electrodes and intersecting same so as to form respective discharge cells at the intersections. The method produces an interlaced display by generating discharges in selected discharge cells, in odd and even fields, between respective, different sets of the sustain and scan electrodes. Each of the odd and even fields includes a reset period in which a reset discharges are produced in the discharge cells to establish a uniform charge distribution therein, an address period in which write discharges are produced in selected discharge cells in accordance with display data and a sustain discharge period in which sustain discharge pulses are produced in the written discharge cells to establish a glow discharge, for display during the respective periods.
    Type: Grant
    Filed: August 25, 1997
    Date of Patent: December 12, 2000
    Assignee: Fujitsu Limited
    Inventors: Shigeharu Asao, Haruo Koizumi, Yoshikazu Kanazawa
  • Patent number: 6084558
    Abstract: Disclosed is a drive method that ensures normal display on a stable basis for a plasma display panel in which sustaining discharge pulses that are mutually out of phase are applied to adjoining slits in order to initiate sustaining discharge, and to thus specify display slits between an Y electrode and X electrodes across the Y electrode. A plasma display device has a display panel including first and second electrodes arranged in parallel with one another and third electrodes arranged to be orthogonal to the first and second electrodes. A slit coincident with a line formed by discharge cells is selected by applying a scanning pulse and addressing signal at an addressing step, and sustaining discharge is initiated in the selected slit at a sustaining discharge step. According to the drive method for the plasma display device, first and second slits are defined between a second electrode and first electrodes on one side and the other side of the second electrode.
    Type: Grant
    Filed: September 21, 1998
    Date of Patent: July 4, 2000
    Assignee: Fujitsu Limited
    Inventors: Noriaki Setoguchi, Shigeharu Asao, Yoshikazu Kanazawa