Abstract: The present disclosure includes by controlling at least either one of a switching frequency of a switching element (S) or a duty ratio indicating an ON period of the switching element, securing delay time from voltage at both ends of the switching element reaches zero voltage by resonance of the resonant circuit (L0, C0) in an OFF state of the switching element until the switching element is turned on, and turning on the switching element within the delay time.

Abstract: A control method of controlling a resonance type power conversion device including a voltage resonance circuit is provided. The voltage resonance circuit comprising, a choke coil connected to input power supply, a first switching element connected to the choke coil, a capacitor connected in parallel to the first switching element, and a resonance circuit connected between a connection point and an output terminal, the connection point being a point at which the choke coil and the first switching element are connected. The control method comprising, detecting a polarity of current flowing through parallel circuit connected in parallel to the first switching element by using a sensor included in the voltage resonance circuit; and controlling an operating condition of the first switching element depending on a polarity of the current detected by the sensor.

Abstract: A semiconductor device includes a main groove formed in a main surface of a substrate, a semiconductor region formed in contact with a surface of the main groove, an electron supply region formed in contact with a surface of the semiconductor region on opposite sides of at least side surfaces of the main groove to generate a two-dimensional electron gas layer in the semiconductor region, and a first electrode and a second electrode formed in contact with the two-dimensional electron gas layer and apart from each other.

Abstract: A power conversion device that converts power supplied via a first power feed bus and a second power feed bus, and includes: an inductance element connected to the first power feed bus; and a power module that converts power supplied between the first power feed bus and the second power feed bus by switching. The power conversion device further includes: a housing that houses the inductance element and the power module therein; and a first impedance element provided between the inductance element and the housing.

Abstract: A power converter is basically provided with at least three switching circuits, at least one power source, at least one load, and a resonant circuit. Input terminals of the switching circuits are connected to either the at least one power source or the at least one load, and output terminals of the switching circuits are electrically serially connected to the resonant circuit to form a closed circuit.

Abstract: Provided is a power conversion device including: a power module provided between a first power-supply busbar that supplies a positive power source and a second power-supply busbar that supplies a negative power source; a first capacitor with one end thereof connected to the first power-supply busbar; a second capacitor with one end thereof connected to the second power-supply busbar; a grounding member connected between the opposite end of the first capacitor and the opposite end of the second capacitor; and a conductive member routed along at least one of the first power-supply busbar and the second power-supply busbar and connecting the grounding member and a ground potential.

Abstract: A power conversion device that converts power supplied by a first power feed bus (93) and a second power feed bus (94), includes: a reactor (L1) connected to the first power feed bus (93); and a power module (4) that converts power supplied between the first power feed bus (93) and the second power feed bus (94) by switching. The power module (4) includes a switching element (Q1). Further, the power conversion device includes an impedance circuit (2) arranged in parallel with respect to the reactor (L1) of the first power feed bus (93).

Abstract: A power conversion device that converts power supplied via a first power feed bus and a second power feed bus, and includes: an inductance element connected to the first power feed bus; and a power module that converts power supplied between the first power feed bus and the second power feed bus by switching. The power conversion device further includes: a housing that houses the inductance element and the power module therein; and a first impedance element provided between the inductance element and the housing.

Abstract: An inverter includes an arm circuit, a first capacitor, a second capacitor, a first diode, and a second diode. In the arm circuit, upper arm switching elements to which a positive electrode of a battery is connected and lower arm switching elements to which a negative electrode of the battery is connected are connected. The first capacitor has one end connected to the positive electrode of the battery. The second capacitor is connected between another end of the first capacitor and the negative electrode of the battery. The first diode has a cathode electrode connected to the connection point between the upper arm and lower arm switching elements. The second diode has a cathode electrode connected to another end of the first capacitor. Power is supplied from an external power supply to an anode electrode of the first diode and an anode electrode of the second diode.

Abstract: A power converter is basically provided with at least three switching circuits, at least one power source, at least one load, and a resonant circuit. Input terminals of the switching circuits are connected to either the at least one power source or the at least one load, and output terminals of the switching circuits are electrically serially connected to the resonant circuit to form a closed circuit.

Abstract: There included are: an arm circuit in which upper arm switching elements (21, 31, 41) to which a positive electrode of a battery (70) is connected and lower arm switching elements (22, 32, 42) to which a negative electrode of the battery (70) is connected are connected; a first capacitor (10) having one end connected to the positive electrode of the battery (70); a second capacitor (11) connected between another end of the first capacitor (10) and the negative electrode of the battery (70); a first diode (12) having a cathode electrode connected to the connection point between the upper arm and lower arm switching elements; and a second diode (13) having a cathode electrode connected to another end of the first capacitor (10). Power is supplied from an external power supply (80) to the anode electrode of the first diode (12) and anode electrode of the second diode (13).

Abstract: Provided is a power conversion device including: a power module provided between a first power-supply busbar that supplies a positive power source and a second power-supply busbar that supplies a negative power source; a first capacitor with one end thereof connected to the first power-supply busbar; a second capacitor with one end thereof connected to the second power-supply busbar; a grounding member connected between the opposite end of the first capacitor and the opposite end of the second capacitor; and a conductive member routed along at least one of the first power-supply busbar and the second power-supply busbar and connecting the grounding member and a ground potential.

Abstract: A semiconductor device (100) comprises: a semiconductor substrate (1); a drift region (2) of a first conductivity type having a trench in part of an upper portion thereof and arranged on a first main surface of the semiconductor substrate (100); an electric field reducing region (4) of a second conductivity type arranged, in a bottom portion of the trench, only around a corner portion and not in a center portion; an anode electrode (9) embedded in the trench; and a cathode electrode (10) arranged on a second main surface of the semiconductor substrate (100) which is opposite to the first main surface.

Abstract: An anode region 106 is formed on a bottom portion of a trench 105 in which a gate electrode 108 is formed or in a drift region 102 immediately under the trench 105. A contact hole 110 is formed in the trench 105 at a depth reaching the anode region 106. A source electrode 112 is embedded in the contact hole 110 while interposing an inner wall insulating film 111 therebetween. The anode region 106 and the source electrode 112 are electrically connected to each other in a state of being insulated from the gate electrode 108 by the inner wall insulating film 111.

Abstract: A semiconductor device (100) comprises: a semiconductor substrate (1); a drift region (2) of a first conductivity type having a trench in part of an upper portion thereof and arranged on a first main surface of the semiconductor substrate (100); an electric field reducing region (4) of a second conductivity type arranged, in a bottom portion of the trench, only around a corner portion and not in a center portion; an anode electrode (9) embedded in the trench; and a cathode electrode (10) arranged on a second main surface of the semiconductor substrate (100) which is opposite to the first main surface.

Abstract: A method for producing a semiconductor device (20) is disclosed. The semiconductor device (20) includes: 1) a semiconductor substrate (1, 2), 2) a hetero semiconductor area (3) configured to contact a first main face (1A) of the semiconductor substrate (1, 2) and different from the semiconductor substrate (1, 2) in band gap, 3) a gate electrode (7) contacting, via a gate insulating film (6), a part of a junction part (13) between the hetero semiconductor area (3) and the semiconductor substrate (1, 2), 4) a source electrode (8) configured to connect to the hetero semiconductor area (3), and 5) a drain electrode (9) configured to make an ohmic connection with the semiconductor substrate (1, 2). The method includes the following sequential operations: i) forming the gate insulating film (6); and ii) nitriding the gate insulating film (6).

Abstract: Each insulating gate portion forms a channel in part of a first well region located between a drift region and source region. A first main electrode forms junctions with part of the drift region exposed in the major surface of the drift region to constitute unipolar diodes and is connected to the first well regions and the source regions. The plurality of insulating gate portions have linear patterns parallel to each other when viewed in the normal direction of the major surface. Between each pair of adjacent insulating gate portions, junction portions in which the first main electrode forms junctions with the drift region and the first well regions are arranged along the direction that the insulating gate portions extend. The channels are formed at least in the normal direction of the major surface.

Abstract: An anode region 106 is formed on a bottom portion of a trench 105 in which a gate electrode 108 is formed or in a drift region 102 immediately under the trench 105. A contact hole 110 is formed in the trench 105 at a depth reaching the anode region 106. A source electrode 112 is embedded in the contact hole 110 while interposing an inner wall insulating film 111 therebetween. The anode region 106 and the source electrode 112 are electrically connected to each other in a state of being insulated from the gate electrode 108 by the inner wall insulating film 111.

Abstract: A trench is formed extending from a surface of a hetero semiconductor region of a polycrystal silicon to the drain region. Further, a driving point of the field effect transistor, where a gate insulating film, the hetero semiconductor region and the drain region are adjoined, is formed at a position spaced apart from a side wall of the trench.

Abstract: Each insulating gate portion forms a channel in part of a first well region located between a drift region and source region. A first main electrode forms junctions with part of the drift region exposed in the major surface of the drift region to constitute unipolar diodes and is connected to the first well regions and the source regions. The plurality of insulating gate portions have linear patterns parallel to each other when viewed in the normal direction of the major surface. Between each pair of adjacent insulating gate portions, junction portions in which the first main electrode forms junctions with the drift region and the first well regions are arranged along the direction that the insulating gate portions extend. The channels are formed at least in the normal direction of the major surface.