Abstract: In a manufacturing method of a thin film transistor (1), the oxide film forming step is performed whereby: a process-target substrate (2) having a surface on which a gate oxide film (4) should be formed is immersed in an oxidizing solution containing a; active oxidizing species; and a gate oxide film (4) is formed through direct oxidation of polycrystalline silicon (51) on the process-target substrate (2). With this step, a silicon dioxide film (42) is formed while growing a silicon dioxide film (41) on the process-target substrate 2. Accordingly, the interface between the polycrystalline silicon (51) and the gate oxide film (4) is kept clean. The gate oxide film (4) is uniformly formed with excellent quality in insulation tolerance and other properties. Therefore, the thin film transistor (1) contains a high quality oxide film with excellent insulation tolerance and other properties which can be formed at low temperature.

Abstract: In a manufacturing method of a thin film transistor (1), the oxide film forming step is performed whereby: a process-target substrate (2) having a surface on which a gate oxide film (4) should be formed is immersed in an oxidizing solution containing an active oxidizing species; and a gate oxide film (4) is formed through direct oxidation of polycrystalline silicon (51) on the process-target substrate (2). With this step, a silicon dioxide film (42) is formed while growing a silicon dioxide film (41) on the process-target substrate 2. Accordingly, the interface between the polycrystalline silicon (51) and the gate oxide film (4) is kept clean. The gate oxide film (4) is uniformly formed with excellent quality in insulation tolerance and other properties. Therefore, the thin film transistor (1) contains a high quality oxide film with excellent insulation tolerance and other properties which can be formed at low temperature.

Abstract: An object of the present invention is to provide an electronic circuit device capable of reducing the occurrence of electromagnetic waves accompanying the propagation of a signal. The electronic circuit device comprises a plurality of transparent substrates, on which an optical sensor and an optical shutter are formed. An optical signal is inputted from the external into the electronic circuit device, and the optical signal is directly irradiated on the optical sensor disposed on the transparent substrate, or the optical signal is transmitted through the transparent substrate and inputted into an optical sensor on the other substrate. The optical sensor converts the optical signal into an electric signal, and the circuit disposed on the substrate is operated. The optical shutter is controlled by the output of the circuit, the light is inputted from the external into this optical shutter, and whether the light has been transmitted or not is determined, thereby taking out the signal.

Abstract: A cryptosystem includes an encrypting device, a communication path, and a decrypting arithmetic device. Key generation means in the encrypting device generate a public key {g1, g2} as random numbers respectively including the power of (p?1) and the power of (q?1) and decrypt a message m using the Fermat's little theorem and the Chinese remainder theorem. This makes it possible to suggest an extremely simple cryptosystem, which is simplified by reducing the amount of computations for encryption and decryption and enables encryption and decryption by simple calculations, while maintaining a security equivalent to the RSA encryption scheme.

Abstract: In a manufacturing method of a thin film transistor (1), the oxide film forming step is performed whereby: a process-target substrate (2) having a surface on which a gate oxide film (4) should be formed is immersed in an oxidizing solution containing an active oxidizing species; and a gate oxide film (4) is formed through direct oxidation of polycrystalline silicon (51) on the process-target substrate (2). With this step, a silicon dioxide film (42) is formed while growing a silicon dioxide film (41) on the process-target substrate 2. Accordingly, the interface between the polycrystalline silicon (51) and the gate oxide film (4) is kept clean. The gate oxide film (4) is uniformly formed with excellent quality in insulation tolerance and other properties. Therefore, the thin film transistor (1) contains a high quality oxide film with excellent insulation tolerance and other properties which can be formed at low temperature.

Abstract: An image information processing system is provided, which comprises an image input section for receiving image data, a storage section for storing the image data, and a control section for controlling the image input section and the storage section. The image input section, the storage section and the control section are connected together via a data transfer bus line. An image compression section for compressing the image data is provided within or adjacent to the image input section. The control section controls the image compression section to compress non-compressed image data input from the image input section, transfers the compressed image data via the data transfer bus line to the storage section, and controls the storage section to store the compressed image data.

Abstract: A transistor model for a simulator simulates a resistance between a source region and a drain region with a model equation which has terms representing resistance values corresponding respectively to areas of mutually different impurity concentrations below a gate section in simulating characteristics of a transistor. At least two of the terms each having a threshold parameter indicating a voltage at which a semiconductor element composed of the associated region and regions adjacent to that region changes from an ON state to an OFF state. The threshold parameters of the terms being specified independently from each other. Thus, the characteristics of a transistor having a set of areas of mutually different impurity concentrations below a gate section, inclusive of subthreshold regions which are difficult to evaluate through actual measurement, can be simulated to high accuracy while preserving a good fit with a capacitance model.

Abstract: The invention provides, in one aspect, a virtual processor that includes one or more virtual processing units. These virtual processing units execute on one or more processors, and each virtual processing unit executes one or more processes or threads (collectively, “threads”). While the threads may be constrained to executing throughout their respective lifetimes on the same virtual processing units, they need not be. An event delivery mechanism associates events with respective threads and notifies those threads when the events occur, regardless of which virtual processing unit and/or processor the threads happen to be executing on at the time. The invention provides, in other aspects, virtual and/or digital data processors with improved dataflow-based synchronization. A process or thread (collectively, again, “thread”) executing within such processor can execute a memory instruction (e.g.

Abstract: The invention provides an embedded processor architecture comprising a plurality of virtual processing units that each execute processes or threads (collectively, “threads”). One or more execution units, which are shared by the processing units, execute instructions from the threads. An event delivery mechanism delivers events—such as, by way of non-limiting example, hardware interrupts, software-initiated signaling events (“software events”) and memory events—to respective threads without execution of instructions. Each event can, per aspects of the invention, be processed by the respective thread without execution of instructions outside that thread. The threads need not be constrained to execute on the same respective processing units during the lives of those threads—though, in some embodiments, they can be so constrained. The execution units execute instructions from the threads without needing to know what threads those instructions are from.

Abstract: A cryptosystem includes an encrypting device, a communication path, and a decrypting arithmetic device. Key generation means in the encrypting device generate a public key {g1, g2} as random numbers respectively including the power of (p−1) and the power of (q−1) and decrypt a message m using the Fermat's little theorem and the Chinese remainder theorem. This makes it possible to suggest an extremely simple cryptosystem, which is simplified by reducing the amount of computations for encryption and decryption and enables encryption and decryption by simple calculations, while maintaining a security equivalent to the RSA encryption scheme.

Abstract: An object of the present invention is to provide an electronic circuit device capable of reducing the occurrence of electromagnetic waves accompanying the propagation of a signal. The electronic circuit device comprises a plurality of transparent substrates, on which an optical sensor and an optical shutter are formed. An optical signal is inputted from the external into the electronic circuit device, and the optical signal is directly irradiated on the optical sensor disposed on the transparent substrate, or the optical signal is transmitted through the transparent substrate and inputted into an optical sensor on the other substrate. The optical sensor converts the optical signal into an electric signal, and the circuit disposed on the substrate is operated. The optical shutter is controlled by the output of the circuit, the light is inputted from the external into this optical shutter, and whether the light has been transmitted or not is determined, thereby taking out the signal.

Abstract: An object of the present invention is to provide an electronic circuit device capable of reducing the occurrence of electromagnetic waves associated with the propagation of a signal by utilizing light as a signal. The electronic circuit device has a transparent substrate (hereinafter written as a substrate) over which an optical sensor and an optical shutter and an electronic circuit composed of thin film transistors (TFTs) are formed. An optical signal is inputted from an external into the electronic circuit device, the optical signal is directly irradiated on the optical sensor over the substrate, and penetrates through the substrate, and inputted into an optical sensor over another substrate. The optical sensor converts the optical signal into an electronic signal, and the circuit over the substrate operates.

Abstract: A remote control receiving device mounted on an apparatus has a switch circuit and an LED. The switch circuit is connected between a power supplied circuit of the apparatus and a power source. The LED functioning as a light receiving element receives an optical signal from a transmitting device. When the apparatus turns into a standby state based on an optical signal from a transmitting device, the switch circuit is brought into OFF by a microcomputer in the remote control receiving device. This intercept supply of power to the remote control light receiving circuit as well as the apparatus. When the LED receives an optical signal from the transmitting device, the LED outputs a electric control signal under an unbias state to turn on the switch circuit. Thereby, power is supplied to the apparatus.

Abstract: A remote control receiving device mounted on an apparatus has a switch circuit and an LED. The switch circuit is connected between a power supplied circuit of the apparatus and a power source. The LED functioning as a light receiving element receives an optical signal from a transmitting device. When the apparatus turns into a standby state based on an optical signal from a transmitting device, the switch circuit is brought into OFF by a microcomputer in the remote control receiving device. This intercept supply of power to the remote control light receiving circuit as well as the apparatus. When the LED receives an optical signal from the transmitting device, the LED outputs a electric control signal under an unbias state to turn on the switch circuit. Thereby, power is supplied to the apparatus.

Abstract: A semiconductor integrated circuit includes a pass transistor logic circuit and an output buffer. The output buffer compensates for an output level of the pass transistor logic circuit. Preferably, the output buffer includes a bootstrap circuit with a capacitor. The capacitor is preferably connected between a gate of an output transistor and an output terminal. Such an arrangement allows for the obtaining of a high voltage at the output terminal.

Abstract: A pass transistor circuit of the present invention includes a plurality of pass transistor sections having pass transistor logics and has a logic functionality which is based on a pass transistor logic functionality of a plurality of pass transistor sections. One or more of the pass transistor sections is a CMOSFET formed of a p-type MOSFET and an n-type MOSFET. At least one of the p-type MOSFET and the n-type MOSFET of the CMOSFET is a transistor having a TFT structure.

Abstract: A data bus control circuit is formed on a single semiconductor integrated circuit that includes input/output terminals for external data exchange and a plurality of functional blocks including a CPU. A bi-directional bus buffer buffers data sent over a data bus between the CPU and the input/output terminals. The signal propagation direction of the bus buffer is determined according to a logic level of a read control signal supplied from the CPU.

Abstract: A semiconductor integrated circuit which includes a central processing unit, one or more peripheral circuits, one or more external terminals for transferring signals to or from the integrated circuit, and circuits for selecting the central processing unit or one of the peripheral circuits and solely operating the selected one in a test mode. The circuit for selecting includes a test mode control circuit and a signal control circuit. The test mode control circuit generates and supplies control signals in response to test operating signals having particular timings different from those of an actual operating signal inputted through the external terminal in a normal mode. The signal control circuit serves to separate the selected one from the others in a manner to allow the separated one to solely operate in the test mode.

Abstract: A memory selection circuit of a computer provided with a central processing unit and a plurality of memory areas of an equal capacity, including the first circuit for storing data corresponding to the capacity of the plurality of memory areas outputted from the central processing unit, the second circuit for storing an address outputted from the central processing unit, the third circuit for generating a signal that indicates a difference between the address stored in the second circuit and a predetermined address assigned to a beginning of the plurality of memory areas; and the fourth circuit for generating a selection signal for selecting one of the plurality of memory areas on the basis of the data stored in the first circuit and the signal generated by the third circuit.

Abstract: A microprocessor capable of executing a micro-instruction output from a micro-memory according to an address which corresponds to an instruction to be executed at a time when each time the microprocessor receives the address is provided. The microprocessor includes a unit (a T1 cycle signal generator, a T2 cycle signal generator, a TW cycle signal generator) for generating a control signal for a period of time corresponding to a period of time of a waiting signal at a time when the waiting signal is received from the outside, and a unit (a microcode read-only memory, a read-only memory address latch, a read-only memory output latch, an address control circuit, a multiplexer) connected to the control signal generating unit (the T1 cycle signal generator, the T2 cycle signal generator, the TW cycle signal generator) for holding an address supplied to the micro-memory for a period of time corresponding to a period of time of the control signal.