Patents by Inventor Shigeki Yamauchi

Shigeki Yamauchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11811153
    Abstract: A wireless module has a multilayer substrate, an element installation section formed in one region in a substrate plane of the multilayer substrate, and an antenna. The antenna includes a conductor unit formed in another region in the substrate plane of the multilayer substrate. The conductor unit has a first end and a second end that extend along an outer periphery of the other region and that are separated from each other in a direction of the extension, and is formed in a loop as seen from a direction perpendicular to a substrate surface of the multilayer substrate. A feed unit connected to the first end of the conductor unit receives input of an AC signal of a prescribed frequency. A short-circuit line has a first end connected to a ground and a second end connected to the conductor unit through the feed unit.
    Type: Grant
    Filed: December 8, 2021
    Date of Patent: November 7, 2023
    Assignee: LAPIS TECHNOLOGY CO., LTD.
    Inventor: Shigeki Yamauchi
  • Patent number: 11599759
    Abstract: A passive radio frequency identification (RFID) tag includes: a rectifier circuit that rectifies a signal obtained from an antenna and outputs the rectified signal as a DC voltage. A capacitor is connected to an output line of the rectifier circuit. A first regulator circuit generates a first regulator voltage by stabilizing the output DC voltage from the rectifier circuit. A control circuit starts operating when the first regulator voltage is applied, and the control circuit generates a control signal upon receipt of the modulation signal section of the wireless signal. A second regulator circuit generates a second regulator voltage by stabilizing the output DC voltage from the rectifier circuit in response to the control signal and outputs the second regulator voltage to the outside.
    Type: Grant
    Filed: January 14, 2021
    Date of Patent: March 7, 2023
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Shigeki Yamauchi
  • Patent number: 11510348
    Abstract: A shield case for covering an electronic component includes a top panel portion made of a metal plate, a plurality of terminal leg portions formed to project in a direction intersecting with the top panel portion from a peripheral edge portion thereof, and a side plate portion formed to project in the direction intersecting with the top panel portion from a peripheral edge portion of the top panel portion other than the plurality of terminal leg portions. Each of the plurality of terminal leg portions includes a leg portion that stretches from the top panel portion, a joint portion that extends in a direction intersecting with the leg portion from a distal end of the leg portion, and a terminal portion with a ring-shaped cross-sectional surface that has a projecting support abutting on the leg portion from a distal end of the joint portion.
    Type: Grant
    Filed: March 24, 2021
    Date of Patent: November 22, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Shigeki Yamauchi
  • Publication number: 20220181782
    Abstract: A wireless module has a multilayer substrate, an element installation section formed in one region in a substrate plane of the multilayer substrate, and an antenna. The antenna includes a conductor unit formed in another region in the substrate plane of the multilayer substrate. The conductor unit has a first end and a second end that extend along an outer periphery of the other region and that are separated from each other in a direction of the extension, and is formed in a loop as seen from a direction perpendicular to a substrate surface of the multilayer substrate. A feed unit connected to the first end of the conductor unit receives input of an AC signal of a prescribed frequency. A short-circuit line has a first end connected to a ground and a second end connected to the conductor unit through the feed unit.
    Type: Application
    Filed: December 8, 2021
    Publication date: June 9, 2022
    Applicant: LAPIS Technology Co., Ltd.
    Inventor: Shigeki YAMAUCHI
  • Publication number: 20210307220
    Abstract: A shield case for covering an electronic component includes a top panel portion made of a metal plate, a plurality of terminal leg portions formed to project in a direction intersecting with the top panel portion from a peripheral edge portion thereof, and a side plate portion formed to project in the direction intersecting with the top panel portion from a peripheral edge portion of the top panel portion other than the plurality of terminal leg portions. Each of the plurality of terminal leg portions includes a leg portion that stretches from the top panel portion, a joint portion that extends in a direction intersecting with the leg portion from a distal end of the leg portion, and a terminal portion with a ring-shaped cross-sectional surface that has a projecting support abutting on the leg portion from a distal end of the joint portion.
    Type: Application
    Filed: March 24, 2021
    Publication date: September 30, 2021
    Inventor: SHIGEKI YAMAUCHI
  • Publication number: 20210306021
    Abstract: A multilayer substrate includes a first dielectric layer, a first conductive layer, and a conductor portion. The first dielectric layer has a first region. The first conductive layer is laminated on the first dielectric layer, excluding the first region. The conductor portion has one or more auxiliary conductors disposed at a distance from the first conductive layer, and one or more connecting conductors that connect said one or more auxiliary conductors to the first conductive layer.
    Type: Application
    Filed: March 19, 2021
    Publication date: September 30, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Shigeki YAMAUCHI
  • Patent number: 11011846
    Abstract: An antenna including: a first conductor portion including a power supply point at which one of a pair of differential signals is input; a second conductor portion including a power supply point at which another one of the pair of differential signals is input, the second conductor portion being separated by a gap from the first conductor portion; and a third conductor portion that connects the first conductor portion with the second conductor portion, wherein the gap includes a portion having a width that becomes progressively wider in a direction moving away from the third conductor portion.
    Type: Grant
    Filed: April 24, 2019
    Date of Patent: May 18, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventors: Shigeki Yamauchi, Fukuro Koshiji
  • Publication number: 20210133525
    Abstract: A passive radio frequency identification (RFID) tag includes: a rectifier circuit that rectifies a signal obtained from an antenna and outputs the rectified signal as a DC voltage. A capacitor is connected to an output line of the rectifier circuit. A first regulator circuit generates a first regulator voltage by stabilizing the output DC voltage from the rectifier circuit. A control circuit starts operating when the first regulator voltage is applied, and the control circuit generates a control signal upon receipt of the modulation signal section of the wireless signal. A second regulator circuit generates a second regulator voltage by stabilizing the output DC voltage from the rectifier circuit in response to the control signal and outputs the second regulator voltage to the outside.
    Type: Application
    Filed: January 14, 2021
    Publication date: May 6, 2021
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Shigeki YAMAUCHI
  • Patent number: 10909434
    Abstract: A passive radio frequency identification (RFID) tag includes: a rectifier circuit that rectifies a signal obtained from an antenna and outputs the rectified signal as a DC voltage. A capacitor is connected to an output line of the rectifier circuit. A first regulator circuit generates a first regulator voltage by stabilizing the output DC voltage from the rectifier circuit. A control circuit starts operating when the first regulator voltage is applied, and the control circuit generates a control signal upon receipt of the modulation signal section of the wireless signal. A second regulator circuit generates a second regulator voltage by stabilizing the output DC voltage from the rectifier circuit in response to the control signal and outputs the second regulator voltage to the outside.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: February 2, 2021
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Shigeki Yamauchi
  • Publication number: 20200311506
    Abstract: A passive radio frequency identification (RFID) tag includes: a rectifier circuit that rectifies a signal obtained from an antenna and outputs the rectified signal as a DC voltage. A capacitor is connected to an output line of the rectifier circuit. A first regulator circuit generates a first regulator voltage by stabilizing the output DC voltage from the rectifier circuit. A control circuit starts operating when the first regulator voltage is applied, and the control circuit generates a control signal upon receipt of the modulation signal section of the wireless signal. A second regulator circuit generates a second regulator voltage by stabilizing the output DC voltage from the rectifier circuit in response to the control signal and outputs the second regulator voltage to the outside.
    Type: Application
    Filed: March 20, 2020
    Publication date: October 1, 2020
    Applicant: LAPIS Semiconductor Co., Ltd.
    Inventor: Shigeki YAMAUCHI
  • Publication number: 20190341697
    Abstract: An antenna including: a first conductor portion including a power supply point at which one of a pair of differential signals is input; a second conductor portion including a power supply point at which another one of the pair of differential signals is input, the second conductor portion being separated by a gap from the first conductor portion; and a third conductor portion that connects the first conductor portion with the second conductor portion, wherein the gap includes a portion having a width that becomes progressively wider in a direction moving away from the third conductor portion.
    Type: Application
    Filed: April 24, 2019
    Publication date: November 7, 2019
    Inventors: SHIGEKI YAMAUCHI, FUKURO KOSHIJI
  • Publication number: 20110262402
    Abstract: Provided is a pharmaceutical composition and a method for the treatment and/or prophylaxis of arthritis, inter alia, rheumatoid arthritis. The pharmaceutical composition comprises human mesenchymal stem cells, and the method comprises administering an effective amount human mesenchymal stem cells to a patient.
    Type: Application
    Filed: September 4, 2008
    Publication date: October 27, 2011
    Inventors: Masahiko Kuroda, Masakatsu Takanashi, Katsuko Sudo, Shigeki Yamauchi, Hiroyuki Shirono, Toru Hirado, Kenichi Maeda
  • Publication number: 20110070207
    Abstract: A novel type of therapeutic agent, human mesenchymal stem cells, and a composition containing the same for the treatment of atopic dermatitis is disclosed. A method for the treatment of atopic dermatitis in patient is also disclosed.
    Type: Application
    Filed: November 22, 2010
    Publication date: March 24, 2011
    Inventors: Masahiko KURODA, Masakatsu Takanashi, Katsuko Sudo, Shigeki Yamauchi
  • Patent number: 7733256
    Abstract: The present invention provides an analog signal generator capable of simultaneously improving both items of the influence of noise on a peripheral circuit and the settling time for a desired voltage level. A D/A converter to which the analog signal generator is applied, is configured as follows. A controller supplies a fixed value to data generation units, which respectively generate data according to clock signals and output the same to a buffer unit. The buffer unit temporarily holds the data therein. Control signals generated from the controller are supplied to a selection unit or selector, which decodes the control signals and thereby generates selection signals to turn ON/OFF the output of the data held in the buffer unit in response to the selection signals, after which the corresponding data is supplied to a filter unit, where an analog signal is generated based on the data supplied to the filter unit.
    Type: Grant
    Filed: September 8, 2008
    Date of Patent: June 8, 2010
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Shigeki Yamauchi
  • Patent number: 7606329
    Abstract: The modem has an RF section developing an RSSI signal and a baseband signal converted from a received signal. A reference voltage output section feeds a reference voltage to a comparator. The comparator outputs, when the RSSI signal is higher in level than the reference voltage, a control signal to the RF section, an A/D converter and a demodulator of a receiver modem. The modem thus provides a data receiver capable of reducing power consumption in the entire system, while maintaining a reliable detection of received signals.
    Type: Grant
    Filed: January 12, 2005
    Date of Patent: October 20, 2009
    Assignee: Oki Semiconductor Co., Ltd.
    Inventor: Shigeki Yamauchi
  • Publication number: 20090246181
    Abstract: A novel type of therapeutic agent, human mesenchymal stem cells, and a composition containing the same for the treatment of atopic dermatitis is disclosed. A method for the treatment of atopic dermatitis in patient is also disclosed.
    Type: Application
    Filed: March 27, 2009
    Publication date: October 1, 2009
    Inventors: Masahiko KURODA, Masakatsu Takanashi, Katsuko Sudo, Shigeki Yamauchi
  • Publication number: 20090073022
    Abstract: The present invention provides an analog signal generator capable of simultaneously improving both items of the influence of noise on a peripheral circuit and the settling time for a desired voltage level. A D/A converter to which the analog signal generator is applied, is configured as follows. A controller supplies a fixed value to data generation units, which respectively generate data according to clock signals and output the same to a buffer unit. The buffer unit temporarily holds the data therein. Control signals generated from the controller are supplied to a selection unit or selector, which decodes the control signals and thereby generates selection signals to turn ON/OFF the output of the data held in the buffer unit in response to the selection signals, after which the corresponding data is supplied to a filter unit, where an analog signal is generated based on the data supplied to the filter unit.
    Type: Application
    Filed: September 8, 2008
    Publication date: March 19, 2009
    Applicant: OKI ELECTRIC INDUSTRY CO., LTD.
    Inventor: Shigeki YAMAUCHI
  • Patent number: 7386285
    Abstract: An AGC circuit controls LNA and VGA amplifiers such that a received signal is converted at a high speed with tracking errors prevented according to each modulation scheme. The AGC circuit generates LNA and VGA control signals controlling the LNA and VGA amplifiers, respectively. A digital signal, converted from the received signal, is calculated for a power value, on which scaling is performed by a scaling section to then be provided through an adder and a register to a control signal generator for generating the LNA and VGA control signals. The scaling section compares the power value with a target value to perform scaling with a scaling coefficient according to the sign of the comparison value so that an increase of the tracking error is avoided, thus preventing phenomena where the AGC control oscillates without convergence, thereby making it possible to attain the optimum automatic gain control.
    Type: Grant
    Filed: September 29, 2005
    Date of Patent: June 10, 2008
    Assignee: Oki Electric Industry Co., Ltd.
    Inventor: Shigeki Yamauchi
  • Patent number: D945384
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: March 8, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Shigeki Yamauchi
  • Patent number: D956707
    Type: Grant
    Filed: March 25, 2020
    Date of Patent: July 5, 2022
    Assignee: LAPIS SEMICONDUCTOR CO., LTD.
    Inventor: Shigeki Yamauchi