Circuit board
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Description
Throughout the drawings, the dash-dash broken lines are for the purpose of illustrating environment only and form no part of the claimed design.
Claims
The ornamental design for a circuit board, as shown and described.
Referenced Cited
U.S. Patent Documents
Foreign Patent Documents
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Patent History
Patent number: D956707
Type: Grant
Filed: Mar 25, 2020
Date of Patent: Jul 5, 2022
Assignee: LAPIS SEMICONDUCTOR CO., LTD. (Yokohama)
Inventor: Shigeki Yamauchi (Yokohama)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/729,267
Type: Grant
Filed: Mar 25, 2020
Date of Patent: Jul 5, 2022
Assignee: LAPIS SEMICONDUCTOR CO., LTD. (Yokohama)
Inventor: Shigeki Yamauchi (Yokohama)
Primary Examiner: Elizabeth J Oswecki
Application Number: 29/729,267
Classifications
Current U.S. Class:
Semiconductor, Transistor Or Integrated Circuit (24) (D13/182)