Patents by Inventor Shigeru Nakagawa

Shigeru Nakagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5729567
    Abstract: First and second layers are alternately laminated on the semiconductor substrate, providing a multilayer structure in which the resultant residual stress in the layered structure is significantly decreased. One embodiment of the invention is applied to a vertical cavity surface emitting laser having a dielectric multilayer mirror comprised of pairs of a first layer (SiO.sub.2 layer) and a second layer (TiO.sub.2 layer). Each layer has a prescribed thickness and is formed by deposition on a semiconductor (GaAs) substrate. When the layers are deposited on the semiconductor substrate, the first layer is preferably formed to exhibit a residual compressive stress, while the second layer is preferably formed to exhibit a residual tensile stress having a magnitude that is equal to or almost equal to the residual compressive stress of the first layer.
    Type: Grant
    Filed: April 25, 1996
    Date of Patent: March 17, 1998
    Assignee: Hewlett-Packard Company
    Inventor: Shigeru Nakagawa
  • Patent number: 5530381
    Abstract: To provide a type of logic circuit, characterized by the fact that the novel-configuration logic circuit can be easily manufactured in a bipolar process, having a high integration degree and allowing a high-speed operation. For standard longitudinal-type NPN transistor TR0, its emitter E0 is connected to bias terminal BIAS, base B0 is connected to voltage source +Vcc, and collector C0 is connected to base B1 of PNP transistor TR1. For lateral-type PNP transistor TR1, emitter E1 is connected to voltage source Vxx, base B1 is connected to both the collector Co of NPN transistor TR0 and input terminal IN, and collectors C1, C2, C3, . . . Cn are connected to output terminals OUT1, OUT2, PUT3, . . . OUTn, respectively. Schottky diodes SBD1, SBD2, SBD3, . . . SBDn are connected between base B1 and collectors C1, C2, C3, . . . Cn of NPN transistor TR1 with a cathode on the side of the base and with an anode on the side of the collector.
    Type: Grant
    Filed: December 20, 1994
    Date of Patent: June 25, 1996
    Assignee: Texas Instruments Incorporated
    Inventor: Shigeru Nakagawa
  • Patent number: 5497118
    Abstract: The invention is intended to offer a signal selector circuit and a signal-generating circuit which are excellent in linearity between input and output signals at high frequencies and in isolation between input signals and isolation between output signals and which do not produce distortion. When an output signal is taken from OUT.sub.1, a circuit connected with the gate terminal of Q.sub.11 is made to have a high impedance, and a cutoff voltage deeper than the pinchoff voltage is applied to the gate of Q.sub.12. With respect to each of Q.sub.11, Q.sub.12, the gate is connected with the source by R.sub.11 or R.sub.12. Both Q.sub.11 and Q.sub.12 have depletion characteristics. The resistances of R.sub.11 and R.sub.12 are lower than the impedances of Q.sub.15 and Q.sub.16 when they drive the gates so as to turn on Q.sub.11 and Q.sub.12. In this case, therefore, the voltage between the gate and the source of Q.sub.11 is made null and Q.sub.11 conducts. Q.sub.12 is cut off.
    Type: Grant
    Filed: July 19, 1993
    Date of Patent: March 5, 1996
    Assignee: Hewlett-Packard Company
    Inventors: Toshiaki Ueno, Shigeru Nakagawa
  • Patent number: 5402016
    Abstract: To provide a type of logic circuit, characterized by the fact that the novel-configuration logic circuit can be easily manufactured in a bipolar process, having a high integration degree and allowing a high-speed operation. For standard longitudinal-type NPN transistor TR0, its emitter E0 is connected to bias terminal BIAS, base B0 is connected to voltage source+Vcc, and collector C0 is connected to base B1 of PNP transistor TR1. For lateral-type PNP transistor TR1, emitter E1 is connected to voltage source Vxx, base B1 is connected to both the collector Co of NPN transistor TR0 and input terminal IN, and collectors C1, C2, C3, . . . Cn are connected to output terminals OUT1, OUT2, PUT3, . . .OUTn, respectively. Schottky diodes SBD1, SBD2, SBD3, . . .SBDn are connected between base B1 and collectors C1, C2, C3, . . . Cn of NPN transistor TR1 with a cathode on the side of the base and with an anode on the side of the collector.
    Type: Grant
    Filed: May 24, 1993
    Date of Patent: March 28, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Shigeru Nakagawa
  • Patent number: 5333553
    Abstract: The carrier for linear motor vehicle-borne field magnets includes a aluminium profiled material of a gate shape in section, which is provided with recesses of permanent magnet size in both its legs. Permanent magnets attached to iron cores are inserted into the recesses in such a way that the N and S poles thereof are opposite to each other and alternate in the longitudinal direction of the carrier frame to form a spatial magnetic field by the alternation of the N and S poles between both the legs of the carrier frame, which interacts with the moving magnetic field created by ground-side coils to generate driving power. The carrier further includes support wheels, guide wheels and a vehicle support on which a vehicle is placed.
    Type: Grant
    Filed: November 12, 1993
    Date of Patent: August 2, 1994
    Assignees: East Japan Railway Company, Railway Technical Research Institute, Magnetic Transportation System Engineering Company
    Inventors: Kazumi Matsui, Kouichi Matsuoka, Shigeru Nakagawa
  • Patent number: 5071887
    Abstract: A polyurethane elastomer produced by reaction of a polyisocyanate with an amine-type polyol and another type polyol, the polyisocyanate being an isocyanurate-modified hexamethyelene diisocyanate; and the equivalent ratio of active hydrogen to isocyanate group to be reacted being in a range of from 0.8 to 1.6; and the ratio of the amine-type polyol to the another type polyol being in a range of from 10/90 to 100/0 by weight.
    Type: Grant
    Filed: February 15, 1990
    Date of Patent: December 10, 1991
    Assignee: Nippon Polyurethane Industry Co., Ltd.
    Inventors: Shigeru Nakagawa, Kiyofumi Murayama, Yukio Ohbuchi, Yamagata Tomoyuki
  • Patent number: 4818148
    Abstract: A covering is applied onto the outer surface of a pile including a steel pipe or the like to surround a predetermined length thereof so as to reduce a frost heaving force or negative friction acting on the pile in a frigid area. The covering is closely adhered by an adhesion layer the like to the pile over a given length thereof. This given length is between 0.5 and 5 m. The covering member includes a smooth-surfaced plastic covering or elastic covering. A rugged surface covering may be provided below the smooth surfaced covering.
    Type: Grant
    Filed: March 7, 1988
    Date of Patent: April 4, 1989
    Assignee: Nippon Kokan Kabushiki Kaisha
    Inventors: Takashi Takeda, Katsumi Omori, Toshiyuki Ohkuma, Kenji Kidera, Shigeru Nakagawa, Tetsuzo Hirose
  • Patent number: 4663869
    Abstract: The three dimensional display of the invention includes a display plate and a light source provided behind the plate. The display plate fundamentally includes a substrate made of a transparent material, an undercoating of transparent organic based color or colorless paint provided on the front surface of the plate, a light-reflective transparent metal coating on the undercoating, a transparent protective coating on the metal coating and a light-reflective surface provided on the rear surface of the substrate, the light reflective surface being opaque as a whole and including light-penetrable or transparent portions or vacant portions in the form of a predetermined image. To make the front surface of the display plate look like a roughened metal wall surface, the front surface of the substrate is roughened or the undercoating contains an agent which makes the front surface of the undercoating rough.
    Type: Grant
    Filed: June 21, 1985
    Date of Patent: May 12, 1987
    Assignee: Marui Industry Co., Ltd.
    Inventor: Shigeru Nakagawa
  • Patent number: 4643912
    Abstract: A method for forming a metal layer with a positive pattern on a plastic sheet or plate substrate which comprises printing an oil-soluble, water-insoluble ink on the substrate to provide a negative pattern, forming a metal layer on said substrate by dry metal plating, immersing the substrate in a hydrocarbon having 6-17 carbon atoms, preferably kerosene, and removing the ink layer and metal layer thereon by applying supersonic vibration to the substrate in the kerosene.
    Type: Grant
    Filed: September 27, 1984
    Date of Patent: February 17, 1987
    Assignee: Marui Industry Co., Ltd.
    Inventors: Shigeru Nakagawa, Kiyotaka Uchikawa
  • Patent number: 4585681
    Abstract: A frost damage proofed pile for installment in a frigid district where the pile is subjected to a freezing and frost heaving force, such as permanently or seasonally frozen soil terrain. A tubular sheath member is fitted over the pile surface and has a length longer than the thickness of an active or seasonally frozen soil layer of the terrain in which the pile is installed. At least a portion of said length of the pile is formed as an extensible section, and at least the lower end of said sheath member is secured to the pile at or below a position corresponding to the bottom region of said active or seasonally frozen soil layer. A fluid material is filled in a space defined between the pile and the sheath member. The frost heaving force caused to exist upon freezing of the active or seasonally frozen soil layer as well as negative friction caused to exist in summer are inhibited from affecting the pile due to sliding of the sheath member relative to the pile.
    Type: Grant
    Filed: June 26, 1984
    Date of Patent: April 29, 1986
    Inventors: Kenji Kidera, Shigeru Nakagawa, Takashi Takeda, Katsumi Omori, Toshiyuki Okuma
  • Patent number: 4417411
    Abstract: This invention discloses an information display device including a front plate and information visualizing means provided behind the front plate and adapted to make information consisting of characters, patters and/or others appear on the front surface of the plate by the light emitted from the visualizing means and passing through the plate, the device being characterized in that the front plate is made from transparent material such as transparent synthetic resins, glass or the like and is provided with metal coating on the front surface or the back surface of the front plate. The thickness of the metal coating is such that the metal coating permits the light emitted from the visualizing means to pass through it to make the information emerge on the front surface of the front plate and substantially prevents light the intensity of which is less than the former light from passing through the coating.
    Type: Grant
    Filed: November 24, 1981
    Date of Patent: November 29, 1983
    Assignee: Marui Industry Co., Ltd.
    Inventors: Naoki Miyagishima, Shigeru Nakagawa