Patents by Inventor Shigeru Tahara
Shigeru Tahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8101507Abstract: There is provided a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method capable of recovering a damage of a low dielectric insulating film exposed to CO2 plasma to obtain the low dielectric insulating film in a good state, thus improving performance and reliability of a semiconductor device. The semiconductor device manufacturing method includes: an etching process for etching a low dielectric insulating film formed on a substrate; a CO2 plasma process for exposing the substrate to CO2 plasma after the etching process; and a UV process for irradiating UV to the low dielectric insulating film after the CO2 plasma process.Type: GrantFiled: October 16, 2009Date of Patent: January 24, 2012Assignee: Tokyo Electron LimitedInventors: Ryuichi Asako, Gousuke Shiraishi, Shigeru Tahara
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Publication number: 20120009786Abstract: A plasma processing method in which performing a plasma etching on metal layers formed on a substrate is conducted to form a pattern having the metal layers in a stacked structure, and then a deposit containing a metal that forms the metal layers and being deposited on a sidewall portion of the pattern is removed, the method includes: forming a protective layer by forming an oxide or chloride of the metal on sidewall portions of the metal layers; removing the deposit by applying a plasma of a gas containing fluorine atoms; and reducing the oxide or chloride of the metal by applying a plasma containing hydrogen after forming the protective layer and removing the deposit.Type: ApplicationFiled: July 8, 2011Publication date: January 12, 2012Applicants: KABUSHIKI KAISHA TOSHIBA, TOKYO ELECTRON LIMITEDInventors: Shigeru TAHARA, Eiichi Nishimura, Fumiko Yamashita, Hiroshi Tomita, Tokuhisa Ohiwa, Hisashi Okuchi, Mitsuhiro Omura
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Patent number: 8026150Abstract: A method of manufacturing a semiconductor device, including an interlayer insulating layer having a dielectric constant of about 1, includes at least one of hydrophobically modifying an interlayer insulating film for insulating lines from each other, before forming air gaps in the interlayer insulating film, and hydrophobically modifying the lines, after forming the air gaps in the interlayer insulating film.Type: GrantFiled: June 5, 2009Date of Patent: September 27, 2011Assignee: Tokyo Electron LimitedInventors: Reiko Sasahara, Jun Tamura, Shigeru Tahara
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Publication number: 20110204026Abstract: A plasma ashing method is used for removing a patterned resist film in a processing chamber after etching a portion of a low-k film from an object to be processed in the processing chamber by using the patterned resist film as a mask. The method includes a first step of supplying a reaction product removal gas including at least CO2 gas into the processing chamber, generating plasma of the reaction product removal gas by applying a high frequency power for the plasma generation, and removing reaction products deposited on an inner wall of the processing chamber; and a second step of supplying an ashing gas into the processing chamber, generating plasma of the ashing gas by applying a high frequency power for the plasma generation, and removing the resist film.Type: ApplicationFiled: May 9, 2011Publication date: August 25, 2011Applicant: TOKYO ELECTRON LIMITEDInventors: Shigeru TAHARA, Naotsugu Hoshi
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Publication number: 20110204025Abstract: A silicon-containing film on a substrate is subjected to a plasma process using a process gas containing fluorine and carbon, and is thereafter subjected to plasma process using an ammonia gas, whereby ammonium silicofluoride having toxicity and hygroscopic property is adhered to the substrate. The harmful ammonium silicofluoride is removed by the inventive method. After conducting the plasma process using an ammonia gas, the substrate is heated to a temperature not lower than the decomposition temperature of the ammonium silicofluoride to decompose the ammonium silicofluoride in a process container in which the plasma process was conducted, or in a process container connected with the processing vessel which the plasma process was conducted therein and is isolated from a clean room atmosphere.Type: ApplicationFiled: May 2, 2011Publication date: August 25, 2011Applicant: TOKYO ELECTRON LIMITEDInventor: Shigeru TAHARA
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Publication number: 20110174337Abstract: A method for recovering a shape of patterns, formed etching on a silicon substrate by etching, by removing foreign substances grown between the patterns is provided. The method includes heating the silicon substrate accommodated in a chamber to a temperature of about 160° C. or higher.Type: ApplicationFiled: January 20, 2011Publication date: July 21, 2011Applicant: TOKYO ELECTRON LIMITEDInventors: Eiichi NISHIMURA, Shigeru Tahara, Fumiko Yamashita
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Publication number: 20110168205Abstract: A substrate cleaning method performing cleaning of a surface of a substrate after a pattern on the substrate is formed by plasma etching, includes: a by-product removal process removing a by-product by exposing the substrate to an HF gas atmosphere; and a residual fluorine removal process removing fluorine remaining on the substrate by turning cleaning gas containing hydrogen gas and chemical compound gas containing carbon and hydrogen as constituent elements into plasma to act on the substrate.Type: ApplicationFiled: January 6, 2011Publication date: July 14, 2011Applicants: TOKYO ELECTRON LIMITED, KABUSHIKI KAISHA TOSHIBAInventors: Shigeru TAHARA, Fumiko YAMASHITA, Eiichi NISHIMURA, Tokuhisa OHIWA, Takaya MATSUSHITA, Hiroshi TOMITA
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Patent number: 7964511Abstract: A plasma ashing method is used for removing a patterned resist film in a processing chamber after etching a portion of a low-k film from an object to be processed in the processing chamber by using the patterned resist film as a mask. The method includes a first step of supplying a reaction product removal gas including at least CO2 gas into the processing chamber, generating plasma of the reaction product removal gas by applying a high frequency power for the plasma generation, and removing reaction products deposited on an inner wall of the processing chamber; and a second step of supplying an ashing gas into the processing chamber, generating plasma of the ashing gas by applying a high frequency power for the plasma generation, and removing the resist film.Type: GrantFiled: August 25, 2006Date of Patent: June 21, 2011Assignee: Tokyo Electron LimitedInventors: Shigeru Tahara, Naotsugu Hoshi
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Patent number: 7892986Abstract: An ashing method of a target substrate is applied after plasma-etching a part of a low-k film by using a patterned resist film as a mask in a vacuum processing chamber. The method includes a process of removing the resist film in the vacuum processing chamber, and a pre-ashing process, performed prior to the main ashing process, for ashing the target substrate for a time period while maintaining the target substrate at a temperature in a range of from about 80 to 150° C.Type: GrantFiled: March 20, 2008Date of Patent: February 22, 2011Assignee: Tokyo Electron LimitedInventors: Shigeru Tahara, Eiichi Nishimura, Kumiko Yamazaki
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Patent number: 7882800Abstract: A ring mechanism, comprising a focus ring and divided cover rings surrounding a wafer W placed on a loading table (lower electrode) mounted in a processing chamber, wherein a ring-shaped clearance ?1 is provided between the divided rings to spread plasma to the radial outside of the focus ring to allow plasma to get therein, whereby a potential difference between the wafer W and the focus ring can be eliminated to prevent arc discharge by plasma from occurring between the wafer W and the focus ring.Type: GrantFiled: December 12, 2002Date of Patent: February 8, 2011Assignee: Tokyo Electron LimitedInventors: Akira Koshiishi, Mitsuru Hashimoto, Hideaki Tanaka, Shigeru Tahara, Kunihiko Hinata, Jun Ooyabu
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Publication number: 20100116786Abstract: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.Type: ApplicationFiled: January 20, 2010Publication date: May 13, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Shigeru Tahara, Masaru Nishino
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Publication number: 20100116787Abstract: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.Type: ApplicationFiled: January 20, 2010Publication date: May 13, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Shigeru Tahara, Masaru Nishino
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Publication number: 20100099256Abstract: There is provided a semiconductor device manufacturing apparatus and a semiconductor device manufacturing method capable of recovering a damage of a low dielectric insulating film exposed to CO2 plasma to obtain the low dielectric insulating film in a good state, thus improving performance and reliability of a semiconductor device. The semiconductor device manufacturing method includes: an etching process for etching a low dielectric insulating film formed on a substrate; a CO2 plasma process for exposing the substrate to CO2 plasma after the etching process; and a UV process for irradiating UV to the low dielectric insulating film after the CO2 plasma process.Type: ApplicationFiled: October 16, 2009Publication date: April 22, 2010Applicant: TOKYO ELECTRON LIMITEDInventors: Ryuichi ASAKO, Gousuke SHIRAISHI, Shigeru TAHARA
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Patent number: 7674393Abstract: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.Type: GrantFiled: March 27, 2006Date of Patent: March 9, 2010Assignee: Tokyo Electron LimitedInventors: Shigeru Tahara, Masaru Nishino
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Publication number: 20090305480Abstract: A method of manufacturing a semiconductor device, including an interlayer insulating layer having a dielectric constant of about 1, includes at least one of hydrophobically modifying an interlayer insulating film for insulating lines from each other, before forming air gaps in the interlayer insulating film, and hydrophobically modifying the lines, after forming the air gaps in the interlayer insulating film.Type: ApplicationFiled: June 5, 2009Publication date: December 10, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Reiko SASAHARA, Jun Tamura, Shigeru Tahara
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Publication number: 20090188428Abstract: A substrate processing apparatus includes a processing vessel; a mounting table for mounting the substrate thereon in the processing vessel; a gas inlet unit provided in the processing vessel; a gas supply mechanism for supplying a hydrogen-containing gas into the processing vessel through the gas inlet unit; a gas discharge port provided at the processing vessel; a gas exhaust mechanism for exhausting an inside of the processing vessel through the gas discharge port; a catalyst provided in the processing vessel; and a heating unit for heating the catalyst. Hydrogen radicals are formed in the processing vessel by a catalytic cracking reaction between the hydrogen-containing gas and the catalyst of high temperature, and the substrate is processed by the hydrogen radicals.Type: ApplicationFiled: January 28, 2009Publication date: July 30, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Isamu SAKURAGI, Shigeru Tahara, Kumiko Yamazaki, Ryo Nonaka, Morihiro Takanashi, Eiichi Nishimura
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Publication number: 20090146145Abstract: A processing condition inspection method of a damage recovery process for reforming a film having OH groups generated by damages from a predetermined process by using a processing gas includes preparing a substrate having an OH group containing resin film, measuring an initial film thickness of the OH group containing resin film, performing a damage recovery process on the substrate after measuring the initial film thickness, measuring a film thickness of the OH group containing resin film after the damage recovery process, calculating a film thickness difference of the OH group containing resin film before and after the damage recovery process, and determining whether processing conditions of the damage recovery process are appropriate or inappropriate based on the film thickness difference.Type: ApplicationFiled: December 2, 2008Publication date: June 11, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Reiko SASAHARA, Jun Tamura, Shigeru Tahara
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Publication number: 20090008034Abstract: A plasma generation chamber and a processing chamber are isolated from each other by a barrier wall member disposed between them. The barrier wall member includes two plate members and stacked one on top of the other over a gap, a plurality of through holes and, via which hydrogen radicals are allowed to pass, are respectively formed at the plate member and the plate member. The through holes at one plate member are formed with an offset relative to the through holes formed at the other plate member and the plate members are both constituted of an insulating material that does not transmit ultraviolet light.Type: ApplicationFiled: July 1, 2008Publication date: January 8, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Shigeru TAHARA, Eiichi NISHIMURA, Kumiko YAMAZAKI
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Publication number: 20090001046Abstract: The present invention provides a method, an apparatus and the like that may be adopted when executing a specific type of processing on a substrate that includes a recessed portion formed by etching a low dielectric constant insulating film with a low dielectric constant having been formed upon a metal layer. More specifically, a hydrogen radical processing phase in which the surface of the metal layer exposed at the bottom of the recessed portion is cleaned and the low dielectric constant insulating film is dehydrated by supplying hydrogen radicals while heating the substrate to a predetermined temperature and a hydrophobicity processing phase in which the low dielectric constant insulating film exposed at a side surface of the recessed portion is rendered hydrophobic by supplying a specific type of processing gas to the substrate are executed in succession without exposing the substrate to air.Type: ApplicationFiled: June 13, 2008Publication date: January 1, 2009Applicant: TOKYO ELECTRON LIMITEDInventors: Kazuhiro KUBOTA, Shigeru Tahara, Ryuichi Asako
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Publication number: 20080314520Abstract: The present invention provides a method for manufacturing a semiconductor device. In the method, a connection hole such as a via hole is formed in an interlayer insulating film by plasma etching with high etching uniformity regardless of the array density of connection holes. In the method, an upper layer film having a mask pattern is formed on the interlayer insulating film present on a substrate. A gas required for dehydration is then supplied to the substrate under the condition that an upper surface of the interlayer insulating film is exposed in order to remove moisture from the interlayer insulating film. A portion of the interlayer insulating film is etched to form a connection hole in which an electrical connection portion is to be embedded.Type: ApplicationFiled: June 9, 2008Publication date: December 25, 2008Inventors: Yuki Chiba, Shigeru Tahara