Patents by Inventor Shigeru Tahara

Shigeru Tahara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080233766
    Abstract: An ashing method of a target substrate is applied after plasma-etching a part of a low-k film by using a patterned resist film as a mask in a vacuum processing chamber. The method includes a process of removing the resist film in the vacuum processing chamber, and a pre-ashing process, performed prior to the main ashing process, for ashing the target substrate for a time period while maintaining the target substrate at a temperature in a range of from about 80 to 150° C.
    Type: Application
    Filed: March 20, 2008
    Publication date: September 25, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shigeru Tahara, Eiichi Nishimura, Kumiko Yamazaki
  • Publication number: 20080179006
    Abstract: A substarate processing apparatus capable of reducing the capacity of a space in an internal chamber. The internal chamber is housed in a space in an external chamber. A gas supply unit supplies a process gas into the space in the internal chamber. The space in the external chamber is under a reduced pressure or filled with an inert gas. An enclosure being movable and included in the internal chamber defines the space in the internal chamber with a stage heater included in the internal chamber. When a wafer is transferred in and out by a transfer arm used to transfer the wafer, the enclosure exits out of a motion range within which the transfer arm can move.
    Type: Application
    Filed: January 31, 2008
    Publication date: July 31, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shigeru TAHARA, Seiichi TAKAYAMA, Morihiro TAKANASHI
  • Publication number: 20080110859
    Abstract: An upper electrode and a lower electrode are disposed opposite to each other in a process container configured to be vacuum-exhausted. The upper electrode is connected to a first RF power supply configured to apply a first RF power for plasma generation. The lower electrode is connected to a second RF power supply configured to apply a second RF power for ion attraction. The second RF power supply is provided with a controller preset to control the second RF power supply to operate in a power modulation mode that executes power modulation in predetermined cycles between a first power set to deposit polymers on a predetermined film on a wafer and a second power set to promote etching of the predetermined film on the wafer.
    Type: Application
    Filed: October 4, 2007
    Publication date: May 15, 2008
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Akira Koshiishi, Noriyuki Kobayashi, Shigeru Yoneda, Kenichi Hanawa, Shigeru Tahara, Masaru Sugimoto
  • Publication number: 20080045030
    Abstract: [Subject In a plasma process using an ammonia gas after conducting a plasma process by using a process gas containing fluorine and carbon to a silicone-containing substrate, an ammonium silicofluoride having toxicity and water absorbancy is formed on the substrate. [Means for Solution]After conducting the plasma process using an ammonia gas, the substrate is heated to a temperature not lower than the decomposition temperature of the ammonium silicofluoride to decompose the ammonium silicofluoride in a process container in which the plasma process was conducted, or in a process container connected with the processing vessel which the plasma process was conducted therein and is isolated from a clean room atmosphere.
    Type: Application
    Filed: August 14, 2007
    Publication date: February 21, 2008
    Inventor: Shigeru Tahara
  • Publication number: 20070059933
    Abstract: A plasma ashing method is used for removing a patterned resist film in a processing chamber after etching a portion of a low-k film from an object to be processed in the processing chamber by using the patterned resist film as a mask. The method includes a first step of supplying a reaction product removal gas including at least CO2 gas into the processing chamber, generating plasma of the reaction product removal gas by applying a high frequency power for the plasma generation, and removing reaction products deposited on an inner wall of the processing chamber; and a second step of supplying an ashing gas into the processing chamber, generating plasma of the ashing gas by applying a high frequency power for the plasma generation, and removing the resist film.
    Type: Application
    Filed: August 25, 2006
    Publication date: March 15, 2007
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shigeru Tahara, Naotsugu Hoshi
  • Publication number: 20060213864
    Abstract: When a substrate is etched by using a processing gas including a first gas containing halogen and carbon and having a carbon number of two or less per molecule, while supplying the processing gas toward the substrate independently from a central and a peripheral portion of a gas supply unit, which face the central and the periphery part of the substrate respectively, the processing gas is supplied such that a gas flow rate is greater in the central portion than in the peripheral portion. When the substrate is etched by using a processing gas including a second gas containing halogen and carbon and having a carbon number of three or more per molecule, the processing gas is supplied such that a gas flow rate is greater in the peripheral portion than in the central portion.
    Type: Application
    Filed: March 27, 2006
    Publication date: September 28, 2006
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Shigeru Tahara, Masaru Nishino
  • Publication number: 20050230351
    Abstract: There are provided a plasma processing method and plasma processing apparatus capable of, when ashing a substrate to be ashed having an organic low-k film and a resist film formed thereon to thereby remove the resist film, reducing damages inflicted on the organic low-k film compared with the prior art. A pressure in a plasma processing chamber 102 is set to 4 Pa or below, a first high frequency electric power supply 140 applies an electric power of 0.81 W/cm2 or below as a high frequency electric power of a first frequency to an upper electrode 121 to generate an O2 plasma, and a second high frequency electric power supply 150 applies a second high frequency electric power having a second frequency lower than the first frequency to a susceptor (the lower electrode) 105 to generate a self-boas voltage.
    Type: Application
    Filed: March 1, 2005
    Publication date: October 20, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventor: Shigeru Tahara
  • Publication number: 20050106875
    Abstract: A plasma ashing method of an object to be processed removes a resist film therefrom in a processing vessel after etching a part of a low dielectric constant film with the resist film having a pattern thereon as a mask in the processing vessel. The plasma ashing method includes a first and a second ashing processes. The first ashing process removes deposits off an inner wall of the processing vessel by using a first processing gas including at least O2 gas while controlling the pressure in the processing vessel to be smaller than or equal to 20 mTorr. The second ashing process removes the resist film by using a second processing gas including at least O2 gas.
    Type: Application
    Filed: September 24, 2004
    Publication date: May 19, 2005
    Applicant: TOKYO ELECTRON LIMITED
    Inventors: Kazuhiro Kubota, Yoshiki Igarashi, Shigeru Tahara, Shin Okamoto, Toshihiko Shindo, Yoshinobu Ooya
  • Publication number: 20050005859
    Abstract: A ring mechanism, comprising a focus ring and divided cover rings surrounding a wafer W placed on a loading table (lower electrode) mounted in a processing chamber, wherein a ring-shaped clearance ?1 is provided between the divided rings to spread plasma to the radial outside of the focus ring to allow plasma to get therein, whereby a potential difference between the wafer W and the focus ring can be eliminated to prevent arc discharge by plasma from occurring between the wafer W and the focus ring.
    Type: Application
    Filed: December 12, 2002
    Publication date: January 13, 2005
    Inventors: Akira Koshiishi, Mitsuru Hashimoto, Hideaki Tanaka, Shigeru Tahara, Kunihiko Hinata, Jun Ooyabu
  • Patent number: D470885
    Type: Grant
    Filed: May 7, 2002
    Date of Patent: February 25, 2003
    Assignee: Kuretake Co., Ltd.
    Inventor: Shigeru Tahara