Patents by Inventor Shigetoshi Sugawa

Shigetoshi Sugawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180234652
    Abstract: One problem addressed by the present invention is to provide an optical sensor, a solid-state imaging device, and methods for reading the signals therefrom, which contribute greatly to the development of industry and the realization of a safer and more secure society. One solution according to the present invention is an optical sensor having a light-receiving element, storage capacitors that store a charge, and a transfer switch for transferring to the storage capacitors a charge generated by light input to the light-receiving element, wherein the storage capacitors are a floating diffusion capacitor and a lateral overflow integration capacitor, and the transfer switch is a non-LDD/MOS transistor, that is, a non-LDD/MOS transistor for which the impurity concentration of the drain region is reduced by 50%.
    Type: Application
    Filed: March 16, 2018
    Publication date: August 16, 2018
    Inventors: Shigetoshi Sugawa, Rihito Kuroda, Shunichi Wakashima
  • Publication number: 20170324916
    Abstract: One problem addressed by the present invention is to provide an optical sensor, a solid-state imaging device, and methods for reading the signals therefrom, which contribute greatly to the development of industry and the realization of a safer and more secure society. One solution according to the present invention is an optical sensor having a light-receiving element, storage capacitors that store a charge, and a transfer switch for transferring to the storage capacitors a charge generated by light input to the light-receiving element, wherein the storage capacitors are a floating diffusion capacitor and a lateral overflow integration capacitor, and the transfer switch is a non-LDD/MOS transistor, that is, a non-LDD/MOS transistor for which the impurity concentration of the drain region is reduced by 50%.
    Type: Application
    Filed: November 16, 2015
    Publication date: November 9, 2017
    Applicant: TOHOKU UNIVERSITY
    Inventors: Shigetoshi Sugawa, Rihito Kuroda, Shunichi Wakashima
  • Publication number: 20170315051
    Abstract: To provide a concentration measurement method with which the concentrations of predetermined chemical components can be measured non-destructively, accurately, and rapidly by a simple means, up to the concentrations in trace amount ranges, as well as a concentration measurement method with which the concentrations of chemical components in a measurement target can be accurately and rapidly measured in real time up to the concentrations in nano-order trace amount ranges, and which is endowed with a versatility that can be realized in a variety of embodiments and modes. In the present invention, a measurement target is irradiated, in a time sharing manner, with light of a first wavelength and light of a second wavelength that have different optical absorption rates with respect to the measurement target. The light of each wavelength, arriving optically via the measurement target as a result of irradiation with the light of each wavelength, is received at a shared light-receiving sensor.
    Type: Application
    Filed: November 20, 2015
    Publication date: November 2, 2017
    Inventors: Masaaki Nagase, Kouji Nishino, Nobukazu Ikeda, Michio Yamaji, Shigetoshi Sugawa, Rihito Kuroda
  • Publication number: 20170254743
    Abstract: To provide a concentration measuring method with which the concentration of a predetermined chemical component can be accurately, quickly, and nondestructively measured down to a concentration range of an extremely small amount with a simple means, and to provide a concentration measuring method with which the concentration of a chemical component in an object to be measured can be accurately and quickly measured down to a concentration range of a nano-order extremely small amount in real time, the method having universality, i.e., the ability to be embodied in various forms and modes.
    Type: Application
    Filed: February 23, 2015
    Publication date: September 7, 2017
    Inventors: Shigetoshi Sugawa, Rihito Kuroda
  • Publication number: 20170254746
    Abstract: To provide a concentration measurement method that makes it possible to accurately, quickly, and non-destructively measure the concentration of a predetermined chemical component to a trace level of concentration by a simple means, that makes it possible to accurately and quickly measure the concentration of a chemical component within an object to be measured to a nano-order trace concentration level in real time, and that has a versatility which makes it possible to adapt said concentration measurement method to a variety of situations and embodiments.
    Type: Application
    Filed: August 24, 2015
    Publication date: September 7, 2017
    Inventors: Shigetoshi Sugawa, Rihito Kuroda
  • Publication number: 20170207256
    Abstract: To provide a solid-state light-receiving device for ultraviolet light which can measure the amount of irradiation with ultraviolet light harmful to the human body using a simplified structure and properly and accurately, which can be readily integrated with a sensor of a peripheral circuit, which is small, light-weight, and low-cost, and which is suitable for mobile or wearable purposes. One solution is a solid-state light-receiving device for ultraviolet light which is provided with a first photodiode (1), a second photodiode (2), and a differential circuit which receives respective signals based on outputs from these photodiodes, wherein a position of the maximum concentration of a semiconductor impurity is provided in each of the photodiodes (1,2) and in a semiconductor layer region formed on each photodiode, and an optically transparent layer having a different wavelength selectivity is provided on a light-receiving surface of each photodiode.
    Type: Application
    Filed: May 7, 2015
    Publication date: July 20, 2017
    Inventors: Shigetoshi Sugawa, Rihito Kuroda
  • Publication number: 20170176248
    Abstract: Provided is a solid-state light-receiving device for ultraviolet light, which is capable of measuring an irradiation amount of UV-rays, which are harmful to a human body, accurately and appropriately with a simple structure, and of being formed easily and integrally with sensors of peripheral circuits, and which is small, lightweight, low cost, and suitable for mobile or wearable applications. The solid-state light-receiving device for ultraviolet light includes a first photodiode, a second photodiode, and a differential circuit to which signals based on outputs of those photodiodes are input. The solid-state light-receiving device for ultraviolet light also includes semiconductor layer regions, which are formed in and on the above-mentioned photodiodes, and each of which includes a highest concentration position of semiconductor impurities.
    Type: Application
    Filed: March 31, 2014
    Publication date: June 22, 2017
    Applicant: TOHOKU UNIVERSITY
    Inventors: Shigetoshi SUGAWA, Rihito KURODA
  • Patent number: 9568364
    Abstract: Provided is a photodiode having a high-concentration layer on its surface, in which the high-concentration layer is formed so that the thickness of a non-depleted region is larger than the roughness of an interface between silicon and an insulation film layer, and is smaller than a penetration depth of ultraviolet light.
    Type: Grant
    Filed: November 10, 2015
    Date of Patent: February 14, 2017
    Assignee: TOHOKU UNIVERSITY
    Inventors: Shigetoshi Sugawa, Rihito Kuroda
  • Patent number: 9429471
    Abstract: A plurality of photodiodes arrayed in a one-dimensional form are divided into a plurality of groups. The structure of an antireflection coating is changed for each group so that all the surfaces of the photodiodes belonging to each group are covered with an antireflection coating having a transmittance characteristic which shows a maximum transmittance within a range of wavelengths of light to be received by those photodiodes. In particular, a SiO2 coating layer on the silicon substrate and an Al2O3 coating layer are common to all the photodiodes, while the structure of the upper layers are modified with respect to the wavelength. Within an ultraviolet wavelength region, the coating structure is more finely changed with respect to the wavelength. By such a design, the transmittance can be improved while making the best efforts to avoid a complex manufacturing process.
    Type: Grant
    Filed: March 26, 2013
    Date of Patent: August 30, 2016
    Assignees: SHIMADZU CORPORATION, TOHOKU UNIVERSITY
    Inventors: Hideki Tominaga, Ryuta Hirose, Kenji Takubo, Shigetoshi Sugawa, Rihito Kuroda
  • Patent number: 9420210
    Abstract: A burst reading memory section (200) and continuous reading memory section (210) are independently provided for each of the two-dimensionally arrayed pixels (10). The burst reading memory section (200) has capacitors (25001-25104) capable of holding a plurality of signals. The continuous reading memory section (210) has only one capacitor 213. Signal output lines for the two memory sections are separately provided. When a signal produced by photoelectric conversion at the pixel (10) is outputted on a pixel output line (14), the signal can be simultaneously written in the capacitors at both memory sections (200, 201), after which the signals can be separately extracted to the outside at different timings. Therefore, a series of images taken at extremely short intervals of time during a short period of time can be obtained at an arbitrary timing without impeding a continuous image-acquiring operation at a low frame rate.
    Type: Grant
    Filed: June 10, 2009
    Date of Patent: August 16, 2016
    Assignees: TOHOKU UNIVERSITY, SHIMADZU CORPORATION
    Inventors: Shigetoshi Sugawa, Yasushi Kondo, Hideki Tominaga
  • Patent number: 9338378
    Abstract: To remove reset noise in pixels while the circuit configuration is kept in low power consumption, a device includes pixels arranged in row and column directions, in which each of the pixels includes a charge-voltage conversion terminal for voltage-converting signal charges transferred from a photoelectric conversion element, and a first reset means for resetting a voltage at the charge-voltage conversion terminal; first signal lines, each of which is connected to the pixels in each column; a scanning means for selecting one row among others; and a second reset means for resetting voltages at the signal lines. In the device, on each selected row, by voltage signals at the charge-voltage conversion terminals and the converted voltage signals from the transferred signal charges are read out to and stored in the signal lines in a floating potential state, and then are output.
    Type: Grant
    Filed: June 12, 2014
    Date of Patent: May 10, 2016
    Assignees: OLYMPUS CORPORATION, Tohoku University
    Inventor: Shigetoshi Sugawa
  • Patent number: 9294698
    Abstract: A solid-state image pickup apparatus includes: two-dimensionally arrayed unit pixels, each including a PD performing optical-electrical conversion of an incident light; an FD and an output terminal provided for each of pixel groups, each including one or more pixels, the terminal being capable of outputting a noise signal and a signal-noise sum signal separately; first lines to which the terminals are connected in common and which are capable of holding voltages based on signals outputted from the terminals; second lines provided in parallel with the first lines and capable of holding a voltage; inter-transfer-line capacitive elements connecting the second lines and the first lines; a reset switch resetting each of the second lines to a reset voltage; a readout switch provided for each of the second lines; and a third line to which the second lines are connected in parallel via the readout switches, respectively.
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: March 22, 2016
    Assignees: Tohoku University, Olympus Corporation
    Inventors: Shigetoshi Sugawa, Nana Akahane, Satoru Adachi
  • Publication number: 20160076939
    Abstract: Provided is a photodiode having a high-concentration layer on its surface, in which the high-concentration layer is formed so that the thickness of a non-depleted region is larger than the roughness of an interface between silicon and an insulation film layer, and is smaller than a penetration depth of ultraviolet light.
    Type: Application
    Filed: November 10, 2015
    Publication date: March 17, 2016
    Applicant: National University Corporation Tohoku University
    Inventors: Shigetoshi SUGAWA, Rihito KURODA
  • Patent number: 9264637
    Abstract: A solid-state image pickup apparatus including: two-dimensionally arrayed unit pixels, each including a PD performing optical-electrical conversion of an incident light; an FD and two output terminals provided for each of pixel groups, each including one or more unit pixels, the two output terminals being capable of outputting a noise signal and a signal-noise sum signal separately; first and second transfer lines to which the output terminals are connected in common and which are capable of holding noise signal voltage and signal-noise sum signal voltage, respectively; first switches arranged between the output terminals and the first transfer lines; second switches arranged between the output terminals and the second transfer lines; third and fourth switches provided for the transfer lines, respectively; and third and fourth transfer lines to which the transfer lines are connected in parallel via third and fourth switches, respectively.
    Type: Grant
    Filed: October 14, 2014
    Date of Patent: February 16, 2016
    Assignees: Tohoku University, OLYMPUS CORPORATION
    Inventors: Shigetoshi Sugawa, Nana Akahane, Satoru Adachi
  • Patent number: 9257479
    Abstract: A method of manufacturing an active pixel sensor having a plurality of pixels, each of the pixels having a photodiode formed by a part of a first semiconductor region of a first conductive type and a second semiconductor region of a second conductive type, and a transfer transistor for transferring a charge carrier from the photodiode, includes the steps of preparing a substrate on which the first semiconductor region of the first conductive type is formed, forming a mask to form the second semiconductor region on the substrate, forming the second semiconductor region using the mask, and forming a gate of the transferring transistor after forming the second semiconductor region. The gate of the transferring transistor overlaps the second semiconductor region in a planar view.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: February 9, 2016
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Toru Koizumi, Shigetoshi Sugawa, Isamu Ueno, Tetsunobu Kochi, Katsuhito Sakurai, Hiroki Hiyama
  • Patent number: 9240505
    Abstract: A method of etching capable of rapidly and flatly performing wet etching on a Si substrate using fluonitric acid represented by HF(a)HNO3(b)H2O(c) (where the unit of a, b and c is wt % and a+b+c=100). The etching rate of an SiO2 layer with the highly concentrated fluonitric acid is significantly lowered by the appropriate selection of its composition as compared with the etching rate of the Si substrate, and etch the Si substrate until the SiO2 layer is exposed. In this way, it is possible to rapidly etch the Si substrate and significantly enhance the flatness of the etched surface.
    Type: Grant
    Filed: October 28, 2011
    Date of Patent: January 19, 2016
    Assignee: TOHOKU UNIVERSITY
    Inventors: Tadahiro Ohmi, Tomotsugu Ohashi, Kazuhiro Yoshikawa, Tatsuro Yoshida, Teppei Uchimura, Kazuki Soeda, Shigetoshi Sugawa
  • Patent number: 9214489
    Abstract: Provided is a photodiode having a high-concentration layer on its surface, in which the high-concentration layer is formed so that the thickness of a non-depleted region is larger than the roughness of an interface between silicon and an insulator layer, and is smaller than a penetration depth of ultraviolet light.
    Type: Grant
    Filed: June 4, 2012
    Date of Patent: December 15, 2015
    Assignees: National University Corporation Tohoku University, SHIMADZU CORPORATION
    Inventors: Shigetoshi Sugawa, Rihito Kuroda
  • Patent number: 9190337
    Abstract: There is provided an etching method. A temperature at a plurality of predetermined positions on an upper surface of an Si substrate is measured during the etching processing. The etching processing includes supplying an etching solution to the upper surface of the Si substrate. An exothermic reaction occurs in the etching processing. The upper surface is heated or cooled depending on the measured value.
    Type: Grant
    Filed: May 20, 2014
    Date of Patent: November 17, 2015
    Assignee: TOHOKU UNIVERSITY
    Inventors: Takeshi Sakai, Tatsuro Yoshida, Kazuhiro Yoshikawa, Shigetoshi Sugawa
  • Publication number: 20150296160
    Abstract: A logical gate circuit (5) and four stages of flip flips (4a-4d) are assigned to each pixel (1). A controller (7) inputs four phase identification signals into the logical gate circuit (5) and also inputs a start signal STR into a shift register (4) synchronously with the four mutually different phases defined by the phase identification signals. During one round of scanning all the pixels (1) for a readout control, if an enable signal ENBL is set to “0” while an output of a phase identification circuit (110) is “1”, a charge accumulation time at the pixel (1) concerned becomes equal to a readout period T. If the enable signal ENBL is set to “1” while the output of the phase identification circuit (110) is “1”, electric charges accumulated in a photodiode (11) until that point are entirely discarded, so that the charge accumulation time becomes shorter than the readout period T.
    Type: Application
    Filed: October 28, 2013
    Publication date: October 15, 2015
    Applicants: TOHOKU UNIVERSITY, SHIMADZU CORPORATION
    Inventors: Hideki Tominaga, Ryuta Hirose, Kenji Takubo, Shigetoshi Sugawa, Rihito Kuroda
  • Patent number: 9153658
    Abstract: A gate insulating film of a conventional semiconductor device is subjected to dielectric breakdown at a low electric field strength and thus its service life is short. This is because since the size of the asperity of at least one of a semiconductor layer-side interface and an electrode-side interface is large and, an electric field applied to the gate insulating film is locally concentrated and has a variation in its strength. This problem is solved by specifying the sizes of the asperities of both interfaces of the gate insulating film.
    Type: Grant
    Filed: November 16, 2012
    Date of Patent: October 6, 2015
    Assignee: TOHOKU UNIVERSITY
    Inventors: Rihito Kuroda, Akinobu Teramoto, Shigetoshi Sugawa