Patents by Inventor Shih Chen
Shih Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240154021Abstract: A p-GaN high-electron-mobility transistor (HEMT) includes a buffer layer stacked on a substrate, a channel layer stacked on the buffer layer, a supply layer stacked on the channel layer, a doped layer stacked on the supply layer, and a hydrogen barrier layer covering the supply layer and the doped layer. A source and a drain are electrically connected to the channel layer and the supply layer, respectively. A gate is located on the doped layer. The hydrogen barrier layer is doped with fluorine.Type: ApplicationFiled: December 29, 2022Publication date: May 9, 2024Inventors: TING-CHANG CHANG, Wei-Chen Huang, Shih-Kai Lin, Yong-Ci Zhang, Sheng-Yao Chou, Chung-Wei Wu, Po-Hsun Chen
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Publication number: 20240153901Abstract: A first and second semiconductor device are bonded together using a bonding contact pad embedded within a bonding dielectric layer of the first semiconductor device and at least one bonding via embedded within a bonding dielectric layer of the second semiconductor device. The bonding contact pad extends a first dimension in a first direction perpendicular to the major surface of the first semiconductor device and a second dimension in a second direction parallel to the plane of the first semiconductor wafer, the second dimension being at least twice the first dimension. The bonding via extends a third dimension in the first direction and a fourth dimension in the second direction, the third dimension being at least twice the first dimension. The bonding contact pad and bonding via may be at least partially embedded in respective bonding dielectric layers in respective topmost dielectric layers of respective stacked interconnect layers.Type: ApplicationFiled: January 9, 2023Publication date: May 9, 2024Inventors: Yu-Hung Lin, Han-Jong Chia, Wei-Ming Wang, Kuo-Chung Yee, Chen Chen, Shih-Peng Tai
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Publication number: 20240153945Abstract: The present invention provides a chip including an I/O pin and an ESD protection circuit. The ESD protection circuit includes a P-type device and a first diode, wherein the P-type device is coupled between the I/O pin and a ground voltage, and an anode of the first diode is directly connected to the I/O pin. In addition, the ESD protection circuit does not comprise any device whose N-type doping/diffusion is directly connected to the I/O pin.Type: ApplicationFiled: September 27, 2023Publication date: May 9, 2024Applicant: MEDIATEK INC.Inventors: Ming-Chun Chen, Bo-Shih Huang
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Patent number: 11977232Abstract: A wearable device and a method for adjusting a display state based on an environment are provided. The method is adapted for the wearable device. The method includes: capturing an environmental image; when determining that there is a specific object in the environmental image, determining a display mode of a display circuit based on the specific object; and controlling the display circuit to be adjusted to a display state corresponding to the display mode.Type: GrantFiled: March 25, 2022Date of Patent: May 7, 2024Assignee: Coretronic CorporationInventors: Shih-Min Wu, Yi-Fa Wang, Ping-Chen Ma
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Publication number: 20240145670Abstract: A negative electrode structure applied to an aluminum battery includes a hole material layer and a metal plating layer. The metal plating layer is located on the hole material layer such that the capacity decay rate of the aluminum battery is less than 5% per cycle.Type: ApplicationFiled: May 31, 2023Publication date: May 2, 2024Applicant: APh ePower Co., Ltd.Inventors: Jui-Hsuan Wu, Shih Po Ta Tsai, Wei-An Chen
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Publication number: 20240140782Abstract: The present disclosure provides a semiconductor device. The semiconductor device includes a first device and a second device disposed adjacent to the first device; a conductive pillar disposed adjacent to the first device or the second device; a molding surrounding the first device, the second device and the conductive pillar; and a redistribution layer (RDL) over the first device, the second device, the molding and the conductive pillar, wherein the RDL electrically connects the first device to the second device and includes an opening penetrating the RDL and exposing a sensing area over the first device.Type: ApplicationFiled: January 5, 2024Publication date: May 2, 2024Inventors: PO CHEN YEH, YI-HSIEN CHANG, FU-CHUN HUANG, CHING-HUI LIN, CHIAHUNG LIU, SHIH-FEN HUANG, CHUN-REN CHENG
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Publication number: 20240145697Abstract: A multi-layer cathode coating for positive electrode of a rechargeable electrochemical cell (or secondary cell) (such as a lithium-ion secondary battery) and a secondary battery including a cathode having a multi-layer cathode coating. Multi-layer cathode coatings containing blends of one or more cathode active materials in certain weight ratios thereof.Type: ApplicationFiled: October 27, 2022Publication date: May 2, 2024Applicant: SAFT AMERICAInventors: Xilin Chen, Frank Cao, Carine Margez Steinway, Kamen Nechev, Shih-Chieh Liao, Chia-Ming Chang, Dar-Jen Liu
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Publication number: 20240144467Abstract: A hot spot defect detecting method and a hot spot defect detecting system are provided. In the method, hot spots are extracted from a design of a semiconductor product to define a hot spot map comprising hot spot groups, wherein local patterns in a same context of the design yielding a same image content are defined as a same hot spot group. During runtime, defect images obtained by an inspection tool performing hot scans on a wafer manufactured with the design are acquired and the hot spot map is aligned to each defect image to locate the hot spot groups. The hot spot defects in each defect image are detected by dynamically mapping the hot spot groups located in each defect image to a plurality of threshold regions and respectively performing automatic thresholding on pixel values of the hot spots of each hot spot group in the corresponding threshold region.Type: ApplicationFiled: January 8, 2024Publication date: May 2, 2024Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chien-Huei Chen, Pei-Chao Su, Xiaomeng Chen, Chan-Ming Chang, Shih-Yung Chen, Hung-Yi Chung, Kuang-Shing Chen, Li-Jou Lee, Yung-Cheng Lin, Wei-Chen Wu, Shih-Chang Wang, Chien-An Lin
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Publication number: 20240138138Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.Type: ApplicationFiled: October 24, 2022Publication date: April 25, 2024Inventors: SHIH-FAN KUAN, WEI-CHEN PAN, YU-TING LIN, HUEI-RU LIN
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Publication number: 20240132775Abstract: A composite quantum dot includes a quantum dot and a protecting unit. The quantum dot includes a dot body containing a first layer having a composition of M1A1, and a passivating unit containing a passivating metal ion and bound to the dot body. M1 is one of Zn, Sn, Pb, Cd, In, Ga, Ge, Mn, Co, Fe, Al, Mg, Ca, Sr, Ba, Ni, Ag, Ti and Cu, and A1 is one of Se, S, Te, P, As, N, I and O. The protecting unit adsorbs on the quantum dot and includes an amine compound and/or a primary ammonium salt thereof. A method for preparing the composite quantum dot and a method for detecting metal ions in an analyte aqueous solution using the composite quantum dot, as well as a passivated quantum dot and a preparation thereof, are also disclosed.Type: ApplicationFiled: December 21, 2023Publication date: April 25, 2024Inventors: Hsueh-Shih CHEN, Pin-Ju CHEN
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Publication number: 20240136313Abstract: An electrical connection includes a first driving substrate, a first adhesive layer, a first bonding pad a first bonding pad and a second bonding pad. The first driving substrate includes a first substrate and a first dielectric layer on the first substrate. The first adhesive layer is at a sidewall of the first dielectric layer of the first driving substrate. The first bonding pad is on the first substrate of the first driving substrate and in contact with the first adhesive layer, and the first bonding pad includes a plurality of grains, the grains are connected with each other, the grains include [111]-oriented copper grains, and a maximum width of the first bonding pad is equal to or less than 8 microns. The second bonding pad is on the first bonding pad.Type: ApplicationFiled: July 6, 2023Publication date: April 25, 2024Inventors: Chih CHEN, Shih-Chi YANG
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Publication number: 20240138139Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a substrate, a plurality of capacitors, and a first supporting layer. The plurality of capacitors are disposed on the substrate. Each of the capacitors extends along a first direction. Each of the plurality of capacitors includes a first capacitor electrode, a second capacitor electrode, and a capacitor dielectric separating the first capacitor electrode from the second capacitor electrode. The first supporting layer is disposed on the substrate. The first supporting layer extends along a second direction different from the first direction. The capacitor dielectric includes a first surface and a second surface which are disposed on two opposite sides along the first direction. The second surface is exposed by the first capacitor electrode. The first supporting layer is disposed between the first surface and the second surface of the capacitor dielectric.Type: ApplicationFiled: July 17, 2023Publication date: April 25, 2024Inventors: SHIH-FAN KUAN, WEI-CHEN PAN, YU-TING LIN, HUEI-RU LIN
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Patent number: 11964881Abstract: A method for making iridium oxide nanoparticles includes dissolving an iridium salt to obtain a salt-containing solution, mixing a complexing agent with the salt-containing solution to obtain a blend solution, and adding an oxidating agent to the blend solution to obtain a product mixture. A molar ratio of a complexing compound of the complexing agent to the iridium salt is controlled in a predetermined range so as to permit the product mixture to include iridium oxide nanoparticles.Type: GrantFiled: July 27, 2020Date of Patent: April 23, 2024Assignee: NATIONAL YANG MING CHIAO TUNG UNIVERSITYInventors: Pu-Wei Wu, Yi-Chieh Hsieh, Han-Yi Wang, Kuang-Chih Tso, Tzu-Ying Chan, Chung-Kai Chang, Chi-Shih Chen, Yu-Ting Cheng
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Publication number: 20240128151Abstract: A package structure includes a bonding substrate, an integrated circuit, and a heat sink metal. The integrated circuit includes an active region facing the bonding substrate. The heat sink metal is located between the bonding substrate and the active region of the integrated circuit. The heat sink metal is electrically insulated with the integrated circuit.Type: ApplicationFiled: October 16, 2023Publication date: April 18, 2024Inventors: Chun-Yen PENG, Kuo-Bin HONG, Shih-Chen CHEN, Hao-Chung KUO
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Publication number: 20240119603Abstract: The present disclosure provides a ball tracking system and method. The ball tracking system includes camera device and processing device. The camera device is configured to generate a plurality of video frame data, wherein the video frame data includes image of ball. The processing device is electrically coupled to the camera device and is configured to: recognize the image of the ball from the plurality of video frame data to obtain 2D estimation coordinate of the ball at first frame time and utilize 2D to 3D matrix to convert the 2D estimation coordinate into first 3D estimation coordinate; utilize model to calculate second 3D estimation coordinate of the ball at the first frame time; and calibrate according to the first 3D estimation coordinate and the second 3D estimation coordinate to generate 3D calibration coordinate of the ball at the first frame time.Type: ApplicationFiled: November 17, 2022Publication date: April 11, 2024Inventors: Rong-Sheng WANG, Shih-Chun CHOU, Hsiao-Chen CHANG
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Publication number: 20240118600Abstract: An illumination assembly includes a light source module and a light guide module. The light source module provides first and second beams. The light guide module includes a first light guide triangular prism having a first surface, a second surface and a beam-splitting surface. The first surface is located on a transmission path of the first beam, and the beam-splitting surface is located on a transmission path of the second beam. The first light guide triangular prism includes a first light guide layer arranged on the second surface and a first beam-splitting layer arranged on the beam-splitting surface. The first light guide layer guides the first beam to the first beam-splitting layer. The first beam-splitting layer allows the second beam to pass therethrough and reflect the first beam, so that the first and second beams are emitted from the second surface. A projection device is also provided.Type: ApplicationFiled: October 4, 2023Publication date: April 11, 2024Inventor: SHIH CHEN CHIOU
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Publication number: 20240111210Abstract: A method of manufacturing a semiconductor device includes the following steps. A photoresist layer is formed over a material layer on a substrate. The photoresist layer has a composition including a solvent and a first photo-active compound dissolved in the solvent. The first photo-active compound is represented by the following formula (A1) or formula (A2): Zr12O8(OH)14(RCO2)18 ??Formula (A1); or Hf6O4(OH)6(RCO2)10 ??Formula (A2). R in the formula (A1) and R in the formula (A2) each include one of the following formulae (1) to (6): The photoresist layer is patterned. The material layer is etched using the photoresist layer as an etch mask.Type: ApplicationFiled: May 9, 2023Publication date: April 4, 2024Applicants: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD., NATIONAL TSING HUA UNIVERSITYInventors: Jui-Hsiung LIU, Pin-Chia LIAO, Ting-An LIN, Ting-An SHIH, Yu-Fang TSENG, Burn Jeng LIN, Tsai-Sheng GAU, Po-Hsiung CHEN, Po-Wen CHIU
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Patent number: 11948896Abstract: A package structure is provided. The package structure includes a through substrate via structure, a first stacked die package structure, an underfill layer, and a package layer. The through substrate via structure is formed over a substrate. The first stacked die package structure is over the through substrate via structure, wherein the first stacked die package structure comprises a plurality of memory dies. The underfill layer is over the first stacked die package structure. the package layer is over the underfill layer, wherein the package layer has a protruding portion that extends below a top surface of the through substrate via structure.Type: GrantFiled: July 26, 2022Date of Patent: April 2, 2024Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Tsung-Fu Tsai, Kung-Chen Yeh, I-Ting Huang, Shih-Ting Lin, Szu-Wei Lu
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Patent number: 11938105Abstract: In one aspect, the disclosure relates to methods and compositions for treatment of cancer cachexia. In a further aspect, the composition is a pharmaceutical composition comprising a class I/IIB HDAC inhibitor and an androgen. In a still further aspect, the method of treatment comprises administering a class I/IIB HDAC inhibitor and an androgen to a subject or patient who has been diagnosed as having cancer cachexia. In some aspects, the class I/IIB HDAC inhibitor is a compound known as AR-42.Type: GrantFiled: December 19, 2022Date of Patent: March 26, 2024Assignee: Ohio State Innovation FoundationInventors: Ching-Shih Chen, Christopher C. Coss, Samuel Kulp, Yu-Chou Tseng, Tanios Bekaii-Saab
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Patent number: 11940388Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).Type: GrantFiled: March 16, 2018Date of Patent: March 26, 2024Assignee: IXENSOR CO., LTD.Inventors: Yenyu Chen, An Cheng Chang, Tai I Chen, Su Tung Yang, Chih Jung Hsu, Chun Cheng Lin, Min Han Wang, Shih Hao Chiu