Abstract: Example methods are provided to improve placement of an adaptor (210,220) to a mobile computing device (100) to measure a test strip (221) coupled to the adaptor (220) with a camera (104) and a screen (108) on a face of the mobile computing device (100). The method may include displaying a light area on a first portion of the screen (108). The first portion may be adjacent to the camera (104). The light area and the camera (104) may be aligned with a key area of the test strip (221) so that the camera (104) is configured to capture an image of the key area. The method may further include providing first guiding information for a user to place the adaptor (210,220) to the mobile computing device (100) according to a position of the light area on the screen (108).

Abstract: In one aspect, the disclosure relates to methods and compositions for treatment of cancer cachexia. In a further aspect, the composition is a pharmaceutical composition comprising a class I/IIB HDAC inhibitor and an androgen. In a still further aspect, the method of treatment comprises administering a class I/IIB HDAC inhibitor and an androgen to a subject or patient who has been diagnosed as having cancer cachexia. In some aspects, the class I/IIB HDAC inhibitor is a compound known as AR-42.

Abstract: The present disclosure provides a package structure and a method of manufacturing a package. The package structure includes a semiconductor die laterally encapsulated by an encapsulant, a redistribution structure and bumps. The redistribution structure is disposed on the semiconductor die and the encapsulant, and is electrically connected with the at least one semiconductor die. The bumps are disposed on the redistribution structure. The redistribution structure includes dielectric layers and metallic pattern layers sandwiched between the dielectric layers. The redistribution structure includes metallic pads on an outermost dielectric layer of the dielectric layers, and the outmost dielectric layer has undercut cavities beside the metallic pads.

Abstract: A method includes forming a first sealing layer at a first edge region of a first wafer; and bonding the first wafer to a second wafer to form a wafer stack. At a time after the bonding, the first sealing layer is between the first edge region of the first wafer and a second edge region of the second wafer, with the first edge region and the second edge region comprising bevels. An edge trimming process is then performed on the wafer stack. After the edge trimming process, the second edge region of the second wafer is at least partially removed, and a portion of the first sealing layer is left as a part of the wafer stack. An interconnect structure is formed as a part of the second wafer. The interconnect structure includes redistribution lines electrically connected to integrated circuit devices in the second wafer.

Abstract: A method is provided. The method includes determining a first bump map indicative of a first set of positions of bumps. The method includes determining, based upon the first bump map, a first plurality of bump densities associated with a plurality of regions of the first bump map. The method includes smoothing the first plurality of bump densities to determine a second plurality of bump densities associated with the plurality of regions of the first bump map. The method includes determining, based upon the second plurality of bump densities, a second bump map indicative of the first set of positions of the bumps and a set of sizes of the bumps.

Abstract: Methods of forming line-end extensions and devices having line-end extensions are provided. In some embodiments, a method includes forming a patterned photoresist on a first region of a hard mask layer. A line-end extension region is formed in the hard mask layer. The line-end extension region extends laterally outward from an end of the first region of the hard mask layer. The line-end extension region may be formed by changing a physical property of the hard mask layer at the line-end extension region.

Abstract: A connecting structure includes a first dielectric layer, a first connecting via in the first dielectric layer, a second connecting via in the first dielectric layer, and an isolation between the first connecting via and the second connecting via. The isolation separates the first and second connecting vias from each other. The first connecting via, the isolation and the second connecting via are line symmetrical about a central line perpendicular to a top surface of the first dielectric layer.

Abstract: A rotary apparatus includes a casing having a top sunk opening and an axial hole that are coaxially with each other along an axial line. A top adjusting disc unit is fixed in the top sunk opening, and has a top inner surrounding surface and a top outer surrounding surface. A top inner hole of the top inner surrounding surface extends along a central line parallel to and offset from the axial line. The top outer surrounding surface is non-coaxial with the top inner surrounding wall. A passive gear unit is disposed in the axial hole, and is driven by an active gear unit that is driven by a drive unit in the casing. The passive gear unit has an output shaft extending along the central line. A top bearing is clamped between the top support portion and the top inner surrounding surface of the top adjusting disc unit.

Abstract: A Dynamic Random Access Memory (DRAM) capacitor and a preparation method therefor are provided. The DRAM capacitor includes a dielectric layer, and the dielectric layer includes a high dielectric material layer, and low dielectric loss material layers provided on both side surfaces of the high dielectric material layer.

Abstract: The present disclosure generally relates to techniques and user interfaces for controlling and displaying representations of user in environments, such as during a live communication session and/or a live collaboration session.

Abstract: A display device includes a first substrate, a plurality of light-emitting diodes, a first wavelength conversion layer and a metasurface. The light-emitting diodes are arranged on the first substrate, in which the light-emitting diodes emit a first color light, and the light-emitting diodes includes a first light-emitting diode, a second light-emitting diode and a third light-emitting diode. The first wavelength conversion layer is on the first light-emitting diode, and configured to convert the first color light emitted from the first light-emitting diode into a second color light, in which the second color light is different from the first color light. The metasurface is above the first wavelength conversion layer, and configured to reflect the first color light and pass the second color light.

Abstract: An antenna module is provided. The antenna module includes a dielectric substrate, a radio frequency integrated circuit (RFIC) and a first number of first antennas. The radio frequency integrated circuit (RFIC) is disposed on the dielectric substrate, wherein the RFIC comprises a single first antenna port group and second antenna port groups to receive or transmit signals. The first number of first antennas is arranged in a first row on the dielectric substrate, wherein at least two of the first antennas are connected to the first antenna port group of the RFIC.

Abstract: A semiconductor structure includes a first dielectric layer over a first conductive line and a second conductive line, a high resistance layer over a portion of the first dielectric layer, a second dielectric layer on the high resistance layer, a low-k dielectric layer over the second dielectric layer, a first conductive via extending through the low-k dielectric layer and the second dielectric layer, and a second conductive via extending through the low-k dielectric layer and the first dielectric layer to the first conductive line. The first conductive via extends into the high resistance layer.

Abstract: A semiconductor device is provided. The semiconductor device includes a waveguide over a substrate. The semiconductor device includes a first dielectric structure over the substrate, wherein a portion of the waveguide is in the first dielectric structure. The semiconductor device includes a second dielectric structure under the waveguide, wherein a first sidewall of the second dielectric structure is adjacent a first sidewall of the substrate.

Abstract: In example implementations, a computing device is provided. The computing device includes a system management bus, a controller communicatively coupled to the system management bus, a noise generating component communicatively coupled to the controller, a noise cancellation codec communicatively coupled to the system management bus, and a speaker communicatively coupled to the noise cancellation codec. The operating parameters of the noise generating component are provided to the controller. The noise cancellation codec is to receive the operating parameters of the noise generating component from the controller via the system management bus and to generate a noise cancellation signal based on the operating parameters. The speaker outputs the noise cancellation signal to cancel noise generated by the noise generating component.

Abstract: A package structure and the manufacturing method thereof are provided. The package structure includes a first package including at least one first semiconductor die encapsulated in an insulating encapsulation and through insulator vias electrically connected to the at least one first semiconductor die, a second package including at least one second semiconductor die and conductive pads electrically connected to the at least one second semiconductor die, and solder joints located between the first package and the second package. The through insulator vias are encapsulated in the insulating encapsulation. The first package and the second package are electrically connected through the solder joints. A maximum size of the solder joints is greater than a maximum size of the through insulator vias measuring along a horizontal direction, and is greater than or substantially equal to a maximum size of the conductive pads measuring along the horizontal direction.

Abstract: An antenna and an electronic device including the antenna are provided. The antenna includes a pair of radiators, a pair of feeding elements, first and second feeding ports. The radiators are located beside a geometric origin and separated from each other. The geometric origin is located between the radiators. The feeding elements are located below the pair of radiators and are configured to feed signals to the radiators. The pair of feeding elements includes a first feeding element and a second feeding element that are separated from each other. The first feeding element has a first geometric configuration. The second feeding element has a second geometric configuration that is asymmetric to the first geometric configuration. The first feeding port is electrically connected to the first feeding element. The second feeding port is separated from the first feeding port and electrically connected to the second feeding element.

Abstract: The disclosure provides a display image adjustment method and an augmented reality display device. The display image adjustment method includes the following steps. Received image data is converted to a coordinate system of the augmented reality display device to obtain initial coordinate information. An initial image is provided to an active display region of the augmented reality display device based on the initial coordinate information. The initial coordinate information is adjusted in a virtual adjustment coordinate region to obtain adjusted coordinate information when an adjustment command is received. An adjusted image is provided to the active display region of the augmented reality display device based on the adjusted coordinate information. The display image adjustment method and the augmented reality display device proposed by the disclosure may adjust display content of the AR display device according to user's needs.

Abstract: A semiconductor quantum dot structure includes a core and a shell. The core includes a seed crystal made of a first compound M1C1, a core layer, and a barrier layer grown in such order. The seed crystal has first regions that are inactive with oxygen, and second regions that are easily reactive with oxygen. The core layer is made of the first compound M1C1, and has first and second areas. Each of the first areas is positioned on a corresponding one of the first regions. Each of the second areas is positioned on a corresponding one of the second regions. Each of the first areas has a thickness greater than that of each of the second areas. The barrier layer is made of a second compound selected from M1X1 and X2C1. The shell is grown on the barrier layer, and is made of a third compound M2C2.

Abstract: A micro LED display device includes a light emitting layer, a color conversion layer located on a light emitting surface of the light emitting layer, and a Bragg reflection element located on the color conversion layer. The Bragg reflection element includes a plurality of layer pairs. Each of the layer pairs includes at least one first layer and at least one second layer alternately stacked. The layer pairs include a top layer pair, a bottom layer pair and a plurality of middle layer pairs between the top layer pair and the bottom layer pair. A thickness of the first layer of each of the middle layer pairs is smaller than a thickness of the second layer of each of the middle layer pairs. A refractive index of the first layer is greater than a refractive index of the second layer.