Patents by Inventor Shih-Chi Chen

Shih-Chi Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210366778
    Abstract: The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 25, 2021
    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chandrashekhar Prakash Savant, Chia-Ming Tsai, Ming-Te Chen, Shih-Chi Lin, Zack Chong, Tien-Wei Yu
  • Publication number: 20210368266
    Abstract: A handheld electronic device includes a first speaker, a second speaker, and an audio controller. The audio controller includes a signal receiving unit, a frequency crossover unit, a harmonic-wave generating unit, a low frequency enhancement unit, and a signal synthesis unit. The signal receiving unit receives an original sound signal and generates a first channel signal and a second channel signal according to the original sound signal. The frequency crossover unit sets a preset frequency crossover point to filter the first channel signal to generate a low frequency signal. The harmonic-wave generating unit generates harmonic waves according to the low frequency signal. The low frequency enhancement unit generates an enhancing low-frequency signal according to the harmonic waves. The signal synthesis unit generates a first channel enhanced signal according to the enhancing low-frequency signal and drives the first speaker.
    Type: Application
    Filed: May 19, 2021
    Publication date: November 25, 2021
    Inventors: Tsung-Yen YU, Kuo-Yuan HUANG, Shih-Jie KUO, Yuan-Hao LO, Yen-Ming CHEN, Wei-Chi PAN
  • Patent number: 11150484
    Abstract: A laser-based manufacturing system is disclosed for fabricating non-planar three-dimensional layers. The system may have a laser for producing a laser beam with a plurality of optical wavelengths. An optically dispersive element may be used for receiving the laser beam and splitting the beam into a plurality of distinct beam components, wherein each beam component has spatially separated optical spectral components. A phase mask may be used which is configured to receive at least one of the beam components emerging from the dispersive element and to create a modified beam. One or more focusing elements may then be used to receive the modified beam emerging from the phase mask and to focus the modified beam into a non-planar light sheet for use in fabricating a part.
    Type: Grant
    Filed: May 18, 2018
    Date of Patent: October 19, 2021
    Assignee: Lawrence Livermore National Security, LLC
    Inventors: Sourabh Saha, Shih-Chi Chen, Yina Chang
  • Publication number: 20210313441
    Abstract: In an embodiment, a structure includes: a semiconductor substrate; a fin extending from the semiconductor substrate; a gate stack over the fin; an epitaxial source/drain region in the fin adjacent the gate stack; and a gate spacer disposed between the epitaxial source/drain region and the gate stack, the gate spacer including a plurality of silicon oxycarbonitride layers, each of the plurality of silicon oxycarbonitride layers having a different concentration of silicon, a different concentration of oxygen, a different concentration of carbon, and a different concentration of nitrogen.
    Type: Application
    Filed: April 1, 2020
    Publication date: October 7, 2021
    Inventors: Chien-Chih Lin, Yen-Ting Chen, Wen-Kai Lin, Szu-Chi Yang, Shih-Hao Lin, Tsung-Hung Lee, Ming-Lung Cheng
  • Publication number: 20210305258
    Abstract: A transistor includes a gate structure that has a first gate dielectric layer and a second gate dielectric layer. The first gate dielectric layer is disposed over the substrate. The first gate dielectric layer contains a first type of dielectric material that has a first dielectric constant. The second gate dielectric layer is disposed over the first gate dielectric layer. The second gate dielectric layer contains a second type of dielectric material that has a second dielectric constant. The second dielectric constant is greater than the first dielectric constant. The first dielectric constant and the second dielectric constant are each greater than a dielectric constant of silicon oxide.
    Type: Application
    Filed: September 29, 2020
    Publication date: September 30, 2021
    Inventors: Chih-Yu Hsu, Jian-Hao Chen, Chia-Wei Chen, Shan-Mei Liao, Hui-Chi Chen, Yu-Chia Liang, Shih-Hao Lin, Kuei-Lun Lin, Kuo-Feng Yu, Feng-Cheng Yang, Yen-Ming Chen
  • Publication number: 20210288003
    Abstract: A semiconductor package having a partial outer metal layer and packaging method thereof is disclosed. In the method, a specific packaging substrate or a specific positioning plate is used to package multiple semiconductor devices and a partial outer metal layer is quickly formed on an encapsulation of each semiconductor device in the same step.
    Type: Application
    Filed: November 10, 2020
    Publication date: September 16, 2021
    Applicant: Powertech Technology Inc.
    Inventors: Shih-Chun CHEN, Sheng-Tou TSENG, Kun-Chi HSU, Chin-Ta WU, Ying-Lin CHEN, Ting-Yeh WU
  • Patent number: 11121100
    Abstract: Some embodiments of the present disclosure are directed to a device. The device includes a substrate comprising a silicon layer disposed over an insulating layer. The substrate includes a transistor device region and a radio-frequency (RF) region. An interconnect structure is disposed over the substrate and includes a plurality of metal layers disposed within a dielectric structure. A handle substrate is disposed over an upper surface of the interconnect structure. A trapping layer separates the interconnect structure and the handle substrate.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Yu Cheng, Chih-Ping Chao, Kuan-Chi Tsai, Shih-Shiung Chen, Wei-Kung Tsai
  • Patent number: 11121098
    Abstract: Some embodiments of the present disclosure are directed to a device. The device includes a substrate comprising a silicon layer disposed over an insulating layer. The substrate includes a transistor device region and a radio-frequency (RF) region. An interconnect structure is disposed over the substrate and includes a plurality of metal layers disposed within a dielectric structure. A handle substrate is disposed over an upper surface of the interconnect structure. A trapping layer separates the interconnect structure and the handle substrate.
    Type: Grant
    Filed: September 6, 2017
    Date of Patent: September 14, 2021
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuo-Yu Cheng, Chih-Ping Chao, Kuan-Chi Tsai, Shih-Shiung Chen, Wei-Kung Tsai
  • Publication number: 20210273138
    Abstract: The present application discloses a light-emitting device comprises a semiconductor light-emitting element, a transparent element covering the semiconductor light-emitting element, an insulating layer which connects to the transparent element, an intermediate layer which connects to the insulating layer; and a conductive adhesive material connecting to the intermediate layer.
    Type: Application
    Filed: May 17, 2021
    Publication date: September 2, 2021
    Inventors: Chien-Liang LIU, Ming-Chi HSU, Shih-An LIAO, Jen-Chieh YU, Min-Hsun HSIEH, Jia-Tay KUO, Yu-His SUNG, Po-Chang CHEN
  • Patent number: 11094665
    Abstract: A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: August 17, 2021
    Inventor: Shih-Chi Chen
  • Patent number: 10909701
    Abstract: The present disclosure discloses a method, a data acquisition and image processing system and a non-transitory machine-readable medium for obtaining a super-resolved image of an object. The method comprises: obtaining a plurality of structured images of the object by structured light; determining, from the structured images, modulation information of each structured light that comprises spatial frequency, phase shift and modulation factor; initializing a sample image of the object according the structured images and initializing structured pattern of each structured light by the corresponding modulation information; and restoring the image with improved resolution by adjusting the sample image and the structured pattern iteratively.
    Type: Grant
    Filed: June 27, 2019
    Date of Patent: February 2, 2021
    Assignee: The Chinese University of Hong Kong
    Inventors: Shih-Chi Chen, Yunlong Meng, Jialong Chen
  • Patent number: 10910336
    Abstract: A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.
    Type: Grant
    Filed: January 29, 2019
    Date of Patent: February 2, 2021
    Inventor: Shih-Chi Chen
  • Publication number: 20210001540
    Abstract: The present disclosure relates to a method for performing an additive manufacturing operation to form a structure by processing a photopolymer resist material. A laser beam is directed at a tunable mask. At least one emergent beam is collected from a plurality of emergent beams emerging from the tunable mask. The at least one emergent beam is collimated to create a collimated beam. Each emergent beam from the tunable mask has a plurality of beam lets of varying or identical intensity, and each beam let emerges from a unique subsection or region of the tunable mask. The collimated beam is focused into a laser beam which is projected as an image plane onto or within the photopolymer resist material, such that the same optical path length is created between the tunable mask and the focused image plane for all optical frequencies of the focused laser beam.
    Type: Application
    Filed: September 18, 2020
    Publication date: January 7, 2021
    Inventors: Sourabh Kumar SAHA, Robert Matthew PANAS, Shih-Chi CHEN
  • Patent number: 10884250
    Abstract: An apparatus and a method for laser beam shaping and scanning. The apparatus includes a digital micromirror device (DMD) including a plurality of micromirrors, configured to receive a first laser beam, adjust an axial position of a focal point of the first laser beam along a moving direction of the first laser beam by controlling a focal length of wavefront of a binary hologram applied to the DMD, and adjust a lateral position of the focal point on a plane perpendicular to the moving direction by controlling a tilted angle of a fringe pattern and a period of fringes of the binary hologram applied to the DMD, wherein the DMD simultaneously functions as programmable binary mask and a blazed grating.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: January 5, 2021
    Assignee: The Chinese University of Hong Kong
    Inventors: Shih-Chi Chen, Qiang Geng, Dien Wang, Pengfei Chen, Dapeng Zhang
  • Publication number: 20200410700
    Abstract: The present disclosure discloses a method, a data acquisition and image processing system and a non-transitory machine-readable medium for obtaining a super-resolved image of an object. The method comprises: obtaining a plurality of structured images of the object by structured light; determining, from the structured images, modulation information of each structured light that comprises spatial frequency, phase shift and modulation factor; initializing a sample image of the object according the structured images and initializing structured pattern of each structured light by the corresponding modulation information; and restoring the image with improved resolution by adjusting the sample image and the structured pattern iteratively.
    Type: Application
    Filed: June 27, 2019
    Publication date: December 31, 2020
    Inventors: Shih-Chi CHEN, Yunlong Meng, Jialong Chen
  • Publication number: 20200395401
    Abstract: A FOWBCSP CMOS chip module with a packaging structure includes a CMOS chip having plural joints and a light sensing area on an upper side thereof; two stop bars positioned on the upper side of the CMOS chip; a substrate installed on the upper side of the CMOS chip; the joints and the light sensing area being located within a through hole of the substrate; and an upper side of the substrate being formed with a plurality of joints; a plurality of conductive wires passing through the through holes of the substrate for connecting the joints of the substrate and the joints of the CMOS chip; and a glass installed on an upper side of the light sensing area. The glass exposes out and external light can radiate the CMOS chip through the glass; and the joints on the upper side of the substrate have a plurality of conductive balls.
    Type: Application
    Filed: August 27, 2020
    Publication date: December 17, 2020
    Inventor: SHIH-CHI CHEN
  • Publication number: 20200371481
    Abstract: In some embodiments, a control system, a control method and a storage medium are provided. In the method, first motion information of a machine acquired by a first sensor is received; the first motion information is inputted into a deep learning model to obtain a model output, the deep learning model comprising a convolutional neural network (CNN) and a long short-term memory (LSTM); the deep learning model is trained using the first motion information and second motion information acquired by a second sensor; the first sensor and the second sensor having different ways of detecting information and processing the detected information. The model output is used to control the machine.
    Type: Application
    Filed: May 22, 2019
    Publication date: November 26, 2020
    Inventors: Shih-Chi CHEN, XiangBo LIU, Chenglin LI, Xiaogang WANG, Hongsheng LI
  • Patent number: 10821671
    Abstract: A laser fabrication method and a laser fabrication system. The laser fabrication system includes an ultrafast laser source configured to output a laser beam; and a digital micromirror device (DMD), configured to receive, shape, and scan the laser beam, wherein more than one binary holograms are synthesized to form a scanning hologram applied to the DMD. The shaped laser beam, containing one or multiple focal points, leaving the DMD, are focused to the sample for fast laser fabrication.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: November 3, 2020
    Assignee: The Chinese University of Hong Kong
    Inventors: Shih-Chi Chen, Qiang Geng, Dien Wang, Pengfei Chen, Dapeng Zhang
  • Publication number: 20200312807
    Abstract: A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.
    Type: Application
    Filed: June 15, 2020
    Publication date: October 1, 2020
    Inventor: Shih-Chi Chen
  • Publication number: 20200243475
    Abstract: A chip package structure, comprises a first chip having a plurality of first chip joints at a lower side thereof; a circuit board below the first chip; an upper side of the circuit board being arranged with a plurality of circuit board joints; in packaging, the first chip joints being combined with the circuit board joints of the circuit board so that the first chip is combined to the circuit board by a way of ACF combination or convex joint combination; and wherein in the ACF combination, ACFs are used as welding points to be combined to the pads at another end so that the chip is combined to the circuit board; and wherein in the convex pad combination, a convex pad is combined with a flat pad by chemically methods or physical methods; and these pads are arranged on the circuit board and the first chip.
    Type: Application
    Filed: January 29, 2019
    Publication date: July 30, 2020
    Inventor: SHIH-CHI CHEN